CN111586931A

CN111586931A - LED drive circuit and LED drive system

Info

Publication number: CN111586931A
Application number: CN202010609283.5A
Authority: CN
Inventors: 林斌斌; 黄梅芳
Original assignee: Shenzhen Jueming Technology Co ltd
Current assignee: Shenzhen Jueming Technology Co ltd
Priority date: 2020-06-29
Filing date: 2020-06-29
Publication date: 2020-08-25

Abstract

The embodiment of the invention provides an LED driving circuit and an LED driving system. The LED driving circuit comprises n LED driving chips, wherein n is more than or equal to 2; one end of each LED driving chip is electrically connected with the positive electrode of the public power line; the other end of each LED driving chip is electrically connected with the negative electrode of the common power line; the controller is used for transmitting data to each LED driving chip in the form of an initial carrier signal at the anode of the common power line. The LED driving circuit has the advantages that the complexity of the LED driving circuit is reduced, and the stability of data transmission is improved.

Description

LED drive circuit and LED drive system

Technical Field

The embodiment of the invention relates to the technical field of Light Emitting Diodes (LEDs), in particular to an LED driving circuit and an LED driving system.

Background

With the rapid development of LEDs, more and more kinds of LED driving circuits are coming up.

Currently, a common LED driving circuit is a cascaded LED driving circuit obtained by connecting a plurality of LED driving chips in series, so that data is sent to a next LED driving chip through a previous LED driving chip.

However, in the currently-used LED driving circuit, a plurality of LEDs are connected in series in a cascade manner to transmit data, which is too high in complexity and easily causes instability of data transmission.

Disclosure of Invention

The embodiment of the invention provides an LED driving circuit and an LED driving system, which are used for achieving the effects of reducing the complexity of the LED driving circuit and improving the stability of data transmission.

In a first aspect, an embodiment of the present invention provides an LED driving circuit, where the LED driving circuit includes n LED driving chips, where n is greater than or equal to 2;

one end of each LED driving chip is electrically connected with the positive electrode of the public power line;

the other end of each LED driving chip is electrically connected with the negative electrode of the common power line;

the controller is used for transmitting data to each LED driving chip in the form of an initial carrier signal at the anode of the common power line.

Optionally, the data includes configuration data and/or display data;

the configuration data is used for configuring the working state of the LED driving chip;

the display data is used for driving the LED driving chip to control the LED lamp to display.

Optionally, each of the LED driving chips is pre-configured with an address, and the LED driving chip includes:

a decoding module for receiving the data from the positive pole of the common power line and decoding the data;

the address code fetching module is used for receiving the decoded data and extracting target data corresponding to the current-level LED driving chip from the decoded data according to the current-level address corresponding to the current-level LED driving chip;

and the display output module is used for receiving the target display data sent by the address code fetching module when the data is display data so as to control the LED lamp to display according to the target display data.

Optionally, the LED driving chip further includes:

a filtering module disposed before the decoding module, the filtering module being configured to filter the initial carrier signal;

the decoding module decodes the data according to the initial carrier signal and the filtered carrier signal.

Optionally, the decoding module is specifically configured to decode to obtain a first digital code when the voltage of the initial carrier signal is higher than the voltage of the filtered carrier signal;

and when the voltage of the initial carrier signal is lower than that of the filtered carrier signal, decoding to obtain a second digital code.

Optionally, the adjacent initial carrier signals are separated by a level interval of a preset length.

Optionally, the n LED driving chips are electrically connected in series, and the first stage LED driving chip is electrically connected to the controller;

the LED driving circuit receives the address and the configuration data sent by the controller during initialization.

Optionally, the LED driving chip further includes:

the code rate detection module is used for detecting code rate parameters corresponding to the display data when the data are the display data;

the data buffer module is used for caching the display data;

the decoding module is specifically configured to receive the code rate parameter sent by the code rate detection module, and extract the display data from the data buffer module, so as to decode the target data according to the code rate parameter.

Optionally, the number of the decoding modules is multiple;

and the plurality of decoding modules sequentially receive the data sent by the controller according to a preset time interval.

In a second aspect, an embodiment of the present invention provides an LED driving system, including the LED driving circuit according to any embodiment of the present invention, and further including a controller, where the controller is connected to one end of each of the LED driving chips through an anode of a common power line, the controller is connected to the other end of each of the LED driving chips through the anode of the common power line, and the controller is configured to transmit data to each of the LED driving chips in the form of an initial carrier signal at the anode of the common power line.

The LED drive circuit comprises n LED drive chips, wherein n is more than or equal to 2; one end of each LED driving chip is electrically connected with the positive electrode of the public power line; the other end of each LED driving chip is electrically connected with the negative electrode of the common power line; the positive pole and the negative pole of the public power line are respectively connected with the controller, the controller is used for transmitting data to each LED driving chip in the form of an initial carrier signal, the problems that the existing common LED driving circuit is connected with a plurality of LEDs in series in a cascading mode to transmit data, the complexity is too high, and the data transmission is unstable are solved, so that the complexity of the LED driving circuit is reduced, and the stability of the data transmission is improved are achieved.

Drawings

Fig. 1 is a schematic structural diagram of an LED driving circuit according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of another LED driving circuit according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of an LED driving chip according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of another LED driving chip according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of another LED driving chip according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of an LED driving system according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Wherein the terms "first position" and "second position" are two different positions.

In the description of the present invention, it should be noted that unless otherwise explicitly stated or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection or a removable connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

Fig. 1 is a schematic structural diagram of an LED driving circuit according to an embodiment of the present invention. As shown in FIG. 1, an embodiment of the present invention provides an LED driving circuit 100, which includes n LED driving chips 110, where n ≧ 2, where:

one end of each of the LED driving chips 110 is electrically connected to the anode 210 of the common power line;

the other end of each of the LED driving chips 110 is electrically connected to the cathode 220 of the common power line;

wherein, the anode 210 and the cathode of the common power line are respectively connected to the controller 300, and the controller 300 is configured to transmit data in the form of an initial carrier signal to each of the LED driving chips 110 at the anode 210 of the common power line.

In the present embodiment, data is transmitted to each LED driving chip 110 at the positive electrode 210 of the common power line in the form of an initial carrier signal, and each LED driving chip 110 can control the LED lamp to display or configure the operating state of the LED driving chip 110 according to the received data. It can be understood that, by transmitting data to each LED driving chip 110 at the positive electrode 210 of the common power line in the form of an initial carrier signal, the complexity is lower, and even if one of the LED driving chips 110 is damaged, the transmission of the other LED driving chips 110 is not affected, thereby improving the stability of data transmission.

For example, when the LED driving circuit 100 transmits display data to display a picture, when one of the LED driving chips 110 is damaged, only the LED driving chip 110 cannot drive the LED lamp to display, and the other LED driving chips 110 can normally drive the LED lamp to display, and the failed LED driving chip 110 is only configured that the LED lamp driven by the damaged LED driving chip 110 is not turned on, and the failed LED driving chip can be quickly located to a dead spot.

It should be noted that the data of this embodiment may be configuration data and/or display data, that is, the data may be only the display data or the configuration data, or the display data and the configuration data may be sent together. Wherein the configuration data is used for configuring the operating state of the LED driving chip 110. Optionally, the configuration data may be used to configure one or more of gamma coefficient, current adjustment, and grayscale accuracy. The display data is used for driving the LED driving chip 110 to control the LED lamp to display. The n LED driving chips in the LED driving circuit 100 of the present embodiment are not cascaded.

In the present embodiment, each LED driving chip 110 in the LED driving circuit 100 is configured with an address in advance. It can be understood that the pre-configured address may be a fixed address that is initialized before the factory leaves, and thus no cascade connection between the LED driving chips 110 is required; in addition, the pre-configured address may not be initialized to a fixed address before shipping, and the LED driving chip 110 needs to perform address initialization in a cascade connection manner.

Referring to fig. 2, fig. 2 is a schematic structural diagram of another LED driving circuit provided in this embodiment. As can be seen from fig. 2, n LED driving chips 110 are electrically connected in series, and the LED driving chip 110 of the first stage is electrically connected to the controller 300; the LED driving circuit 100 receives an address and configuration data transmitted from the controller 300 at the time of initialization.

It should be noted that in the LED driving circuit 100 of the present embodiment, the n LED driving chips 110 are cascaded, only for sending address and configuration data through the controller 300 during initialization, and the subsequent transmission of display data and/or configuration data is transmitted through the anode 210 of the common power line. If n LED driving chips 110 need to be cascaded, the n LED driving chips can be transmitted to the next LED driving chip 110 through the decoding module 111 of the current LED driving chip 110.

Referring to fig. 3, fig. 3 is a schematic structural diagram of an LED driving chip provided in this embodiment. As can be seen from fig. 3, the LED driving chip 110 includes a decoding module 111, an address code fetching module 112 and a display output module 113, and each LED driving chip 110 is configured with an address in advance, where:

the decoding module 111 is used for receiving the data from the anode 210 of the common power line and decoding the data;

the address code fetching module 112 is configured to receive the decoded data, and extract target data corresponding to the current-stage LED driving chip 110 from the decoded data according to the current-stage address corresponding to the current-stage LED driving chip 110;

the display output module 113 is configured to receive, when the data is display data, target display data sent by the address code fetching module 112, so as to control the LED lamp to display according to the target display data.

Specifically, the decoding module 111 is electrically connected to the positive electrode 210 of the common power line, and receives data from the positive electrode 210 of the common power line for decoding, and sends the decoded data to the address elimination module. After receiving the decoded data, the address code fetching module 112 extracts the target data corresponding to the current-stage LED driving chip 110 from the decoded data according to the current-stage address corresponding to the current-stage LED driving chip 110. If the target data is target configuration data, the operating state of the current-stage LED driving chip 110 is configured directly according to the target configuration data, and if the target data is target display data, the address code fetching module 112 sends the target display data to the display output module 113. After receiving the target display data, the display output module 113 may control the LED lamp to display according to the target display data.

It should be noted that the display output module 113 may be a DC display output module 113 in a DC dimming manner, and may also be a PWM display output module 113, which is not limited herein. DC dimming is to change the brightness of a screen by increasing or decreasing the power of a circuit of a screen panel, and since the power is equal to voltage × current, the brightness of the screen can be changed by only changing the voltage or the current. Taking the PWM display output module 113 as an example, the PWM display output module 113 outputs the PWM modulation format to the LED lamp for displaying, and converts the decoded display data into a PWM signal to control the LED lamp to display.

Wherein, each LED driving chip 110 has only one corresponding address. In the LED driving circuit 100 of the present embodiment, the addresses of the n LED driving chips 110 may be unique, may be repeated periodically, may be specially configured, and the like, and are not limited herein. The unique addresses of the n LED driving chips 110 mean that the addresses corresponding to the n LED driving chips 110 are not repeated and are unique. By periodic repetition is meant that the addresses are arranged in a periodic cycle, e.g., 1,2,3,4, etc. The special setting means that a special address is set, and the address difference between the LED driving chips 110 is variable, for example, 1,3,5,8,15,2,4,6, etc. It should be noted that the special formulation is especially beneficial to the special-shaped screen and is beneficial to the wiring method of engineering books.

Specifically, the controller 300 transmits n × Mbit (bit) data at the positive electrode 210 of the common power line, where n refers to the number of LED driving chips 110 in the LED driving circuit 100 and M refers to each LED driving chip 110 receiving M-bit data. When receiving the data, each LED driving chip 110 counts the data, and then extracts the data corresponding to the current level address matching of the current level LED driving chip 110. Assuming that the address of the first LED driving chip 110 is 1 and the address of the current stage LED driving chip 110 is 3, 1Mbit of data from 3 × M +1bit to 4 × M is received and output to the LED lamp for display as the display data of the current stage LED driving chip 110. For example, the number of the LED driving chips 110 in the LED driving circuit 100 is 2, the address of the first LED driving chip 110 is 1, the address of the second LED driving chip 110 is 2, each LED driving chip 110 needs 24-bit display data, the controller 300 sends 2 × 24-bit display data through the positive electrode 210 of the common power line, the first LED driving chip extracts the front 24-bit data of the 2 × 24-bit display data for display, and the second LED driving chip 110 extracts the rear 24-bit display data of the 2 × 24-bit display data for display.

In an embodiment, optionally, the LED driving chip 110 further includes a filtering module 114, where the filtering module 114 is disposed before the decoding module 111, and the filtering module 114 is configured to filter the initial carrier signal; the decoding module 111 decodes the data according to the initial carrier signal and the filtered carrier signal.

In this embodiment, the positive pole 210 of the common power line is respectively connected to the input terminal of the filtering module 114 and the input terminal of the decoding module 111, and the output terminal of the filtering module 114 is further connected to the input terminal of the decoding module 111. The decoding module 111 is specifically configured to decode to obtain a first digital code when the voltage of the initial carrier signal is higher than the voltage of the filtered carrier signal; and when the voltage of the initial carrier signal is lower than that of the filtered carrier signal, decoding to obtain a second digital code.

Specifically, an initial carrier signal input by the anode 210 of the common power line enters the filtering module 114 and the decoding module 111 at the same time, the filtering module 114 filters the initial carrier signal to obtain a filtered carrier signal, and sends the filtered carrier signal to the decoding module 111, so that the decoding module 111 has both the initial carrier signal and the filtered carrier signal, and when the voltage of the initial carrier signal is higher than that of the filtered carrier signal, the decoding module 111 decodes the initial carrier signal to obtain a first digital code, for example, 1; when the voltage of the initial carrier signal is lower than the voltage of the filtered carrier signal, the decoding module 111 decodes to obtain a second data code, for example, 0, the decoding module 111 decodes the data to obtain a string of digital signals, and the address code fetching module 112 may extract the data corresponding to the current stage of the LED driving chip 110 from the digital signals according to the current stage of the address. Optionally, the filtering module 114 in this embodiment may perform RC (resistance-Capacitance) filtering on the initial carrier signal to filter out a bouncing logic signal, that is, the initial carrier signal is filtered out in an RC filtering manner, the obtained filtered carrier signal is stable and does not shake, the filtered carrier signal is used as a power supply signal of each LED driving chip 110, and meanwhile, the filtered carrier signal is compared with another path of initial carrier signal, so as to decode data. In addition, the filtering module 114 may also filter the initial carrier signal by using a charge pump (charge pump). It can be understood that the filtering module 114 of this embodiment is used for filtering the initial carrier signal to filter the jittered logic signal, and is not limited to a specific filtering manner, and the manner that the jittered logic signal of the initial carrier signal can be selected according to needs.

It should be noted that, in order to ensure that the decoding module 111 can decode normally, the adjacent initial carrier signal intervals are level intervals with a preset length. The decoding module 111 is prevented from decoding a plurality of digital signals into one signal through the level interval with the preset length of the adjacent initial carrier signal interval, so that the decoding error is avoided.

In another embodiment, when the LED driving chip 110 does not include the filtering module 114, a reference voltage may be given, and when the voltage of the initial carrier signal is higher than the reference voltage, the decoding module 111 decodes the initial carrier signal to obtain a first digital code, for example, 1; when the voltage of the initial carrier signal is lower than the reference voltage, the decoding module 111 decodes to obtain a second data code, for example, 0.

It should be noted that when the consecutive code 1 and the consecutive code 0 occur, the data should not be lower than the reference voltage of the power supply for a long time, but each bit of the data sent by the controller 300 is returned to the reference voltage of the power supply and then jumps to the level of 0 or 1. For example, the reference voltage of the power supply is 5V, a voltage lower than 5V, for example, 4V is code 0, and a voltage higher than 5V, for example, 6V is code 0. When the code 1 and the continuous code 0 appear continuously, after the transmission of 0 or 1, the voltage returns to the reference voltage of 5V, and then the code 0 or 1 is transmitted again at 4V or 6V. Accordingly, when the LED driving chip 110 receives data, when the voltage of the initial carrier signal jumps from a voltage less than or greater than the reference voltage to the reference voltage, a code 1 or 0 is obtained.

Referring to fig. 4, fig. 4 is a schematic structural diagram of another LED driving chip provided in this embodiment. In this embodiment, the LED driving chip 110 further includes a code rate detecting module 115 and a data buffering module 116, wherein:

the code rate detecting module 115 is configured to detect a code rate parameter corresponding to the display data when the data is the display data;

the data buffer module 116 is configured to buffer the display data;

the decoding module 111 is specifically configured to receive the code rate parameter sent by the code rate detecting module 115, and extract the display data from the data buffering module 116, so as to decode the target data according to the code rate parameter.

In this embodiment, the code rate parameter is a specific code rate reference value, for example, the code rate parameter is 800KHz (hertz) or 1.6MHz, and the like, and is not limited herein, and depends on the code rate at which the controller sends the display data. The data transmission of the present embodiment may be controlled by a clock signal.

In this embodiment, specifically, the controller sends the display data to the current-stage LED driving chip 110 in a dynamic rate mode, and when the current-stage LED driving chip 110 receives the display data, the rate detection module 115 detects a rate parameter corresponding to the display data, and the data buffer module 116 buffers the display data. After the detection of the code rate detection module 115 is completed, the decoding module 111 extracts the display data from the data buffer module 116, decodes the display data according to the code rate parameter, and sends the decoded display data to the display output module 113, so that the display output module 113 can control the LED lamp to display according to the decoded display data.

For example, a video file of a dynamic motion image has a first half with a frame rate of 60 and a second half with a frame rate of almost still picture of 10. Then, a common controller decodes the video and sends the decoded video to the LED driving chips 110 at a fixed rate of 800KHz for display, and each LED driving chip 110 needs to acquire 24-bit data for calculation, and when 1080 chips are cascaded, high-definition display can be realized, and the frame rate is 1S/(1080 × 24 × 1.25US) ═ 30.86 frames. The controller may transmit the display data with different code rates according to the requirement of the picture display, for example, when the picture is a high dynamic picture, the display data is transmitted with a code rate of 1.6MHz, and when the picture is almost static, the display data is transmitted with a code rate of 266 KHz. In addition, the controller sends display data in a dynamic code rate mode, the LED driving chip 110 performs adaptive decoding, a high dynamic picture adopts a high code rate to transmit larger data volume, a high frame rate picture is displayed, and a low code rate transmission is adopted when a static or slow motion picture is displayed, so that the power consumption is saved.

In an embodiment, the decoding module 111 is specifically configured to determine a decoding threshold associated with the code rate parameter, and decode the display data according to the decoding threshold.

Specifically, the decoding threshold refers to a threshold for decoding the display data, and is associated with the code rate parameter. The decoding threshold is 1/(the preset coefficient rate parameter), wherein the preset coefficient is greater than 1, that is, 1/the preset coefficient is less than 1. For example, the 1/preset coefficient may be 1/2, 1/3 or the like which is close to 1/2, for example, a number which is not more than 1/6 different from 1/2, or the like, and may be set as needed, and is not particularly limited herein. Preferably, the decoding threshold is 1/(2 × rate parameter). Illustratively, when the code rate parameter is 1Mbps, the period is 1us (microseconds), the preset coefficient is 2, the decoding threshold is 500ns (nanoseconds), and when the high level time of the data signal of the display data is 250ns less than 500ns in one time period, the binary code is 0; when the high level time is 750ns and is more than 500ns, the binary code is 1.

In one embodiment, specifically, the current-stage LED driving chip 110 sends data to the next-stage LED driving chip 110. It should be noted that the signal is sent to the next-stage LED driving chip 110 through the decoding module 111 of the LED driving chip 110. Specifically, after the decoding module 111 completes decoding the data, the data required by the remaining LED driving chips 110 is re-encoded and then sent to the next-stage LED driving chip 110, so that the remaining LED driving chips 110 can also receive the data normally.

In an embodiment, the LED driving chip 110 further includes a filtering module, which is disposed before the rate detection module 115 and the data buffering module 116, and is configured to filter the display data and send the filtered display data to the rate detection module 115 and the data buffering module 116. It should be noted that the data to be encoded to the following LED driving chip 110 should be transmitted with appropriate 0 and 1 data signals on the premise that the 0 code and the 1 code are as far away from the threshold as possible and are not filtered out by the glitch. For example, when the decoding threshold is 500ns, then code 0 is sent with a high time of 250ns in the middle and code 1 is sent with a high time of 750ns in the middle.

In addition, when data is transmitted from the previous LED driving chip 110 to the next LED driving chip 110 through the cascade line, due to a load of a transmission medium, a transmitted data signal is clipped, so that a low level time or a high level time of the data signal is narrowed, and if the clipping is too large, codes 0 and 1 may be considered as glitch noise to be filtered out or errors occur, such as 0 to 1, or 1 to 0, and therefore, the middle high level time needs to be adjusted. For error codes, the display screen can be caused to flash, and the playing effect is very poor. Specifically, when clipping is to clip a high level, the high level is narrowed and the low level is widened; when clipping is clipping low, it narrows the low level and widens the high level. The specific clipping method is related to the operation method, and the high level time and the low level time may be adjusted according to the type of clipping without being limited thereto.

Specifically, when the clipping is to clip the low level and the binary code is 0, the high level time is adjusted to make the high level time far away from the decoding threshold and the difference between the high level time and the decoding threshold is larger than the clipping amplitude; when the clipping is to clip the low level and the binary code is 1, adjusting the high level time to make the high level time close to the decoding threshold and the high level time larger than the decoding threshold; when clipping is to cut high level and the binary code is 0, adjusting the high level time to make the high level time close to the decoding threshold and the high level time smaller than the decoding threshold; when clipping is clipping high level and the binary code is 1, the high level time is adjusted to make the high level time far away from the decoding threshold and the difference between the high level time and the decoding threshold is larger than the clipping amplitude.

For example, when the decoding threshold is 500ns, a high time of 250ns is generally used as the data signal of code 0, and a high time of 750ns is used as the data signal of code 1. When the clipping is to lower the level and the coding is 0, the high level time can be adjusted to 150ns for transmission; when clipping is clipping low level and coding is 1, then the high level time can be adjusted to 650 ns; when clipping is clipping high level and coding is 0, the high level time can be adjusted to 350 ns; when clipping is clipping high and the code is 1, then the high time can be adjusted to 850 ns.

It is understood that a configuration data may be sent before transmitting the data to inform each LED driving chip 110 of the operation mode, so that the LED driving chip 110 re-encodes the data according to the clipping mode related to the operation mode and sends the data to the next LED driving chip 110.

Referring to fig. 5, fig. 5 is a schematic structural diagram of another LED driving chip provided in this embodiment. In this embodiment, the number of the decoding modules 111 is multiple, and the multiple decoding modules 111 sequentially receive data sent by the controller according to a preset time interval.

In this embodiment, each decoding module 111 is configured to receive data sent by the controller and decode the data. The number of decoding modules 111 can be increased as needed, and is not limited in particular. The plurality of decoding modules 111 means that the number of decoding modules 111 is at least two. It can be understood that, regardless of whether the input data is configuration data or display data, when a part of the plurality of decoding modules 111 is damaged or abnormal, as long as one decoding module 111 is normal, the input data can be normally received, normally decoded, and then configured or displayed.

For example, the video frame rate is 120, and assuming that the code stream of the highest-energy encoding and decoding of the decoding module 111 is 800KHz, 24 × 1.25US × 1080 is 32.4ms, that is, about 30 frame rates, that is, when 1080 LED driving chips 110 are cascaded, a single channel can only decode 30 frames of pictures, and a conventional single channel decoding 30 frames is a limit. However, according to the technical solution of the present embodiment, when the number of the decoding modules 111 is 4, the 4 × 30 frames (single decoding module 111) is 120 frames. On the premise of not improving the performance of a single decoding module 111, that is, on the premise of not improving the highest-energy encoding and decoding code stream of the decoding module 111 to 800KHz, the 4 decoding modules 111 can improve the display quality of the picture, and the picture display with the frame rate of 120 is achieved.

It should be noted that the decoding modules 111 sequentially receive the display data sent by the upper-level element according to a preset time interval, where the preset time interval is a ratio of a continuous display time of each frame of image data to a working quantity of the decoding modules 111. For example, assuming that each frame of image data is 32ms, there are 4 decoding modules 111 and 4 decoding modules 111 operate, the first frame of display data is sent to the first decoding module 111 first, after (32/4) equals 8ms, the second frame of display data is sent to the second decoding module 111, after 8ms, the third decoding module 111 sends the third frame of display data, and after 8ms, the fourth frame of display data is sent to the fourth decoding module 111. It can be understood that if there are 4 decoding modules 111, each frame data is 32ms, then if there are 1 decoding modules 111, then one frame data is refreshed every 32ms, and the frame rate is about 30, but if there are 4 decoding modules 111, then one frame data can be refreshed every 8ms, thereby improving the display frame rate of the video. It is understood that when the number of operations of the decoding module 111 is 2, one frame of image data is transmitted at an interval 32/2 of 16 ms.

According to the technical scheme of the embodiment of the invention, the LED drive circuit comprises n LED drive chips, wherein n is more than or equal to 2; one end of each LED driving chip is electrically connected with the positive electrode of the public power line; the other end of each LED driving chip is electrically connected with the negative electrode of the common power line; the controller is used for transmitting data to each LED driving chip in the form of an initial carrier signal at the anode of the public power line, so that the technical effects of reducing the complexity of an LED driving circuit and improving the stability of data transmission are achieved. In addition, the failure is only shown in that the LED lamp driven by the damaged LED driving chip is not turned on, and the dead spot can be quickly positioned.

Fig. 6 is a schematic structural diagram of an LED driving system according to an embodiment of the present invention. As shown in fig. 6, an embodiment of the present invention provides an LED driving system 10, which includes a controller 300 and an LED driving circuit 100.

Wherein:

the LED driving circuit 100 comprises n LED driving chips 110, wherein n is more than or equal to 2;

the controller 300 is connected to one end of each of the LED driving chips 110 through the anode 210 of the common power line, the controller 300 is connected to the other end of each of the LED driving chips 110 through the anode 210 of the common power line, and the controller 300 is configured to transmit data to each of the LED driving chips 110 at the anode 210 of the common power line in the form of an initial carrier signal.

It can be understood that, the LED driving circuit 100 in this embodiment may refer to the description of any one of the above embodiments, and this embodiment is not described in detail.

According to the technical scheme of the embodiment of the invention, the LED driving circuit of the LED driving system comprises the LED driving chips, wherein the LED driving circuit comprises n LED driving chips, wherein n is more than or equal to 2; one end of each LED driving chip is electrically connected with the positive electrode of the public power line; the other end of each LED driving chip is electrically connected with the negative electrode of the common power line; the controller is used for transmitting data to each LED driving chip in the form of an initial carrier signal at the anode of the public power line, so that the technical effects of reducing the complexity of an LED driving circuit and improving the stability of data transmission are achieved. In addition, the failure is only shown in that the LED lamp driven by the damaged LED driving chip is not turned on, and the dead spot can be quickly positioned.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. The LED driving circuit is characterized by comprising n LED driving chips, wherein n is more than or equal to 2;

2. The LED driving circuit according to claim 1, wherein the data comprises configuration data and/or display data;

3. The LED driving circuit according to claim 2, wherein each of the LED driving chips is pre-configured with an address, the LED driving chip comprising:

4. The LED driving circuit according to claim 3, wherein the LED driving chip further comprises:

5. The LED driving circuit according to claim 4, wherein the decoding module is specifically configured to decode to obtain a first digital code when the voltage of the initial carrier signal is higher than the voltage of the filtered carrier signal;

6. The LED driving circuit according to claim 5, wherein adjacent ones of the initial carrier signals are spaced apart by a level interval of a preset length.

7. The LED driving circuit according to claim 1, wherein the n LED driving chips are electrically connected in series, the LED driving chip of a first stage being electrically connected to the controller;

8. The LED driving circuit according to claim 3, wherein the LED driving chip further comprises:

the data buffer module is used for caching the display data;

9. The LED driving circuit according to claim 3, wherein the decoding module is plural;

10. An LED driving system comprising the LED driving circuit according to any one of claims 1 to 9, and further comprising a controller connected to one end of each of the LED driving chips through an anode of a common power line, the controller being connected to the other end of each of the LED driving chips through the anode of the common power line, the controller being configured to transmit data to each of the LED driving chips in the form of an initial carrier signal at the anode of the common power line.