CN111600565A - Filter circuit, signal processing device and method for manufacturing filter circuit - Google Patents
Filter circuit, signal processing device and method for manufacturing filter circuit Download PDFInfo
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- 229910000679 solder Inorganic materials 0.000 description 3
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 2
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- 229910052706 scandium Inorganic materials 0.000 description 1
- SIXSYDAISGFNSX-UHFFFAOYSA-N scandium atom Chemical compound [Sc] SIXSYDAISGFNSX-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
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Abstract
The application provides a filter circuit, a signal processing apparatus and a manufacturing method. Wherein, the filter circuit includes: the resonator comprises a plurality of resonators, wherein part of the resonators are arranged on a first wafer, the rest of the resonators are arranged on a second wafer, and a connecting part is arranged between the first wafer and the second wafer. By disposing a part of the plurality of resonators on the first wafer and disposing the remaining part of the plurality of resonators on the second wafer, the high roll-off characteristic on the left side can be realized without sacrificing the bandwidth, while the size of the chip is reduced.
Description
Technical Field
The present disclosure relates to the field of circuit element technologies, and in particular, to a filter circuit, a signal processing apparatus, and a method of manufacturing the filter circuit.
Background
In recent years, with the rapid development of the market, wireless communication terminals and devices are continuously being developed toward miniaturization, multi-mode-multi-band, and the number of duplexers for FDD (frequency division duplex) in wireless communication terminals is also increasing. The frequency of five-mode thirteen, even five-mode seventeen, gradually becomes the standard requirement of mainstream mobile phones, and particularly, with the approach of 5G business, the demand for high-performance and small-size filters and duplexers is increasing.
In the prior art, in order to achieve the purpose of size reduction, a broadband filter is manufactured on a wafer, and all resonators can only be realized by using the same piezoelectric layer material, so that the electromechanical coupling coefficients of the resonators in series and parallel positions are basically equivalent and cannot be different by too much (such as more than 0.5%). If the bandwidth and the insertion loss of the filter are ensured, the electromechanical coupling coefficient of the resonator needs to be increased as much as possible; on the other hand, if the filter is considered to be suppressed from the low-frequency side coexisting band, the electromechanical coupling coefficient of the parallel resonance needs to be reduced. In addition, in the prior art, in order to improve the roll-off, a mass load is added on the parallel resonator to realize that fp of the parallel resonator is far lower than fs of the series resonator, but when the mass load is added to be larger, the Q value of the resonator tends to be deteriorated.
Therefore, how to make the size of the filter small while achieving better roll-off characteristics becomes an urgent problem to be solved by filter design engineers.
Disclosure of Invention
In view of the above, the present application provides a filter circuit, a signal processing apparatus, and a method of manufacturing the filter circuit.
Specifically, the method is realized through the following technical scheme:
in a first aspect, an embodiment of the present application provides a filter circuit, including: the resonator comprises a plurality of resonators, wherein part of the resonators are arranged on a first wafer, the rest of the resonators are arranged on a second wafer, and a connecting part is arranged between the first wafer and the second wafer.
Optionally, the plurality of resonators comprises: a first number of first resonators connected in series, a second number of second resonators each connected between one end of one of the first resonators and a ground point, and a bandwidth adjusting device; the plurality of first resonators and the broadband adjusting device are disposed on a first wafer, and the plurality of second resonators are disposed on a second wafer.
Optionally, the bandwidth adjusting device comprises: the third resonators are connected to a node between any two first resonators and one end of each inductor, the other end of each inductor is connected with a grounding point, and the plurality of first resonators and the plurality of third resonators are arranged on a first wafer.
Optionally, the bandwidth adjusting device comprises: the output ends of the two third resonators are connected with the input end of the inductor, the input ends of the two third resonators are respectively connected to the connection point of the two first resonators, the output end of the inductor is connected with a grounding point, and the plurality of first resonators and the plurality of third resonators are arranged on the first wafer.
Optionally, the bandwidth adjusting device comprises: the output end of the inductor is connected with a grounding point, the input end of the inductor is connected to any two first resonator connecting points through a conducting wire, and the plurality of first resonators and the conducting wire are arranged on the first wafer.
Optionally, the connecting member comprises: and the bonding regions are arranged between the first wafer and the second wafer.
In a second aspect, an embodiment of the present application provides a signal processing apparatus, including: a signal input circuit, a signal output circuit, and a filter circuit as described in the first aspect; the signal input circuit is connected with the filter circuit, and the filter circuit is connected with the signal output circuit.
In a third aspect, an embodiment of the present application provides a method for manufacturing a filter circuit, where the filter circuit includes: a plurality of resonators, the method comprising:
and arranging part of the resonators on a first wafer, arranging the rest resonators on a second wafer, and arranging a connecting part between the first wafer and the second wafer.
Optionally, the plurality of resonators comprises: a first number of first resonators connected in series, a second number of second resonators each connected between one end of one of the first resonators and a ground point, and a bandwidth adjusting device;
the disposing some of the resonators of the plurality of resonators on a first wafer and disposing the remaining resonators of the plurality of resonators on a second wafer comprises:
the plurality of first resonators and the broadband adjusting device are disposed on a first wafer, and the plurality of second resonators are disposed on a second wafer.
Optionally, the bandwidth adjusting device comprises: the third resonators are connected to a node between any two first resonators and one end of the inductor, and the other end of the inductor is connected with a grounding point; the disposing the plurality of first resonators and the broadband adjusting device on a first wafer includes:
disposing the plurality of first resonators and the third resonator on a first wafer.
Optionally, the bandwidth adjusting device comprises: the output ends of the two third resonators are connected with the input end of the inductor, the input ends of the two third resonators are respectively connected to the connection points of the two first resonators, and the output end of the inductor is connected with a grounding point;
the disposing the plurality of first resonators and the broadband adjusting device on a first wafer includes:
disposing the plurality of first resonators and the third resonator on the first wafer.
Optionally, the bandwidth adjusting device comprises: the output end of the inductor is connected with a grounding point, and the input end of the inductor is connected to any two first resonator connecting points through a lead;
the disposing the plurality of first resonators and the broadband adjusting device on a first wafer includes:
disposing the plurality of first resonators and the conductive lines on the first wafer.
Optionally, the disposing a connecting member between the first wafer and the second wafer includes:
and arranging a plurality of bonding regions between the first wafer and the second wafer.
According to the filter circuit, the signal processing device and the method for manufacturing the filter circuit, a part of resonators in the resonators are arranged on the first wafer, and the rest of resonators are arranged on the second wafer, so that the following positive effects are achieved: the size of the chip is reduced, and miniaturization is realized; the resonator kt at the parallel position can be allowed to be reduced, the better roll-off characteristic at the left side is realized, and the performance of the resonator is ensured.
Drawings
Fig. 1 is a schematic diagram of a filter circuit in the prior art.
FIG. 2 is a side view of the filter circuit shown in FIG. 1 described above;
FIG. 3 is a prior art impedance schematic of the filter circuit of FIG. 1;
FIG. 4 is a schematic diagram of a filter circuit provided in an embodiment of the present application;
FIG. 5 is a side view of the filter circuit shown in FIG. 4 above;
FIG. 6 is a bottom view of two wafers of the filter circuit shown in FIG. 4;
FIG. 7a is a graph illustrating the amplitude-frequency characteristics of the filter circuit shown in FIG. 4;
FIG. 7b is a schematic of a passband curve of the filter circuit shown in FIG. 4;
fig. 8 is a schematic structural diagram of a filter circuit provided in an embodiment of the present application;
fig. 9 is a schematic structural diagram of a filter circuit according to yet another embodiment of the present application;
fig. 10 is a schematic structural diagram of a filter circuit according to yet another embodiment of the present application.
FIGS. 11(a) and 11(b) are electrical symbols and equivalent electrical model diagrams of BAW;
fig. 12 is a diagram showing the relationship between the resonator impedance and fs and fp.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
Fig. 11(a) is an electrical symbol diagram of a piezoelectric acoustic wave resonator, and fig. 11(b) is an equivalent electrical model diagram thereof, in which an electrical model is simplified to a resonance circuit composed of Lm, Cm, and C0 without considering a loss term. According to the resonance condition, the resonance circuit has two resonance frequency points: one is f when the impedance value of the resonant circuit reaches a minimum valuesA 1 is to fsDefining the resonance frequency point of the resonator in series; the other is f when the impedance value of the resonance circuit reaches a maximum valuepA 1 is to fpDefined as the parallel resonance frequency point of the resonator. Wherein the content of the first and second substances,
and, fsRatio fpIs small. At the same time, the effective electromechanical coupling coefficient Kt of the resonator is defined2 effIt may be used with fsAnd fpTo show that:
FIG. 12 shows resonator impedance vs. fsAnd fpThe relationship between them. At a particular frequency, the greater the effective electromechanical coupling coefficient, the greater fsAnd fpThe larger the frequency difference, i.e. the further apart the two resonance frequency points are.
The bandwidth of a common ladder filter mainly depends on the difference between the series resonance frequency and the parallel resonance frequency of the resonators included in the filter, or on the effective electromechanical coupling coefficient of the resonators included in the filter, and in order to realize a filter with a wider bandwidth, a method is required to increase the effective electromechanical coupling coefficient of the resonators. However, the electromechanical coupling coefficient is related to various factors and cannot be increased without limit according to the needs of users. For example, an FBAR resonator manufactured by using aluminum nitride (AlN) as a piezoelectric material has an effective electromechanical coupling coefficient of about 7.2% at most, and a band-pass filter manufactured by using the FBAR resonator generally has a relative bandwidth of about 4.5% at most. If special elements are doped into the piezoelectric layer, for example, scandium (Sc) with different concentrations is doped into aluminum nitride (AlN), the effective electromechanical coupling coefficient of the resonator can be increased to about 15%, and the relative bandwidth of the bandpass filter manufactured by the resonator can reach about 8% at most.
However, in order to meet the requirements of high cell capacity and large data transmission rate, some communication frequency bands need to be allocated with wider communication frequency bands, such as the 41 th frequency Band (Band 41) divided according to the 3GPP protocol, the passband ranges from 2496MHz to 2690MHz, the bandwidth of 194MHz is provided, the relative bandwidth is as high as 7.5%, and at the same time, a higher suppression degree is required for the WLAN (2402.5MHz to 2481.5MHz) frequency Band on the low frequency side. In this case, a special method can be adopted to realize such a high-bandwidth high-rejection band-pass filter, and the circuit diagram thereof is shown in fig. 1.
In the prior art, for the filter circuit shown in fig. 1, the portion 100 in the dashed box is provided entirely on the upper wafer. The filter circuit is provided with a broadband adjusting device which comprises an inductor and a third resonator SP1, one end of the third resonator SP1 is connected with the connection point of the first resonator S2 and the first resonator S3, the other end of the third resonator SP1 is connected with the input end of the inductor, and the output end of the inductor is connected with a grounding point.
Fig. 2 is a side view of the filter circuit shown in fig. 1, and as shown in fig. 2, the filter circuit includes an upper wafer 101 and a lower wafer 102, an upper wafer bonding region and a lower wafer bonding region are disposed between the upper wafer 101 and the lower wafer 102, the FBAR is disposed on the upper wafer 101, a sealing ring is disposed between the upper wafer 101 and the lower wafer 102, a wafer via hole is disposed on the lower wafer, the wafer via hole is connected to a solder ball, the solder ball is disposed between the lower wafer 102 and a substrate, a substrate via hole is disposed on the substrate, and the substrate via holes disposed on two sides of the substrate are respectively connected to an input terminal and an output.
Fig. 3 is a schematic impedance diagram of the filter circuit shown in fig. 1 in the prior art. Wherein f of the parallel resonatorpFar below f of the series resonatorsThis is mainly achieved by adding a Mass Load (Mass Load) on the parallel resonator. When the mass load is large, the Q value of the resonator tends to deteriorate.
In the prior art, the wideband filter is implemented on a wafer, and all resonators can only be implemented by using the same piezoelectric layer material, so that the electromechanical coupling coefficients of the resonators in series and parallel positions are basically equivalent and cannot differ too much (for example, more than 0.5%). If the bandwidth and the insertion loss of the filter are ensured, the electromechanical coupling coefficient of the resonator needs to be increased as much as possible; on the other hand, if the filter is considered to be suppressed from the low-frequency side coexisting band, the electromechanical coupling coefficient of the parallel resonance needs to be reduced.
Therefore, how to achieve better roll-off characteristics and make the size small becomes a problem to be solved urgently by filter design engineers. Based on this, the embodiment of the application provides a filter circuit, a signal processing device and a method for manufacturing the filter circuit. The technology of the present invention is described below with reference to specific examples.
Fig. 4 is a schematic structural diagram of a filter circuit provided in an embodiment of the present application. The filter circuit comprises: the resonator comprises a plurality of resonators, wherein part of the resonators are arranged on a first wafer, the rest of the resonators are arranged on a second wafer, and a connecting part is arranged between the first wafer and the second wafer. Referring to fig. 4, specifically, the upper wafer is referred to as a first wafer, the lower wafer is referred to as a second wafer, and the FBAR resonators are simultaneously formed on the first wafer 201 and the second wafer 202.
Specifically, the filter circuit includes: the broadband tunable resonator comprises four first resonators S1, S2, S3 and S4 connected in series, three second resonators P1, P2 and P3 connected in parallel, and a bandwidth adjusting device, wherein the resonance frequency of the resonators of the bandwidth adjusting device is the same as or very close to that of the first resonators, and therefore the resonators can be conveniently arranged on the same wafer. In this embodiment, the bandwidth adjusting device includes: a third resonator SP1 and an inductor, each of the second resonators being connected between one end of one of the first resonators and the ground point; four first resonators and three second resonators are disposed on the first wafer 201, and three second resonators are disposed on the second wafer 202.
Optionally, the electromechanical coupling coefficient of all the first resonators and the third resonators is 12%, and the electromechanical coupling coefficient of all the second resonators is 7%. The reduction of the electromechanical coupling coefficient of the second resonator is beneficial to improving the roll-off of the left edge of the filter, so that the suppression degree of a left Wi-Fi frequency band is improved, the increase of the electromechanical coupling coefficient of the first resonator compensates for the bandwidth loss and impedance mismatch brought by the reduction of the first resonator, and the passband insertion loss performance of the filter is ensured to be not deteriorated or even better.
In the embodiment of the application, the filter is mainly realized in a series-parallel folding mode, so that a first resonator and a third resonator can be arranged on one wafer, a second resonator is arranged on the other wafer, the electromechanical coupling coefficients of the resonators on the two wafers can be different greatly, the electromechanical coupling coefficients of the resonators on the two wafers are mainly smaller than those of the resonators on the series, the high roll-off characteristic on the left side can be realized under the condition of not sacrificing the bandwidth, and the size of a chip is reduced.
Fig. 5 is a side view of the filter circuit shown in fig. 4, and referring to fig. 4, a series FBAR resonator (first resonator) is provided on a first wafer 201, and a parallel FBAR resonator is provided on a second wafer 202.
Fig. 6 is a bottom view of two wafers of the filter circuit shown in fig. 4, where new bonding regions J1, J2, J3 are added at the positions of the series-parallel fractures, and the new bonding regions are only used to connect the first wafer 201 and the second wafer 202 together, and do not need to be connected to the outside of the chip through vias, so that the shapes of the bonding regions are different from those of the bonding regions connected with the vias, and the areas of the bonding regions are only half. The dashed circles indicate the locations of the die solder balls connected to the nearby wafer vias.
Fig. 7a is a schematic diagram of an amplitude-frequency characteristic curve of the filter circuit shown in fig. 4, in which a solid line is a comparison design, and a dotted line is a curve of this embodiment, and due to the adoption of this design scheme, the roll-off at the left edge of the filter is improved, so that the comparison design can only achieve an inhibition degree of 2402MHz to 2472MHz of 45dB, but this embodiment can achieve an inhibition degree of 2402MHz to 2479MHz of 45dB, and the inhibition at 2481MHz is also improved from the original 8dB to 20 dB.
Fig. 7b is a schematic diagram of a passband curve of the filter circuit shown in fig. 4, in which a solid line is a comparative design, and a dotted line is a curve of this embodiment, and due to the adoption of the design scheme, the roll-off at the left edge of the filter is improved, so that the insertion loss at the left side of the passband is improved from-2.47 dB to-2.24 dB and is improved by 0.23dB compared with the comparative design.
Optionally, the bandwidth adjusting device includes: the third resonators are connected to a node between any two first resonators and one end of each inductor, the other end of each inductor is connected with a grounding point, and the plurality of first resonators and the plurality of third resonators are arranged on a first wafer.
Fig. 8 is a schematic structural diagram of a filter circuit provided in an embodiment of the present application, and referring to the filter circuit shown in fig. 8, the bandwidth adjusting device includes two third resonators SP1, SP2 and two inductors, wherein one of the third resonators SP1 is connected in series with one inductor and then connected to a connection point between the two first resonators S2 and S3, and the other of the third resonators SP3 is connected in series with one inductor and then connected to a connection point between the first resonators S3 and S4.
In this embodiment, the first resonator and the third resonator are disposed on the first wafer 301, and the second resonators P1, P2, P3, and P4 are disposed on the second wafer 302.
Fig. 9 is a schematic structural diagram of a filter circuit according to yet another embodiment of the present application; referring to fig. 9, the bandwidth adjusting device includes: two third resonators SP1, SP2 and an inductor, the inductance value of which is greater than 1nH, for example, in the range of 1-10 nH. The output ends of the two third resonators SP1 and SP2 are connected with the input ends of the inductor, the input ends of the two third resonators SP1 and SP2 are respectively connected to two first resonator connection points, one end of the specific third resonator SP1 is connected to a connection point between the first resonators S2 and S3, and the third resonator SP2 is connected to a connection point between the first resonators S3 and S4. The output end of the inductor is connected with a grounding point, and the plurality of first resonators and the plurality of third resonators are arranged on the first wafer.
Fig. 10 is a schematic structural diagram of a filter circuit according to yet another embodiment of the present application, where the bandwidth adjusting device includes: in the present embodiment, the first resonators S1, S2, S3, S4 and the conductive lines are disposed on the first wafer.
An embodiment of the present application further provides a signal processing apparatus, including: a signal input circuit, a signal output circuit and the filter circuit described in any of the above embodiments; the signal input circuit is connected with the filter circuit, and the filter circuit is connected with the signal output circuit.
An embodiment of the present application further provides a method for manufacturing a filter circuit, including: a plurality of resonators, the method comprising:
and arranging part of the resonators on a first wafer, arranging the rest resonators on a second wafer, and arranging a connecting part between the first wafer and the second wafer.
Optionally, the plurality of resonators comprises: a first number of first resonators connected in series, a second number of second resonators connected in parallel, each of the second resonators being connected between one end of one of the first resonators and a ground point, and a bandwidth adjusting device; and setting the resonant frequency of the broadband adjusting device to be the same as or similar to the first resonator;
the disposing some of the resonators of the plurality of resonators on a first wafer and disposing the remaining resonators of the plurality of resonators on a second wafer comprises:
the plurality of first resonators and the broadband adjusting device are disposed on a first wafer, and the plurality of second resonators are disposed on a second wafer.
Optionally, the bandwidth adjusting device comprises: the inductance value of the inductor is more than 1nH, the third resonator is connected with a node between any two first resonators and one end of the inductor, and the other end of the inductor is connected with a grounding point; the disposing the plurality of first resonators and the broadband adjusting device on a first wafer includes:
disposing the plurality of first resonators and the third resonator on a first wafer.
Optionally, the bandwidth adjusting device comprises: the output ends of the two third resonators are connected with the input end of the inductor, the input ends of the two third resonators are respectively connected to the connection points of the two first resonators, and the output end of the inductor is connected with a grounding point;
the disposing the plurality of first resonators and the broadband adjusting device on a first wafer includes:
disposing the plurality of first resonators and the third resonator on the first wafer.
In this embodiment, the filter circuit is implemented in a serial-parallel folding manner, so that the first resonator and the third resonator can be fabricated on one wafer, and the second resonator can be fabricated on the other wafer, the electromechanical coupling coefficients of the resonators on the two wafers can have a larger difference, mainly, the electromechanical coupling coefficient of the parallel resonator can be much smaller than that of the series resonator, so that the high roll-off characteristic on the left side can be implemented without sacrificing the bandwidth, and the size of the chip is reduced. Therefore, the following positive effects are achieved: the size of the chip is reduced, and miniaturization is realized; the resonator kt at the parallel position can be allowed to be reduced, the better roll-off characteristic at the left side is realized, and the performance of the resonator is ensured.
Optionally, the bandwidth adjusting device comprises: the output end of the inductor is connected with a grounding point, and the input end of the inductor is connected to any two first resonator connecting points through a lead;
the disposing the plurality of first resonators and the broadband adjusting device on a first wafer includes:
disposing the plurality of first resonators and the conductive lines on the first wafer.
Optionally, the disposing a connecting member between the first wafer and the second wafer includes:
and arranging a plurality of bonding regions between the first wafer and the second wafer.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.
Claims (13)
1. A filter circuit, comprising: the resonator comprises a plurality of resonators, wherein part of the resonators are arranged on a first wafer, the rest of the resonators are arranged on a second wafer, and a connecting part is arranged between the first wafer and the second wafer.
2. The filter circuit of claim 1, wherein the plurality of resonators comprises: a first number of first resonators connected in series, a second number of second resonators connected in parallel, each of the second resonators being connected between one end of one of the first resonators and a ground point, and a bandwidth adjusting device; the resonance frequency of the broadband adjusting device is the same as or similar to that of the first resonator, the plurality of first resonators and the broadband adjusting device are arranged on a first wafer, and the plurality of second resonators are arranged on a second wafer.
3. The filter circuit of claim 2, wherein the bandwidth adjusting device comprises: the inductance value of the inductor is larger than 1nH, the third resonator is connected to a node between any two first resonators and one end of the inductor, the other end of the inductor is connected with a grounding point, and the first resonators and the third resonators are arranged on a first wafer.
4. The filter circuit of claim 2, wherein the bandwidth adjusting device comprises: the output ends of the two third resonators are connected with the input end of the inductor, the input ends of the two third resonators are respectively connected to the connection point of the two first resonators, the output end of the inductor is connected with a grounding point, and the plurality of first resonators and the plurality of third resonators are arranged on the first wafer.
5. The filter circuit of claim 2, wherein the bandwidth adjusting device comprises: the output end of the inductor is connected with a grounding point, the input end of the inductor is connected to any two first resonator connecting points through a conducting wire, and the plurality of first resonators and the conducting wire are arranged on the first wafer.
6. The filter circuit according to claim 1, wherein the connection means comprises: and the bonding regions are arranged between the first wafer and the second wafer.
7. A signal processing apparatus characterized by comprising: a signal input circuit, a signal output circuit and a filter circuit as claimed in any one of claims 1 to 6; the signal input circuit is connected with the filter circuit, and the filter circuit is connected with the signal output circuit.
8. A method of filter circuit fabrication, comprising: a plurality of resonators, wherein the method comprises:
and arranging part of the resonators on a first wafer, arranging the rest resonators on a second wafer, and arranging a connecting part between the first wafer and the second wafer.
9. The method of claim 8, wherein the plurality of resonators comprises: a first number of first resonators connected in series, a second number of second resonators connected in parallel, each of the second resonators being connected between one end of one of the first resonators and a ground point, and a bandwidth adjusting device; and setting the resonant frequency of the broadband adjusting device to be the same as or similar to the first resonator;
the disposing some of the resonators of the plurality of resonators on a first wafer and disposing the remaining resonators of the plurality of resonators on a second wafer comprises:
the plurality of first resonators and the broadband adjusting device are disposed on a first wafer, and the plurality of second resonators are disposed on a second wafer.
10. The method of claim 9, wherein the bandwidth adjusting device comprises: the inductance value of the inductor is more than 1nH, the third resonator is connected with a node between any two first resonators and one end of the inductor, and the other end of the inductor is connected with a grounding point; the disposing the plurality of first resonators and the broadband adjusting device on a first wafer includes:
disposing the plurality of first resonators and the third resonator on a first wafer.
11. The method of claim 9, wherein the bandwidth adjusting device comprises: the output ends of the two third resonators are connected with the input end of the inductor, the input ends of the two third resonators are respectively connected to the connection points of the two first resonators, and the output end of the inductor is connected with a grounding point;
the disposing the plurality of first resonators and the broadband adjusting device on a first wafer includes:
disposing the plurality of first resonators and the third resonator on the first wafer.
12. The method of claim 9, wherein the bandwidth adjusting device comprises: the output end of the inductor is connected with a grounding point, and the input end of the inductor is connected to any two first resonator connecting points through a lead;
the disposing the plurality of first resonators and the broadband adjusting device on a first wafer includes:
disposing the plurality of first resonators and the conductive lines on the first wafer.
13. The method of claim 8, wherein providing a connection between the first wafer and the second wafer comprises:
and arranging a plurality of bonding regions between the first wafer and the second wafer.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010006598.0A CN111600565A (en) | 2020-01-03 | 2020-01-03 | Filter circuit, signal processing device and method for manufacturing filter circuit |
| PCT/CN2020/140934 WO2021136281A1 (en) | 2020-01-03 | 2020-12-29 | Filter circuit, signal processing device, and filter circuit manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010006598.0A CN111600565A (en) | 2020-01-03 | 2020-01-03 | Filter circuit, signal processing device and method for manufacturing filter circuit |
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Cited By (5)
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| WO2021136281A1 (en) * | 2020-01-03 | 2021-07-08 | 诺思(天津)微系统有限责任公司 | Filter circuit, signal processing device, and filter circuit manufacturing method |
| WO2021136282A1 (en) * | 2020-01-03 | 2021-07-08 | 诺思(天津)微系统有限责任公司 | Filter, signal processing device, and method for manufacturing the filter |
| CN113411069A (en) * | 2021-06-03 | 2021-09-17 | 成都频岢微电子有限公司 | Bulk acoustic wave filter device and method for improving out-of-band rejection |
| CN114866064A (en) * | 2022-07-06 | 2022-08-05 | 深圳新声半导体有限公司 | Multi-layer thin film filter with different Sc concentrations and preparation method thereof |
| WO2023199860A1 (en) * | 2022-04-12 | 2023-10-19 | 株式会社村田製作所 | High-frequency module, communication device, and filter |
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| WO2017219251A1 (en) * | 2016-06-21 | 2017-12-28 | 诺思（天津）微系统有限公司 | Trapezoidal broadband piezoelectric filter |
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| WO2021136282A1 (en) * | 2020-01-03 | 2021-07-08 | 诺思(天津)微系统有限责任公司 | Filter, signal processing device, and method for manufacturing the filter |
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| WO2023199860A1 (en) * | 2022-04-12 | 2023-10-19 | 株式会社村田製作所 | High-frequency module, communication device, and filter |
| CN114866064A (en) * | 2022-07-06 | 2022-08-05 | 深圳新声半导体有限公司 | Multi-layer thin film filter with different Sc concentrations and preparation method thereof |
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| WO2021136281A1 (en) | 2021-07-08 |
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