CN111600501B - PWM carrier synchronization method applied to power electronic transformer - Google Patents
PWM carrier synchronization method applied to power electronic transformer Download PDFInfo
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- CN111600501B CN111600501B CN202010386791.1A CN202010386791A CN111600501B CN 111600501 B CN111600501 B CN 111600501B CN 202010386791 A CN202010386791 A CN 202010386791A CN 111600501 B CN111600501 B CN 111600501B
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- 238000000034 method Methods 0.000 title claims abstract description 24
- 230000001360 synchronised effect Effects 0.000 claims abstract description 79
- 238000002955 isolation Methods 0.000 claims abstract description 33
- 239000013307 optical fiber Substances 0.000 claims description 14
- 230000010363 phase shift Effects 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 238000012546 transfer Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000005674 electromagnetic induction Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/493—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode the static converters being arranged for operation in parallel
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
- H02J3/40—Synchronising a generator for connection to a network or to another generator
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]
Abstract
The invention discloses a PWM carrier synchronization method applied to a power electronic transformer, and belongs to the field of control of power electronic transformers. The method comprises the steps that a control unit FPGA takes a self time base as the time base of a PWM period counter of an input stage submodule and an isolation stage DC-DC module, generates required synchronous pulse signals at specific PWM period counting moments respectively, codes the signals into synchronous K code bytes and sends the synchronous K code bytes to corresponding modules; and the input stage submodule receives the synchronous K code byte and then decodes the synchronous K code byte into a synchronous pulse signal, and updates a carrier counting register to realize the carrier synchronization of the input stage submodule. And the isolation level DC-DC module receives the synchronous K code byte and converts the synchronous K code byte into a corresponding synchronous pulse signal, and updates a carrier counting register to complete carrier synchronization of the isolation level DC-DC module. The method realizes the carrier full-synchronization function of the control unit FPGA, the input stage submodule and the isolation stage DC-DC module, reduces the complexity and cost of system hardware, and ensures the stable operation of the system.
Description
Technical Field
The invention relates to the field of power electronic transformer control, in particular to a PWM carrier synchronization method applied to a power electronic transformer.
Background
The power electronic transformer is a novel intelligent transformer which utilizes the power electronic conversion technology and the electromagnetic induction principle to realize voltage conversion and energy transfer in a power system, and the design idea is to replace a power frequency transformer with a high-frequency transformer. The power electronic transformer is used as a comprehensive energy management node, can realize functions of voltage grade conversion, input and output electrical isolation, energy transfer and the like, and also has functions of new energy grid connection, harmonic wave treatment, reactive compensation, power grid interconnection and the like. Therefore, the power electronic transformer can be widely applied to the fields of multi-distributed renewable energy access, intelligent micro-grids, power distribution systems, energy Internet and the like, and has important significance for improving the power quality of power grids, improving the utilization rate of comprehensive energy sources and enhancing the flexible access and flexible networking capacity of the systems.
The Modular Multilevel Converter (MMC) based three-level power electronic transformer is widely applied to the field of high-voltage direct-current power transmission and distribution, and has the advantages of flexible and adjustable module quantity and voltage level, multi-port access and the like. The purpose of electrical isolation communication is met by adopting an optical fiber medium between a control unit and a power unit, if the time of a Pulse Width Modulation (PWM) carrier between the power units of the system is different, the three-phase grid-connected current is distorted, and even the system overcurrent fault is caused, so that the synchronization of the PWM carrier between the power units plays a key role in realizing the functions of a power electronic transformer system.
In the traditional optical fiber synchronization method, one method is to increase an extra connecting wire to transmit a synchronization signal, so that the difficulty and the cost of wiring are increased, and the other method is to adopt an analog circuit to extract an optical fiber clock as a PWM carrier counting time base to realize synchronization, so that the hardware complexity is increased, and meanwhile, a larger challenge is provided for the interference suppression.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a PWM carrier synchronization method applied to a power electronic transformer, which is used for solving the problems of complex hardware design and cost increase in the traditional optical fiber synchronization method, reducing the cost and simplifying the complexity of hardware design.
In order to achieve the above object, the present invention provides a PWM carrier synchronization method applied to a power electronic transformer, which is characterized by comprising the following steps:
step 1: the control unit FPGA uses self time base as the time base of the input stage submodule carrier phase shift PWM period counter and the isolation stage DC-DC module PWM period counter, generates required synchronous pulse signals at the specific time of PWM period counting respectively, generates synchronous K code bytes according to 8B/10B coding rule coding, and sends the synchronous K code bytes to the corresponding input stage submodule and the isolation stage DC-DC module;
step 2: the input-stage submodule receives the synchronous K code bytes sent by the control unit FPGA and then decodes and converts the synchronous K code bytes into synchronous pulse signals;
and step 3: the input stage submodule updates the PWM carrier counting register to a compensation value according to the synchronous pulse signal so as to realize the PWM carrier synchronization of the input stage submodule;
and 4, step 4: the isolation level DC-DC module receives the synchronous K code bytes sent by the control unit FPGA and then decodes the synchronous K code bytes to convert the synchronous K code bytes into synchronous pulse signals;
and 5: the PWM carrier counting register is updated to a compensation value by the synchronous pulse signal, so that the PWM carrier synchronization of the isolation-level DC-DC module is realized, and the PWM full-synchronization function of the power electronic transformer system is realized;
the control unit FPGA generates required synchronous pulse signals at the end time of the carrier phase shift PWM period of the input-stage submodule, generates required synchronous pulse signals at the end time of the PWM period of the isolation-stage DC-DC module, and the two synchronous pulse signals generate different synchronous K code bytes according to the 8B/10B coding rule and are respectively sent to the input-stage submodule and the isolation-stage DC-DC module.
The input stage submodule receives the synchronous K code byte sent by the control unit FPGA through the optical fiber, the synchronous K code byte is converted into a synchronous pulse signal through decoding, and the input stage submodule carrier PWM counting register is updated according to the synchronous pulse signal to complete the carrier signal synchronization of the input stage.
The isolation level DC-DC module receives the synchronous K code bytes sent by the control unit through the optical fiber, decodes the synchronous K code bytes into corresponding synchronous pulse signals, and updates the isolation level DC-DC carrier PWM counting register according to the synchronous pulse signals to realize the carrier signal synchronization of the isolation level.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate exemplary embodiments of the application and, together with the description, serve to explain the application and are not intended to limit the application
FIG. 1 is a power electronic transformer topology structure diagram applied to the PWM carrier synchronization method of the power electronic transformer
FIG. 2 is a control block diagram of a power electronic transformer system applied to a PWM carrier synchronization method of the power electronic transformer according to the present invention
FIG. 3 is a flowchart of carrier synchronization control for power electronic transformer according to the PWM carrier synchronization method of the present invention
Detailed Description
Hereinafter, embodiments of the present invention will be further described with reference to the accompanying drawings. It should be noted that the following description is merely exemplary in nature and is in no way intended to limit the scope of the invention or its applications.
Fig. 1 shows a topology structure diagram of a power electronic transformer, which is composed of three-stage topology of an input stage, an isolation stage and an output stage.
As shown in fig. 2, which is a control diagram of the power electronic transformer system, the control unit FPGA generates a synchronization signal pulse, and encodes the synchronization signal pulse and sends the encoded synchronization signal pulse to the input stage submodule and the isolation stage DC-DC module, respectively.
As shown in fig. 3, which is a flow chart of system PWM carrier synchronization control, the method in fig. 3 is as follows:
step 1: the control unit FPGA respectively generates synchronous pulse signals at the specific carrier phase-shifting PWM period counting time of each input-stage submodule and the specific carrier PWM period counting time of the isolation-stage DC-DC module, encodes the synchronous pulse signals by using an 8B/10B encoding rule to generate synchronous K code bytes, and respectively transmits the synchronous K code bytes to the input-stage submodule and the isolation-stage DC-DC module through optical fibers;
specifically, the control unit FPGA generates a carrier phase shift PWM synchronous pulse signal at a specific counting time of a carrier phase shift period register of the input stage submodule, encodes the synchronous pulse signal into K28.2 synchronous K code bytes, and transmits the K28.2 synchronous K code bytes to the input stage submodule through an optical fiber. And when the carrier period register of the isolation level DC-DC module counts to a specific moment, generating a required carrier PWM synchronous pulse signal, encoding the required carrier PWM synchronous pulse signal into K28.6 synchronous K code bytes, and sending the K28.6 synchronous K code bytes to the isolation level DC-DC module.
Step 2: the isolation level sub-module decodes the received synchronous K code bytes transmitted by the optical fiber into carrier phase-shifting PWM synchronous pulse signals;
and step 3: the input stage submodule updates the PWM carrier counting register to a compensation value according to the synchronous pulse signal so as to realize the PWM carrier synchronization of the input stage submodule;
specifically, the input stage submodule receives K28.2 synchronous K code bytes sent by the control unit FPGA through an optical fiber, converts the K code bytes into corresponding synchronous pulse signals through table lookup, and updates a PWM carrier counting register into a compensation value according to the synchronous pulse signals, so that PWM carrier synchronization of the input stage submodule is realized.
And 4, step 4: the isolation level DC-DC module receives the synchronous K code byte transmitted by the optical fiber and then decodes the synchronous K code byte into a synchronous pulse signal;
and 5: the synchronous pulse signal updates the PWM carrier counting register to a compensation value, so that PWM carrier synchronization of the isolation level DC-DC module is realized, and the PWM full-synchronization function of the power electronic transformer system is realized;
specifically, after receiving the K28.6 synchronous K code bytes sent by the control unit FPGA through the optical fiber, the isolation-level DC-DC module converts the K28.6 synchronous K code bytes into synchronous pulse signals through table lookup, and updates the PWM carrier count register to a compensation value according to the synchronous pulse signals, thereby realizing PWM carrier synchronization of the isolation-level DC-DC module.
The PWM carrier synchronization method realizes the PWM carrier full synchronization function of the control unit FPGA, the input stage submodule and the isolation stage DC-DC module of the system, and ensures the stable operation of the power electronic transformer system.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (5)
1. A PWM carrier synchronization method applied to a power electronic transformer is characterized by comprising the following steps:
step 1: the control unit FPGA uses self time base as the time base of the input stage submodule carrier phase shift PWM period counter and the isolation stage DC-DC module PWM period counter, generates required synchronous pulse signals at the specific time of PWM period counting respectively, generates synchronous K code bytes according to 8B/10B coding rule coding, and sends the synchronous K code bytes to the corresponding input stage submodule and the isolation stage DC-DC module;
and 2, step: the input stage submodule receives the synchronous K code bytes sent by the control unit FPGA and then decodes and converts the synchronous K code bytes into synchronous pulse signals;
and step 3: the input stage submodule updates the PWM carrier counting register to a compensation value according to the synchronous pulse signal so as to realize the PWM carrier synchronization of the input stage submodule;
and 4, step 4: the isolation level DC-DC module receives the synchronous K code bytes sent by the control unit FPGA and then decodes the synchronous K code bytes to convert the synchronous K code bytes into synchronous pulse signals;
and 5: the PWM carrier counting register is updated to a compensation value by the synchronous pulse signal, so that the PWM carrier synchronization of the isolation-level DC-DC module is realized, and the PWM full-synchronization function of the power electronic transformer system is realized.
2. The PWM carrier synchronization method applied to the power electronic transformer is characterized in that the PWM carrier synchronization method is full synchronization among a control unit FPGA, an input stage submodule and an isolation stage DC-DC module.
3. The PWM carrier synchronization method applied to the power electronic transformer, according to claim 1, wherein the control unit FPGA generates a required synchronization pulse signal at the end of a phase shift PWM period of the input stage submodule carrier, generates a required synchronization pulse signal at the end of a PWM period of the isolation stage DC-DC module, and generates different synchronization K code bytes according to an 8B/10B coding rule for the two synchronization pulse signals, and the two synchronization pulse signals are respectively transmitted to the input stage submodule and the isolation stage DC-DC module.
4. The PWM carrier synchronization method applied to the power electronic transformer as claimed in claim 1, wherein the input stage submodule receives a synchronous K code byte sent by a control unit FPGA through an optical fiber, converts the synchronous K code byte into a synchronous pulse signal after decoding, and updates a PWM counting register of the input stage submodule carrier according to the synchronous pulse signal to complete carrier signal synchronization of the input stage.
5. The PWM carrier synchronization method applied to the power electronic transformer according to claim 1, wherein the isolation stage DC-DC module receives a synchronous K code byte sent by the control unit through an optical fiber, decodes the synchronous K code byte into a corresponding synchronous pulse signal, and updates a carrier PWM counting register of the isolation stage DC-DC module according to the synchronous pulse signal to realize carrier signal synchronization of the isolation stage.
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| CN113890171B (en) * | 2021-09-28 | 2023-06-06 | 厦门市爱维达电子有限公司 | Implementation method for inversion carrier synchronization of UPS parallel operation system |
| CN116827155B (en) * | 2023-06-28 | 2024-02-20 | 荣信汇科电气股份有限公司 | Control system of cascade multi-level converter and carrier synchronization method thereof |
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| CN103558824B (en) * | 2013-11-05 | 2015-09-30 | 北京四方继保自动化股份有限公司 | A kind of easily extensible synchronous control system based on energy storage master & slave control structure |
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Effective date of registration: 20240102 Address after: 266000 12th floor, 4b building, 858 Huaguan Road, high tech Zone, Qingdao City, Shandong Province Patentee after: QINGDAO TOPSCOMM COMMUNICATION Co.,Ltd. Patentee after: Qingdao Dingxin Communication Power Engineering Co.,Ltd. Address before: 266000 12th floor, 4b building, 858 Huaguan Road, high tech Zone, Qingdao City, Shandong Province Patentee before: QINGDAO TOPSCOMM COMMUNICATION Co.,Ltd. Patentee before: Shenyang Keyuan State Grid Power Engineering Survey and Design Co.,Ltd. |
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