CN110618629B - SPWM (sinusoidal pulse Width modulation) synchronous pulse generation circuit, method and system based on editable logic device - Google Patents
SPWM (sinusoidal pulse Width modulation) synchronous pulse generation circuit, method and system based on editable logic device Download PDFInfo
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- G05B19/00—Programme-control systems
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- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
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- G—PHYSICS
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
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Abstract
According to the SPWM synchronous pulse generation circuit, the SPWM synchronous pulse generation method and the SPWM synchronous pulse generation system based on the editable logic device, the phase of a traction power grid is locked through a control algorithm, and pulse synchronization at the train level is achieved; the pulse synchronization of the transformer level is realized through a master-slave mode and an external synchronization signal between different controllers under the same transformer; the carrier synchronization pulse between the DSP and the FPGA realizes the pulse synchronization of the converter level, overcomes the problems of asynchronous clocks between a plurality of controllers and asynchronous clocks between the DSP and the FPGA chip, eliminates the accumulated error generated by asynchronous carrier and modulated wave signals, solves the problem of pulse loss of a power device of the converter, and improves the running stability of rail locomotive vehicles.
Description
Technical Field
The invention relates to the field of traction transmission, in particular to an SPWM (sinusoidal pulse width modulation) synchronous pulse generation circuit, method and system based on an editable logic device.
Background
On an electric rail locomotive such as a locomotive, a motor train unit and the like, a traction converter is adopted as a power source of the locomotive, the main stream is an AC-DC-AC structure, namely, after a 25kV single-phase voltage on a traction power supply network is rectified into a DC voltage, the DC voltage is inverted into a three-phase AC to drive a motor to drive a traction train to move forward, or when electric braking is needed, the three-phase electricity generated by the motor is rectified into a DC voltage by the traction converter and then inverted into a one-way AC to feed back the traction power supply network, wherein equipment for converting the DC voltage and the electric energy between the traction power network is called a four-quadrant converter, and an inverter for converting the converted DC voltage into the three-phase AC to drive the motor or other three-phase loads is called an inverter and is a component of the traction converter.
Generally, a plurality of traction converters are configured for the train, and a specific topology is that two traction transformers are configured for the train, each traction transformer supplies power to two traction converters, a plurality of groups of four-quadrant converters are arranged in each traction converter (which is technically referred to as a multiple design), and the plurality of groups of four-quadrant converters in each traction converter are supplied power by the same controller. However, the operation stability and safety of the current traction power grid cannot be guaranteed.
Disclosure of Invention
In order to solve the foregoing deficiencies, an embodiment of the present application in a first aspect provides an SPWM synchronous pulse generation circuit based on an editable logic device, including:
the digital signal processing device calculates a carrier phase shift angle according to the position number of the digital signal processing device, locks the phase of a traction power grid through a control algorithm, calculates a modulation wave and required carrier information, and generates carrier synchronization pulses;
an editable logic device, comprising:
the pulse generation module generates a carrier signal according to the carrier synchronization pulse and the carrier information, compares the modulation wave with the carrier signal and generates pulse control signals of each bridge arm of the converter;
and the pulse output module corrects the pulse width of the pulse control signal of each bridge arm based on a dead zone compensation algorithm and outputs the SPWM synchronous pulse.
In some embodiments, the carrier information comprises: master and slave controller identity, phase shift mode, the number of multiple topologies of the four-quadrant converter, carrier frequency and carrier phase.
In some embodiments, the master-slave controller identity is a master controller, the phase shift mode is an automatic carrier phase shift mode, and the pulse generation module includes:
a reference carrier signal generating unit for generating a reference carrier signal according to the carrier frequency and the carrier synchronization pulse;
and the carrier signal generating unit is used for generating the carrier signal of the main controller according to the reference carrier signal and the multiple topological quantity of the four-quadrant converter.
In some embodiments, the master-slave identity is a slave controller, the phase shift mode is an automatic carrier phase shift mode, and the pulse generation module includes:
the reference carrier signal generating unit generates a reference carrier signal according to the carrier frequency and the carrier signal sent by the main controller;
and the carrier signal generating unit is used for generating the carrier signal of the slave controller according to the reference carrier signal and the multiple topological quantity of the four-quadrant converter.
In some embodiments, the master-slave controller identity is a master controller, the phase shift mode is a non-automatic carrier phase shift mode, and the pulse generation module includes:
a reference carrier signal generating unit for generating a reference carrier signal according to the carrier frequency and the carrier synchronization pulse;
and the carrier signal generating unit is used for generating a carrier signal of the main controller according to the reference carrier signal and the carrier phase sent by the digital signal processing device.
In some embodiments, the master-slave identity is a slave controller, the phase shift mode is a non-automatic carrier phase shift mode, and the pulse generation module includes:
the reference carrier signal generating unit generates a reference carrier signal according to the carrier frequency and the carrier signal sent by the main controller;
and the carrier signal generating unit is used for generating the carrier signal of the slave controller according to the reference carrier signal and the carrier phase sent by the digital signal processing device.
In a second aspect, an embodiment of the present application provides a traction converter system for a rail locomotive, including:
the main traction converter is internally provided with a main controller, can send a carrier signal of the main controller and generates a rising edge signal of the carrier signal of the main controller;
the at least one slave traction converter is internally provided with a slave controller, responds to the rising edge signal and generates a carrier signal of the slave controller according to the carrier signal of the master controller, and the carrier signal of the slave controller and the carrier signal of the master controller have the same phase;
the master controller and the slave controller respectively comprise the SPWM synchronous pulse generating circuit.
The embodiment of the third aspect of the present application provides an SPWM synchronous pulse generation method based on an editable logic device, including:
calculating a carrier phase shift angle according to the position number of the carrier phase shift angle, locking the phase of a traction power grid through a control algorithm, calculating a modulation wave and required carrier information, and generating carrier synchronization pulses;
generating a carrier signal according to the carrier synchronization pulse and the carrier information, and comparing the modulation wave with the carrier signal to generate pulse control signals of each bridge arm of the converter;
and correcting the pulse width of the pulse control signal of each bridge arm based on a dead zone compensation algorithm, and outputting the SPWM synchronous pulse.
In some embodiments, the carrier information comprises: master and slave controller identity, phase shift mode, the number of multiple topologies of the four-quadrant converter, carrier frequency and carrier phase.
In some embodiments, the master-slave controller identity is a master controller, the phase shift mode is an automatic carrier phase shift mode, and generating the carrier signal according to the carrier synchronization pulse and the carrier information includes:
generating a reference carrier signal according to the carrier frequency and the carrier synchronization pulse;
and generating a carrier signal of the main controller according to the reference carrier signal and the number of the multiple topologies of the four-quadrant converter.
In some embodiments, the master-slave identity is a slave controller, the phase shift mode is an automatic carrier phase shift mode, and generating the carrier signal according to the carrier synchronization pulse and the carrier information includes:
generating a reference carrier signal according to the carrier frequency and a carrier signal sent by the main controller;
and generating the carrier signal of the slave controller according to the reference carrier signal and the number of the multiple topologies of the four-quadrant converter.
In some embodiments, the master-slave controller identity is a master controller, the phase shift mode is a non-automatic carrier phase shift mode, and generating the carrier signal according to the carrier synchronization pulse and the carrier information includes:
generating a reference carrier signal according to the carrier frequency and the carrier synchronization pulse;
and generating a carrier signal of the main controller according to the reference carrier signal and the carrier phase.
In some embodiments, the master-slave identity is a slave controller, the phase shift mode is a non-automatic carrier phase shift mode, and generating the carrier signal according to the carrier synchronization pulse and the carrier information includes:
generating a reference carrier signal according to the carrier frequency and a carrier signal sent by the main controller;
and generating the carrier signal of the slave controller according to the reference carrier signal and the carrier phase.
The beneficial effect of this application is as follows:
the SPWM synchronous pulse generation circuit, the SPWM synchronous pulse generation method and the SPWM synchronous pulse generation system based on the editable logic device overcome the problems that clocks among a plurality of controllers are asynchronous and clocks of a DSP chip and an FPGA chip are asynchronous, eliminate accumulated errors caused by carrier waves and modulation wave signals which are asynchronous, solve the problem of pulse loss of a converter power device and improve the running stability of rail locomotives.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 shows a schematic block diagram of an SPWM synchronous pulse generation circuit based on an editable logic device in the embodiment of the present application.
Fig. 2 shows a schematic diagram of a DSP + FPGA combined board in the embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to solve the problem that the running stability and safety of the existing traction power grid cannot be guaranteed, the core concept of the method is to suppress current harmonics at the side of the traction power grid in a PWM pulse carrier phase shifting mode, and eliminate the harmonics to the maximum extent through comprehensive pulse synchronization, namely pulse synchronization at the level of a whole vehicle, a transformer and a converter.
The existing PWM pulse forming method has the following prior art:
patent application with filing number CN108649786A (patent application number 201810588105.1) and name "a method suitable for programmable logic device to generate complementary driving pulse signal with dead zone" in chinese patent literature database discloses a method for generating complementary pulse signal with dead zone in upper and lower switch tubes of the same bridge arm by using FPGA, that is, at the time of the initial and near ending of sawtooth wave and in the time of the front and rear half preset dead zone time of duty ratio signal, the pulse signal is low level, the upper and lower tubes of the bridge arm are complementarily conducted and set dead zone time. Patent applications with a filing publication number of CN107517049A (patent application number of 2017000791601.2) and a name of' a control method, a system and an FPGA (field programmable gate array) for multi-channel PWM (pulse-width modulation) output in Chinese patent document databases disclose a control method for multi-channel PWM output, which is characterized in that dead time is timed and preset from a preset reference clock period and N paths of PWM signals are generated, so that the occurrence of a straight-through phenomenon is avoided, the accuracy of the dead time is ensured, and the multi-channel PWM output is stable and reliable. The above two patents mainly aim at the dead zone problem of the upper and lower tube pulses of the same bridge arm, and do not consider the clock synchronization problem of the modulation wave and the carrier signal.
In the patent with filing publication number CN1042020230B (patent application number 2014000413772.8) and name "a unipolar SPWM pulse signal implementation method based on FPGA" in the chinese patent document database, the system clock control module provides a working clock for the triangular carrier signal generator and the sine modulation wave signal generator, the sine modulation wave signal generator outputs and generates a sine wave signal, and the system clock control module adjusts the frequency of the working clock and controls the frequency of the sine wave signal; the positive and negative triangular carriers generated by the triangular carrier signal generator take sine wave signals as gating signals, and finally generate triangular wave signals outputting unipolar; and taking the generated unipolar carrier triangular wave signal and the modulated sine wave signal as two input signals of a comparison and inversion module to generate an SPWM pulse signal. However, for DSP and FPGA systems, because hardware configurations are different, the DSP and FPGA generally cannot adopt a unified clock signal source, so the method of the present invention is not suitable for DSP and FPGA systems.
The filing publication number in the chinese patent document database is CN1042810510A (patent application number 2013000292135.5), entitled "a method for generating a high-precision PWM signal using an FPGA", and the FPGA is used to generate a high-frequency clock signal, and send the clock signal to a counter, and the counter counts 2n, then clears, and then counts again, and the above-mentioned cycle is repeated to generate a sawtooth wave, and send the sawtooth wave to a comparator. And finally, inputting the external n-bit modulation wave data into a comparator, and comparing the data with the sawtooth wave to generate a PWM signal. The method of the patent can not generate a triangular carrier wave, and simultaneously does not consider the problem of clock synchronization of a modulation wave and a carrier wave signal.
The filing publication number in Chinese patent document database is CN1045791110B (patent application number 2015000023012.0), the name is "control method of unit cascade type frequency converter based on DSP and FPGA", disclose a control method of unit cascade type frequency converter based on DSP and FPGA, use DSP to receive the input frequency and calculate the modulation degree from the keyboard, and send modulation wave frequency and voltage modulation degree to FPGA through SPI interface; and the FPGA is adopted to generate an SPWM modulation signal according to the input modulation wave frequency and the voltage modulation degree so as to control the on-off of a power tube in the main circuit. In a patent with a filing publication number of CN1035805230B (patent application number of 2013000582674.2) and a name of 'multi-path phase shift PWM wave generating circuit based on FPGA' in a Chinese patent document database, the multi-path phase shift PWM wave generating circuit comprises a plurality of PWM generating units based on FPGA and a control signal unit, wherein a synchronous signal generator generates short pulses to form synchronous short pulse signals when a triangular carrier signal is at a zero point or a symmetrical midpoint; the synchronous signal integration circuit integrates the synchronous short pulse signals generated in each PWM generating unit into a synchronous integrated signal, and the synchronous integrated signal is used for informing the digital controller to start the sampling unit and completing a control algorithm of a unit period. The synchronous signal screening circuit screens out various synchronous short pulse signals, converts the synchronous short pulse signals into multiple synchronous pulse level signals, and can be in one-to-one correspondence with each group of PWM generating units, so that the digital controller can distinguish which group of PWM generating units generates each group of synchronous short pulse signals in the synchronous comprehensive signals output by the synchronous signal integrating circuit, and a time-sharing control algorithm is realized. In the above two patents, the modulation/duty ratio signals required for generating the PWM pulses are both sent to the FPGA by the digital controller (or specifically the DSP), but the clock synchronization problem between the modulation wave and the carrier signal, that is, the clock synchronization problem between the DSP and the FPGA chip, is not considered.
When the method is applied to the field of rail locomotives, the pulse synchronization of the whole locomotive level, the transformer level and the converter level cannot be realized.
Fig. 1 shows an SPWM synchronous pulse generation circuit based on an editable logic device in an embodiment of the present application, including: the digital signal processing device 1 calculates a carrier phase shift angle according to the position number of the digital signal processing device, locks the phase of a traction power grid through a control algorithm, calculates a modulation wave and required carrier information, and generates carrier synchronization pulses; an editable logic device 2, comprising: the pulse generation module 21 generates a carrier signal according to the carrier synchronization pulse and the carrier information, compares the modulation wave with the carrier signal, and generates a pulse control signal for each bridge arm of the converter; and the pulse output module 22 corrects the pulse width of the pulse control signal of each bridge arm based on a dead zone compensation algorithm and outputs the SPWM synchronous pulse.
The phase of a traction power grid is locked through a control algorithm, so that pulse synchronization of a train level is realized; the pulse synchronization of the transformer level is realized through a master-slave mode and an external synchronization signal between different controllers under the same transformer; the carrier synchronization pulse between the DSP and the FPGA realizes the pulse synchronization of the converter level, overcomes the problems of asynchronous clocks between a plurality of controllers and asynchronous clocks between the DSP and the FPGA chip, eliminates the accumulated error generated by asynchronous carrier and modulated wave signals, solves the problem of pulse loss of a power device of the converter, and improves the running stability of rail locomotive vehicles.
In some embodiments, the carrier information comprises: master and slave controller identity, phase shift mode, the number of multiple topologies of the four-quadrant converter, carrier frequency and carrier phase.
On an electric rail locomotive such as a locomotive, a motor train unit and the like, a traction converter is adopted as a power source of the locomotive, the main stream is an AC-DC-AC structure, namely, after a 25kV single-phase voltage on a traction power supply network is rectified into a DC voltage, the DC voltage is inverted into a three-phase AC to drive a motor to drive a traction train to move forward, or when electric braking is needed, the three-phase electricity generated by the motor is rectified into a DC voltage by the traction converter and then inverted into a one-way AC to feed back the traction power supply network, wherein equipment for converting the DC voltage and the electric energy between the traction power network is called a four-quadrant converter, and an inverter for converting the converted DC voltage into the three-phase AC to drive the motor or other three-phase loads is called an inverter and is a component of the traction converter.
Generally, a plurality of traction converters are configured for the train, and a specific topology is that two traction transformers are configured for the train, each traction transformer supplies power to two traction converters, a plurality of groups of four-quadrant converters are arranged in each traction converter (which is technically referred to as a multiple design), and the plurality of groups of four-quadrant converters in each traction converter are supplied power by the same controller.
The master and slave controller identities are master and slave identities of a plurality of traction converters under the same traction transformer, for example, one traction converter is a master, the other traction converters are slaves, the master traction converter sends carrier signals, and the slave traction converters receive the carrier signals.
The phase shifting mode comprises an automatic carrier phase shifting mode and a non-automatic carrier phase shifting mode, and particularly, if the carrier phase shifting angle of the whole vehicle is distributed according to a converter as a unit, the automatic carrier phase shifting can be applied at the moment, the carrier phases of four quadrants are enabled to be mutually staggered by a same phase angle pi/N (N is the number of the rectifiers in a multiple way), and then the step wave is obtained by utilizing the SPWM technology; if the carrier phase shift angle of the whole vehicle is distributed according to the number of the four-quadrant units, the automatic carrier phase shift cannot be used, and the phase shift angle is configured for each four-quadrant unit independently.
In some embodiments, if the master controller mode + the automatic carrier phase shift mode is selected, the master-slave controller identity is a slave controller, and the phase shift mode is an automatic carrier phase shift mode, where the pulse generation module of the editable logic device includes: the reference carrier signal generating unit generates a reference carrier signal according to the carrier frequency and the carrier signal sent by the main controller; and the carrier signal generating unit is used for generating the carrier signal of the slave controller according to the reference carrier signal and the multiple topological quantity of the four-quadrant converter.
The pulse generating module can generate a reference carrier signal according to the carrier frequency and the carrier synchronization pulse sent by the digital signal processing device, and then the carrier signal required by each bridge arm of multiple four-quadrant is automatically generated by integrating the multiple number of the four-quadrant converter on the basis. And the reference carrier signal is used as an external synchronous signal between the controllers and sent to another controller under the same transformer.
In some real-time examples, if the slave controller mode + the automatic carrier phase shift mode is selected, the master-slave controller identity is the slave controller, the phase shift mode is the automatic carrier phase shift mode, and the pulse generation module includes: the reference carrier signal generating unit generates a reference carrier signal according to the carrier frequency and the carrier signal sent by the main controller; and the carrier signal generating unit is used for generating the carrier signal of the slave controller according to the reference carrier signal and the multiple topological quantity of the four-quadrant converter.
In this embodiment, the pulse generation module generates a reference carrier signal according to a carrier frequency sent by the digital signal processing device and an external synchronization signal sent by another control device under the same transformer, and then automatically generates carrier signals required by each bridge arm of multiple four quadrants by integrating the multiple number of the four-quadrant converter on the basis.
In some embodiments, if the master controller mode + the non-automatic carrier phase shift mode is selected, the master controller identity is the master controller, the phase shift mode is the non-automatic carrier phase shift mode, and the pulse generation module includes: a reference carrier signal generating unit for generating a reference carrier signal according to the carrier frequency and the carrier synchronization pulse; and the carrier signal generating unit is used for generating a carrier signal of the main controller according to the reference carrier signal and the carrier phase sent by the digital signal processing device.
In this embodiment, the pulse generation module generates a reference carrier signal according to the carrier frequency and the carrier synchronization pulse sent by the digital signal processing device, and on this basis, generates carrier signals required by each bridge arm of multiple four-quadrant according to the carrier phase sent by the digital signal processing device, and sends the reference carrier signal as an external synchronization signal between the controllers to another controller under the same transformer.
In some embodiments, if the slave controller mode + the non-automatic carrier phase shift mode is selected, the master-slave controller identity is a slave controller, and the phase shift mode is a non-automatic carrier phase shift mode, the pulse generation module includes: the reference carrier signal generating unit generates a reference carrier signal according to the carrier frequency and the carrier signal sent by the main controller; and the carrier signal generating unit is used for generating the carrier signal of the slave controller according to the reference carrier signal and the carrier phase sent by the digital signal processing device.
In this embodiment, the pulse generation module generates a reference carrier signal according to a carrier frequency sent by the digital signal processing device and an external synchronization signal sent by another control device under the same transformer, and generates a digital signal processing device required by each bridge arm of multiple four quadrants according to a carrier phase sent by the digital signal processing device on the basis.
In the above embodiment, the pulse generating module further compares the modulated wave sent from the digital signal processing device with the self-generated carrier signal according to a pulse modulation method, such as a unipolar frequency multiplication SPWM modulation method, a bipolar SPWM modulation method, and the like, generates control PWM pulses for each bridge arm of the four-quadrant converter, and sends the control PWM pulses to the pulse output module, and the pulse output module generates final control PWM pulses for each switching tube, that is, SPWM synchronous pulses according to the PWM pulses for each bridge arm and a dead zone compensation algorithm.
In some embodiments, the editable logic device may be an FPGA, or a CPLD or other hard real-time control chip.
The digital signal processing device can be other control equipment or control chips such as a DSP, a singlechip, a CPU and the like.
The carrier signal may be a triangular carrier, a rectangular wave, a square wave, etc.
In some embodiments, the location number may be obtained through a train network or through a hard-wired signal.
The method can be understood that the carrier phase shift angle is calculated through the position number signal, and the phase of the traction power grid is locked through a control algorithm, so that the pulse synchronization of the train level is realized; the pulse synchronization of the transformer level is realized through a master-slave mode and an external synchronization signal between different controllers under the same transformer; the carrier synchronization pulse between the DSP and the FPGA realizes the pulse synchronization of the converter level, overcomes the problems of asynchronous clocks between a plurality of controllers and asynchronous clocks between the DSP and the FPGA chip, eliminates the accumulated error generated by asynchronous carrier and modulated wave signals, solves the problem of pulse loss of a power device of the converter, and improves the running stability of rail locomotive vehicles.
Based on the detailed description of the above embodiments, the present application further provides a traction converter system for a rail locomotive, including: the main traction converter is internally provided with a main controller, can send a carrier signal of the main controller and generates a rising edge signal of the carrier signal of the main controller; the at least one slave traction converter is internally provided with a slave controller, responds to the rising edge signal and generates a carrier signal of the slave controller according to the carrier signal of the master controller, and the carrier signal of the slave controller and the carrier signal of the master controller have the same phase; wherein, the master controller and the slave controller respectively comprise the SPWM synchronous pulse generating circuit.
In the following, with reference to fig. 2, a combination of DSP and FPGA is taken as an example to describe, and it should be understood that some characters in fig. 2 are not described in the specification one by one, and these are known names in the art.
In this embodiment, the master controller and the slave controller are composed of hardware boards for loading the DSP chip and the FPGA chip simultaneously on hardware, and the DSP chip and the FPGA chip are connected by a data/address bus and a GPIO.
The software is composed of a DSP program and an FPGA program, and the two programs can exchange information through a data bus. And the FPGA receives the modulation related parameters and instructions sent by the DSP to generate a triangular carrier, so as to generate PWM pulse control signals of each bridge arm. The specific signals comprise a master-slave mode, a pulse blocking mode, an automatic carrier phase shifting mode, a multiplexing mode, a modulated wave signal, a modulated wave period phase and the like. In addition, the DSP also directly exchanges carrier synchronization signal information with the FPGA through the GPIO.
Specifically, the method comprises the following steps: in order to realize pulse synchronization and carrier phase shift of two traction converters under a traction transformer, one traction converter is set as a master, the other traction converter is set as a slave, the master traction converter sends a pulse synchronization signal and a rising edge of the beginning of each PWM pulse generation period, the slave traction converter receives the rising edge signal and triggers a new PWM pulse generation period according to the rising edge signal, and the master traction converter does not receive the pulse synchronization signal.
Meanwhile, in order to realize pulse synchronization and carrier phase shifting among a plurality of four-quadrant converters in the same traction converter, an automatic carrier phase shifting mode is designed, and a synchronous and phase-shifted triangular carrier is automatically generated by transmitting a modulated wave signal, a modulated wave periodic phase and the like.
In the transmission process, in order to realize strict synchronization of the pulse, pulse synchronization between the DSP and the FPGA is designed, which is usually configured only by the DSP in the prior art, and the pulse is lost due to asynchronous clocks of the DSP and the FPGA.
The main controller and the slave controller mainly comprise an FPGA chip and a DSP chip, digital information is interacted between the main controller and the slave controller through an address data bus, a chip selection signal and a control signal, the FPGA caches the received information into a 16-bit digital register, and meanwhile, the interaction synchronization pulse is directly connected through a hard wire of a GPIO. The interaction data is as follows:
1. master-slave selection: the controller is selected as master (sending out a synchronization pulse) or slave (receiving a synchronization pulse).
2. Pulse blocking: it is selected whether to force the blocking of the pulse output.
3. Phase-shift mode: and selecting whether to adopt an automatic carrier phase shifting mode.
4. The number of multiplexing: the four-quadrant converter is selected to adopt a plurality of topologies.
5. Carrier synchronization pulse: for carrier phase synchronization.
6. Carrier frequency: for generating a triangular carrier for PWM modulation.
7. Carrier phase: for generating a triangular carrier for PWM modulation.
8. Modulation wave: for generating a PWM waveform.
Specifically, firstly, the DSP calculates the phase shift angle of the carrier through the position number of the controller sent by the train network, further, the DSP control algorithm module calculates the information (including master-slave selection, carrier frequency, carrier phase, multiplexing number and phase shift mode) of the modulation wave and the required carrier through locking the voltage phase of the traction power grid, generates carrier synchronization pulse, and sends the information to the FPGA through a bus or GPIO.
After receiving the information, the FPGA:
1. if the mode is the main controller mode and the automatic carrier phase shifting mode:
the pulse generation module can generate a reference triangular carrier according to the carrier frequency and the carrier synchronization pulse sent by the DSP, and then the triangular carrier required by each bridge arm of multiple four-quadrant is automatically generated by integrating the multiple number of the four-quadrant converters on the basis. And the reference triangular carrier is used as an external synchronous signal between the controllers and is sent to another controller under the same transformer.
2. If the mode is the slave controller mode + the automatic carrier phase shift mode:
the pulse generation module can generate a reference triangular carrier according to a carrier frequency sent by the DSP and an external synchronous signal sent by another control under the same transformer, and then the triangular carrier required by each bridge arm of multiple four-quadrant is automatically generated by integrating the multiple number of the four-quadrant converters on the basis.
3. If the mode is the main controller mode and the non-automatic carrier phase shifting mode:
the pulse generation module can generate a reference triangular carrier according to the carrier frequency and the carrier synchronization pulse sent by the DSP, and on the basis, the pulse generation module generates triangular carriers required by each bridge arm of multiple four-quadrant according to the carrier phase sent by the DSP. And the reference triangular carrier is used as an external synchronous signal between the controllers and is sent to another controller under the same transformer.
4. If the mode is the slave controller mode + the non-automatic carrier phase shift mode:
the pulse generation module can generate a reference triangular carrier according to the carrier frequency sent by the DSP and an external synchronous signal sent by another control unit under the same transformer, and on the basis, the pulse generation module can generate triangular carriers required by each bridge arm of multiple four quadrants according to the carrier phase sent by the DSP.
And finally, combining the triangular carrier generated by the method, comparing the modulation wave transmitted by the DSP with the triangular carrier generated by the FPGA pulse generation module according to a unipolar frequency multiplication SPWM (sinusoidal pulse width modulation) method to generate control PWM (pulse width modulation) pulses of each bridge arm of the four-quadrant converter, and transmitting the control PWM pulses to the FPGA pulse output module, wherein the FPGA pulse output module generates final control PWM pulses of each switching tube according to the PWM pulses of each bridge arm and a dead zone compensation algorithm.
Therefore, the invention calculates the carrier phase shift angle through the position number signal of the train network, locks the phase of the traction power grid through the control algorithm, and realizes the pulse synchronization of the train level; the pulse synchronization of the transformer level is realized through a master-slave mode and an external synchronization signal between different controllers under the same transformer; and the pulse synchronization of the converter level is realized through carrier synchronization pulses between the DSP and the FPGA.
Based on the same inventive concept, the embodiment of the present application further provides an SPWM synchronization pulse generation method based on an editable logic device, including:
calculating a carrier phase shift angle according to the position number of the carrier phase shift angle, locking the phase of a traction power grid through a control algorithm, calculating a modulation wave and required carrier information, and generating carrier synchronization pulses;
generating a carrier signal according to the carrier synchronization pulse and the carrier information, and comparing the modulation wave with the carrier signal to generate pulse control signals of each bridge arm of the converter;
and correcting the pulse width of the pulse control signal of each bridge arm based on a dead zone compensation algorithm, and outputting the SPWM synchronous pulse.
Based on the same inventive concept, in some embodiments, the carrier information includes: master and slave controller identity, phase shift mode, the number of multiple topologies of the four-quadrant converter, carrier frequency and carrier phase.
Based on the same inventive concept, in some embodiments, the master-slave controller identity is a master controller, the phase shift mode is an automatic carrier phase shift mode, and the generating the carrier signal according to the carrier synchronization pulse and the carrier information includes:
generating a reference carrier signal according to the carrier frequency and the carrier synchronization pulse;
and generating a carrier signal of the main controller according to the reference carrier signal and the number of the multiple topologies of the four-quadrant converter.
Based on the same inventive concept, in some embodiments, the master-slave controller identity is a slave controller, the phase shift mode is an automatic carrier phase shift mode, and the generating the carrier signal according to the carrier synchronization pulse and the carrier information includes:
generating a reference carrier signal according to the carrier frequency and a carrier signal sent by the main controller;
and generating the carrier signal of the slave controller according to the reference carrier signal and the number of the multiple topologies of the four-quadrant converter.
Based on the same inventive concept, in some embodiments, the master-slave controller identity is a master controller, the phase shift mode is a non-automatic carrier phase shift mode, and the generating the carrier signal according to the carrier synchronization pulse and the carrier information includes:
generating a reference carrier signal according to the carrier frequency and the carrier synchronization pulse;
and generating a carrier signal of the main controller according to the reference carrier signal and the carrier phase sent by the digital signal processing device.
Based on the same inventive concept, in some embodiments, the master-slave controller identity is a slave controller, the phase shift mode is a non-automatic carrier phase shift mode, and the generating the carrier signal according to the carrier synchronization pulse and the carrier information includes:
generating a reference carrier signal according to the carrier frequency and a carrier signal sent by the main controller;
and generating the carrier signal of the slave controller according to the reference carrier signal and the carrier phase sent by the digital signal processing device.
The SPWM synchronous pulse generation method provided by the embodiment of the application can be understood as locking the phase of a traction power grid through a control algorithm, and realizing the pulse synchronization at the train level; the pulse synchronization of the transformer level is realized through a master-slave mode and an external synchronization signal between different controllers under the same transformer; the carrier synchronization pulse between the DSP and the FPGA realizes the pulse synchronization of the converter level, overcomes the problems of asynchronous clocks between a plurality of controllers and asynchronous clocks between the DSP and the FPGA chip, eliminates the accumulated error generated by asynchronous carrier and modulated wave signals, solves the problem of pulse loss of a power device of the converter, and improves the running stability of rail locomotive vehicles.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of an embodiment of the specification. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example.
Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction. The above description is only an example of the embodiments of the present disclosure, and is not intended to limit the embodiments of the present disclosure. Various modifications and variations to the embodiments described herein will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the embodiments of the present specification should be included in the scope of the claims of the embodiments of the present specification.
Claims (3)
1. An SPWM sync pulse generation circuit based on an editable logic device, comprising:
the digital signal processing device calculates a carrier phase shift angle according to the position number of the digital signal processing device, locks the phase of a traction power grid through a control algorithm, calculates a modulation wave and required carrier information, and generates carrier synchronization pulses;
an editable logic device, comprising:
the pulse generation module generates a carrier signal according to the carrier synchronization pulse and the carrier information, compares the modulation wave with the carrier signal and generates pulse control signals of each bridge arm of the converter;
the pulse output module corrects the pulse width of the pulse control signal of each bridge arm based on a dead zone compensation algorithm and outputs the SPWM synchronous pulse; wherein the content of the first and second substances,
the carrier information includes: the identity of the master controller and the slave controller, a phase shifting mode, the number of multiple topologies of the four-quadrant converter, carrier frequency and carrier phase;
the master and slave controller identities are master and slave identities of a plurality of traction converters under the same traction transformer, the master traction converter sends carrier signals, and the slave traction converters receive the carrier signals;
the phase shifting mode comprises an automatic carrier phase shifting mode and a non-automatic carrier phase shifting mode, specifically, if the carrier phase shifting angle of the whole vehicle is distributed according to a converter as a unit, the automatic carrier phase shifting can be applied at the moment, the carrier phases of four quadrants are ensured to be mutually staggered by a same phase angle pi/N, N is the multiplexing number of the rectifier, and then the step wave is obtained by utilizing the SPWM technology; if the carrier phase shift angle of the whole vehicle is distributed according to the number of the four-quadrant units, the automatic carrier phase shift cannot be used, and the phase shift angle is independently configured for each four-quadrant unit;
if the slave controller mode and the automatic carrier phase-shifting mode are adopted, the identity of the master controller and the slave controller is the slave controller, the phase-shifting mode is the automatic carrier phase-shifting mode, and the pulse generation module comprises: the reference carrier signal generating unit generates a reference carrier signal according to the carrier frequency and a carrier signal sent by the main controller; the carrier signal generating unit is used for generating the carrier signals of the slave controller according to the reference carrier signals and the multiple topological quantity of the four-quadrant converter; the pulse generation module generates a reference carrier signal according to a carrier frequency sent by the digital signal processing device and an external synchronous signal sent by another control device under the same transformer, and then integrates the multiple number of the four-quadrant converter on the basis to automatically generate carrier signals required by each bridge arm of multiple four-quadrant converters;
if the master controller mode and the non-automatic carrier phase-shifting mode exist, the identity of the master controller and the identity of the slave controller are the master controller, the phase-shifting mode is the non-automatic carrier phase-shifting mode, and the pulse generation module comprises: a reference carrier signal generating unit for generating a reference carrier signal according to the carrier frequency and the carrier synchronization pulse; the carrier signal generating unit generates a carrier signal of the main controller according to the reference carrier signal and a carrier phase sent by the digital signal processing device; the pulse generation module generates a reference carrier signal according to the carrier frequency and the carrier synchronization pulse sent by the digital signal processing device, generates carrier signals required by each bridge arm of multiple four-quadrant according to the carrier phase sent by the digital signal processing device on the basis, and sends the reference carrier signal to another controller under the same transformer as an external synchronization signal between the controllers;
if the slave controller mode and the non-automatic carrier phase-shifting mode are the slave controller mode, the master-slave controller identity is the slave controller, the phase-shifting mode is the non-automatic carrier phase-shifting mode, and the pulse generation module comprises: the reference carrier signal generating unit generates a reference carrier signal according to the carrier frequency and the carrier signal sent by the main controller; the carrier signal generating unit generates the carrier signal of the slave controller according to the reference carrier signal and the carrier phase sent by the digital signal processing device; the pulse generating module can generate a reference carrier signal according to a carrier frequency sent by the digital signal processing device and an external synchronous signal sent by another control unit under the same transformer, and on the basis, the pulse generating module can generate a digital signal processing device required by each bridge arm of multiple four quadrants according to a carrier phase sent by the digital signal processing device.
2. A traction converter system for a rail locomotive, comprising:
the main traction converter is internally provided with a main controller, can send a carrier signal of the main controller and generates a rising edge signal of the carrier signal of the main controller;
the at least one slave traction converter is internally provided with a slave controller, responds to the rising edge signal and generates a carrier signal of the slave controller according to the carrier signal of the master controller, and the carrier signal of the slave controller and the carrier signal of the master controller have the same phase;
wherein the master controller and the slave controller each comprise an SPWM synchronization pulse generation circuit as recited in claim 1.
3. An SPWM synchronization pulse generation method based on an editable logic device is characterized by comprising the following steps:
calculating a carrier phase shift angle according to the position number of the carrier phase shift angle, locking the phase of a traction power grid through a control algorithm, calculating a modulation wave and required carrier information, and generating carrier synchronization pulses;
generating a carrier signal according to the carrier synchronization pulse and the carrier information, and comparing the modulation wave with the carrier signal to generate pulse control signals of each bridge arm of the converter;
correcting the pulse width of each bridge arm pulse control signal based on a dead zone compensation algorithm, and outputting the SPWM synchronous pulse; wherein the carrier information includes: the identity of the master controller and the slave controller, a phase shifting mode, the number of multiple topologies of the four-quadrant converter, carrier frequency and carrier phase;
the master and slave controller identities are master and slave identities of a plurality of traction converters under the same traction transformer, the master traction converter sends carrier signals, and the slave traction converters receive the carrier signals;
the phase shifting mode comprises an automatic carrier phase shifting mode and a non-automatic carrier phase shifting mode, specifically, if the carrier phase shifting angle of the whole vehicle is distributed according to a converter as a unit, the automatic carrier phase shifting can be applied at the moment, the carrier phases of four quadrants are ensured to be mutually staggered by a same phase angle pi/N, N is the multiplexing number of the rectifier, and then the step wave is obtained by utilizing the SPWM technology; if the carrier phase shift angle of the whole vehicle is distributed according to the number of the four-quadrant units, the automatic carrier phase shift cannot be used, and the phase shift angle is independently configured for each four-quadrant unit;
if the slave controller mode and the automatic carrier phase-shifting mode exist, the identity of the master controller and the slave controller is the slave controller, the phase-shifting mode is the automatic carrier phase-shifting mode, and the pulse generation module comprises: the reference carrier signal generating unit generates a reference carrier signal according to the carrier frequency and a carrier signal sent by the main controller; the carrier signal generating unit is used for generating the carrier signals of the slave controller according to the reference carrier signals and the multiple topological quantity of the four-quadrant converter; the pulse generation module generates a reference carrier signal according to a carrier frequency sent by the digital signal processing device and an external synchronous signal sent by another control device under the same transformer, and then integrates the multiple number of the four-quadrant converter on the basis to automatically generate carrier signals required by each bridge arm of multiple four-quadrant converters;
if the master controller mode and the non-automatic carrier phase-shifting mode exist, the identity of the master controller and the identity of the slave controller are the master controller, the phase-shifting mode is the non-automatic carrier phase-shifting mode, and the pulse generation module comprises: a reference carrier signal generating unit for generating a reference carrier signal according to the carrier frequency and the carrier synchronization pulse; the carrier signal generating unit generates a carrier signal of the main controller according to the reference carrier signal and a carrier phase sent by the digital signal processing device; the pulse generation module generates a reference carrier signal according to the carrier frequency and the carrier synchronization pulse sent by the digital signal processing device, generates carrier signals required by each bridge arm of multiple four-quadrant according to the carrier phase sent by the digital signal processing device on the basis, and sends the reference carrier signal to another controller under the same transformer as an external synchronization signal between the controllers;
if the slave controller mode and the non-automatic carrier phase-shifting mode exist, the identity of the master controller and the slave controller is the slave controller, the phase-shifting mode is the non-automatic carrier phase-shifting mode, and the pulse generation module comprises: the reference carrier signal generating unit generates a reference carrier signal according to the carrier frequency and the carrier signal sent by the main controller; the carrier signal generating unit generates the carrier signal of the slave controller according to the reference carrier signal and the carrier phase sent by the digital signal processing device; the pulse generating module can generate a reference carrier signal according to a carrier frequency sent by the digital signal processing device and an external synchronous signal sent by another control unit under the same transformer, and on the basis, the pulse generating module can generate a digital signal processing device required by each bridge arm of multiple four quadrants according to a carrier phase sent by the digital signal processing device.
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| CN111600501B (en) * | 2020-05-09 | 2022-09-06 | 青岛鼎信通讯股份有限公司 | PWM carrier synchronization method applied to power electronic transformer |
| CN113568339B (en) * | 2021-07-15 | 2023-03-21 | 许继电气股份有限公司 | Converter fixed time delay control method and device |
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| CN102904419B (en) * | 2012-09-25 | 2015-04-22 | 上海交通大学 | Three-phase PWM (Pulse-Width Modulation) wave FPGA (Field Programmable Gate Array) generating device |
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