CN111599670A - Wafer processing method and semiconductor device - Google Patents

Wafer processing method and semiconductor device Download PDF

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Publication number
CN111599670A
CN111599670A CN201910127050.9A CN201910127050A CN111599670A CN 111599670 A CN111599670 A CN 111599670A CN 201910127050 A CN201910127050 A CN 201910127050A CN 111599670 A CN111599670 A CN 111599670A
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China
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wafer
damage layer
processing method
layer
semiconductor device
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CN201910127050.9A
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Chinese (zh)
Inventor
周永昌
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Alpha Power Solutions Ltd
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Alpha Power Solutions Ltd
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Priority to CN201910127050.9A priority Critical patent/CN111599670A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

Abstract

The invention provides a wafer processing method and a semiconductor device. An exemplary wafer processing method includes: providing a wafer having a first side and a second side opposite the first side, the wafer comprising a single crystalline semiconductor material; thinning the second side to generate a damaged layer on the thinned second side; and laser processing the damaged layer to convert the semiconductor material of the damaged layer into a polycrystalline state. Semiconductor devices including wafers obtained using exemplary wafer processing methods are also provided. The wafer processing method is simple and convenient, can easily, quickly and effectively remove the damaged layer generated in the wafer thinning process, is beneficial to the performance of devices, accelerates the chip manufacturing, shortens the chip manufacturing period and reduces the production cost.

Description

Wafer processing method and semiconductor device
Technical Field
The present invention relates to the field of semiconductor technology, and more particularly, to a wafer processing method and a semiconductor device.
Background
Semiconductor devices, or integrated circuits, are typically fabricated on a semiconductor substrate or base plate (e.g., a wafer). For example, most semiconductor devices are fabricated on a shallow surface layer of a semiconductor substrate. Due to the complexity of the manufacturing process itself, for example, up to several hundred process flows, thin wafers are not usually used, but only wafers with a certain thickness are used for transferring and flowing during the process. It is often necessary to remove a certain thickness of excess substrate material from the back side of the wafer prior to packaging the semiconductor device.
For thinning, the back side of the wafer is typically ground. Grinding can cause damage to the back layer, such as cracking and warping, which can be detrimental to device performance. For this reason, the damage layer is typically chemically etched away for silicon-based wafers. However, for some semiconductor materials, such as silicon carbide (SiC) matrix, due to the material characteristics of silicon carbide itself (e.g., very high hardness, etc.), etching by chemical methods requires a very significant longer time and the effect is not ideal, which not only affects the device performance, but also greatly increases the manufacturing cycle time and thus the manufacturing cost of the semiconductor chip.
Disclosure of Invention
The present invention provides a wafer processing method and a semiconductor device to solve one or more of the above-mentioned technical problems in the prior art.
According to an aspect of the present invention, there is provided a wafer processing method including: providing a wafer having a first side and a second side opposite the first side, the wafer comprising a single crystalline semiconductor material; thinning the second side so as to generate a damaged layer on the thinned second side; and laser processing the damaged layer to convert the semiconductor material of the damaged layer into a polycrystalline state.
According to another aspect of the present invention, there is provided a wafer processing method comprising: providing a wafer comprising silicon carbide, the wafer having a first side and a second side opposite the first side, and having a first thickness; providing a semiconductor device on the first side; grinding the second side to reduce the thickness of the wafer from the first thickness to the second thickness and generate a damaged layer on the second side; performing laser treatment on the damaged layer to convert the silicon carbide of the damaged layer into polycrystalline silicon carbide; and removing the damaged layer to thin the wafer from the second thickness to a third thickness.
According to still another aspect of the present invention, there is provided a semiconductor apparatus including a wafer obtained by the wafer processing method according to the embodiment of the present invention and a semiconductor device provided on a first side of the wafer.
The present invention has many advantages over the prior art. For example, the wafer processing method according to the embodiment of the invention is simple and convenient, can easily, quickly and effectively remove the damaged layer generated in the wafer thinning process, is beneficial to the device performance, accelerates the chip manufacturing process, shortens the chip manufacturing period, and reduces the production cost and the manufacturing cost of the semiconductor device adopting the method.
Further embodiments and further technical effects of the invention will be described in detail below.
Drawings
Embodiments of the present invention will now be described by way of example with reference to the accompanying drawings. One or more embodiments are illustrated by the corresponding figures in the drawings, which are not meant to be limiting. For convenience, the same or similar elements are identified with the same or similar reference numerals in the drawings, and the drawings in the drawings are not to scale unless otherwise specified.
FIG. 1 is a flow chart of a method of wafer processing according to an embodiment of the present invention;
FIGS. 2a-2d are schematic illustrations of a wafer processing method according to an embodiment of the invention;
fig. 3 shows a flow chart of a wafer processing method according to another embodiment of the invention.
Detailed Description
To facilitate an understanding of the present invention, a number of exemplary embodiments will be described below in conjunction with the associated drawings. It will be understood by those skilled in the art that the examples herein are for the purpose of illustrating the invention and are not in any way limiting.
Although embodiments of the present invention may use terms such as first, second, etc. to refer to various elements, it should be understood that these elements should not be limited by the above terms. The above terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention.
Fig. 1 and 2a-2d illustrate a wafer processing method 10, according to an aspect of the present invention. At block 12, a wafer 100 is provided. The wafer 100 includes a semiconductor material, such as a monocrystalline semiconductor material. In this particular embodiment, the semiconductor material is silicon carbide (e.g., 4H-SiC). Wafer 100 has a first side 110 and a second side 120. The first side 110 is opposite the second side 120.
The first side 110 may, for example, serve as a front side for fabricating or providing semiconductor devices, integrated circuits, etc. The second side 120 may, for example, serve as a backside for providing a back metal electrode connection.
At block 14, the wafer 100 is subjected to a thinning process. For example, the second side 120 may be thinned. The thinning process may cause the wafer 100 to be thinned (i.e., the wafer thickness is reduced) while creating a thickness or depth of the damage layer 122 on the second side 120 from the surface thereof toward the first side 110.
The thinning process may employ a suitable method, such as mechanical methods, chemical methods, or a combination thereof. The thinning process can be realized by, for example, grinding, lapping, chemical mechanical polishing, dry polishing, or the like. The thinning process is advantageous, for example, to improve heat dissipation of the semiconductor device, chip, or apparatus, and to reduce resistance, facilitate a post-packaging process, and the like.
The damaged layer 122 may present structural defects such as cracks, crevices, dislocations, etc., creating undesirable stresses that cause wafer warpage that affect device performance, and may also affect subsequent manufacturing operations, etc., and thus needs to be eliminated or removed.
At block 16, the damage layer 122 is laser processed such that the single crystal silicon carbide of the damage layer 122 is converted to polycrystalline silicon carbide. For silicon carbide wafers, conventional physical, chemical etching methods are generally inefficient or ineffective at removing damaged layers due to the properties of the single-crystal silicon carbide itself (e.g., high hardness, strong chemical stability, etc.). The present inventors have for the first time contemplated converting single-crystal silicon carbide to polycrystalline silicon carbide using laser processing to facilitate rapid and efficient removal of the damage layer by appropriate subsequent processing methods.
Laser treatment may be performed on the damaged layer 1, for example, with a laser beam having a wavelength in the range of 248 nanometers (nm) to 532nm22, the irradiation is performed. The irradiation may be a single irradiation or a plurality of irradiations. The energy of the laser beam may range from 2.0 joules per square centimeter (J/cm)2) To 5.0J/cm2In the meantime. The laser beam may be generated by a laser generating device. In this particular embodiment, krypton fluoride (KrF) and argon fluoride (ArF) excimer lasers pulsed at 30 nanoseconds (ms) were used to generate an energy of 4.0J/cm at a wavelength of 248nm2The damaged layer 122 is irradiated with the laser beam of (1). In one embodiment, a xenon chloride (xenon chloride) excimer laser is used to generate laser light at a wavelength of 308 nm. In another embodiment, the laser beam has a wavelength of 351-353 nm. In yet another embodiment, the laser beam has a wavelength of 532 nm. The energy of the laser beam can be 2.0J/cm according to actual requirements2、3.0J/cm2、4.0J/cm2、5.0J/cm2And the like.
By way of example, the laser beam 130 may impinge on a surface area of the damage layer 122 through an aperture of a fixed size, and then the laser beam impinges on an adjacent surface area through relative movement of the wafer 100 and the laser beam 130 (e.g., rotation, translation, or a combination of both of the wafer 100) such that the laser beam impinges on the adjacent surface area, which is repeated until the impingement of the laser beam traverses the entire surface of the damage layer 122. Alternatively, the laser beam 130 may traverse the entire surface of the damage layer 122 in a step-and-scan manner.
By way of example, the laser beam may be directed to the damage layer by providing appropriate optics (e.g., optical fibers, mirrors, lenses, etc.). The optics may be mounted, for example, on a stage movable in the X-Y plane. The laser beam is focused through a lens to the damage layer, where the light intensity of the focal spot, which may have a gaussian distribution, may have a diameter in the order of several hundred microns, for example. The laser beam is moved in the Y direction at a certain velocity (e.g. 5 cm/s). The time of each laser irradiation was 10- 3Of the order of s (e.g. 4x 10)-3s) the laser beam is moved stepwise or stepwise in the X-direction with a certain step size (e.g. 100um) until the entire damage layer is traversed by the laser beam.
The laser energy is allowed to penetrate throughout the damaged layer 122. The thickness of the damage layer 122 may be, for example, in the range of 0.2 micrometers (um) to 2 um. In one embodiment, the thickness of the damage layer is about 0.6um, and the laser beam can penetrate into the damage layer by about 1um, so that the irradiation of the laser beam can sufficiently cover the damage layer to convert the silicon carbide of the damage layer into a polycrystalline state. In some embodiments, the laser beam may irradiate the damage layer multiple times to achieve a desired depth. The silicon carbide of the damage layer 122 is easily removed by a chemical method after being converted into a polycrystalline state by laser processing. For example, the damage layer 122 may be removed by chemical wet etching using an acid solution, thereby leaving the final thinned wafer 100 (see fig. 2 d).
In accordance with another aspect of the present invention, FIG. 3 illustrates a wafer processing method 30 in accordance with another embodiment. At block 31, a wafer comprising silicon carbide is provided, the wafer having a first thickness and having a first side and a second side opposite the first side.
At block 32, a semiconductor device is fabricated or disposed on the first side. Semiconductor devices include, but are not limited to, schottky diodes, bipolar transistors (BJTs), Insulated Gate Bipolar Transistors (IGBTs), metal oxide field effect transistors (MOSFETs), Junction Field Effect Transistors (JFETs), semiconductor memory devices, semiconductor photovoltaic devices, and integrated circuits incorporating one or more of these devices. Semiconductor devices may be fabricated by suitable semiconductor processes including, for example and without limitation, one or more of epitaxial growth, ion implantation, photolithography, etching, metal deposition, interconnection, passivation, and the like.
At block 33, the second side of the wafer is ground such that the wafer is thinned from the first thickness to the second thickness and the second side creates a damaged layer. This grinding step may be accomplished, for example, by the method described above in connection with block 14 of fig. 1.
At block 34, the damage layer is laser processed to convert the silicon carbide of the damage layer to polycrystalline silicon carbide. This may be accomplished, for example, by the method described above in connection with block 16 of fig. 1.
At block 35, the damage layer is removed to thin the wafer from the second thickness to a third thickness. This can be achieved by suitable chemical methods, for exampleFor example, hydrofluoric acid (HF) and nitric acid (HNO) can be used in a certain ratio3) The solution is used for carrying out chemical treatment on the damage layer at a proper temperature. In this particular embodiment, HF and HNO are used3The solution with the volume ratio of 1:1 is used for carrying out chemical treatment on the damage layer at the temperature ranging from room temperature to 65 ℃. The first side of the wafer may be covered or wrapped with a protective gel to avoid contact with HF and HNO3Acid solution, then HF and HNO3The acid solution wet etches the wafer. Alternatively, HF is reacted with HNO3An acid solution is sprayed in the form of a chemical spray onto the damage layer on the second side of the wafer, thereby removing the damage layer.
After the damage layer is treated by laser, the chemical stability of polycrystalline silicon carbide is weakened, and the polycrystalline silicon carbide is easy to react with other chemical solutions. When the HF and HNO3 acid solution contacts the damage layer treated by the laser beam, the HF and the HNO3The acid solution will react with the silicon in the polycrystalline silicon carbide (in HNO)3In the presence of small amounts of HNO2):
HNO2+HNO3->2NO2+H2O;
2NO2+Si->Si2++2NO2 -
Si2++2(OH)-->SiO2+H2
SiO2+6HF->H2SiF6+2H2O。
Whether the damaged layer has been completely removed can be determined by detecting the degree of warpage of the wafer. For example, when the radius of the detected wafer warp is greater than a certain predetermined value, the damaged layer may be considered to have been substantially removed. The predetermined value may be set according to actual needs. Alternatively, the degree of warpage of the wafer can be measured by curvature. When the curvature of the wafer is detected to be less than a predetermined value, the damaged layer may be considered to have been substantially removed.
The thinned wafer may be subjected to further processing. For example, a metal layer (e.g., titanium or nickel) may be deposited (e.g., sputtered) as a back electrode on the second side after removal of the damage layer. Annealing the back electrode metal layer, e.g. in the wavelength rangeBetween 308nm and 355nm and with energy range of 2.8J/cm2To 4.8J/cm2The laser in between laser anneals the back metal layer.
According to still another aspect of the present invention, a semiconductor device is also provided. The semiconductor arrangement comprises a wafer processed by the method according to fig. 1 and 2a-2d, and a semiconductor device arranged on a first side of the wafer. Semiconductors may be selected according to practical needs, including but not limited to schottky diodes, bipolar transistors (BJTs), metal oxide field effect transistors (MOSFETs), Junction Field Effect Transistors (JFETs), semiconductor memory devices, semiconductor photovoltaic devices, and integrated circuits incorporating one or more of these devices.
In the above embodiments, silicon carbide is exemplified for convenience of description. It will be appreciated by those skilled in the art that the wafer processing methods disclosed herein are not limited to wafers of silicon carbide materials, but may be applied to semiconductor wafers of other suitable materials, such as silicon (Si), germanium (Ge), silicon germanium (SiGe), gallium nitride (GaN), gallium arsenide (GaAs), and the like.
In the above embodiments, an excimer laser is taken as an example for convenience of description. It will be appreciated by those skilled in the art that in some other embodiments, other suitable laser generating devices may be used, such as solid state lasers, gas state lasers, and the like. The laser beam may be irradiated according to actual requirements.
Although the above embodiments describe removing the damage layer with a hydrofluoric acid and nitric acid solution at a volume ratio of 1:1 after laser processing the damage layer, in some other embodiments, other ratios of hydrofluoric acid and nitric acid solutions may be used to remove the damage layer. Alternatively, other treatments may be used, such as with other suitable solutions (e.g., NaOH/Na)2O2Solution) at a certain temperature (e.g., 500 degrees celsius) or by dry etching.
Furthermore, it will be appreciated by those skilled in the art that the above embodiments are intended to illustrate the invention in different respects, and that they are not intended to be in isolation; rather, those skilled in the art can combine the different embodiments appropriately according to the above examples to obtain other technical solution examples.
Unless defined otherwise, technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Embodiments of the present invention are illustrated in non-limiting examples. Variations that may occur to those skilled in the art upon consideration of the above-disclosed embodiments are within the scope of the invention.

Claims (12)

1. A method of processing a wafer, comprising:
providing a wafer having a first side and a second side opposite the first side, the wafer comprising a single crystalline semiconductor material;
thinning the second side so as to generate a damaged layer on the thinned second side; and
and carrying out laser treatment on the damage layer so that the semiconductor material of the damage layer is converted into a polycrystalline state.
2. The wafer processing method as set forth in claim 1 wherein the step of laser processing comprises irradiating the damage layer with a laser beam having a wavelength ranging from 248nm to 532 nm.
3. The wafer processing method of claim 2, wherein the wavelength range is between 248nm and 308 nm.
4. A wafer processing method according to any of claims 1-3, characterized in that said step of laser treatment comprises applying an energy in the range of 2.0J/cm2To 5.0J/cm2The laser beam in between irradiates the damage layer.
5. The wafer processing method of claim 1, further comprising chemically wet etching the damage layer converted into a polycrystalline state to remove the damage layer.
6. A wafer processing method according to any of claims 1 to 3, characterized in that the semiconductor material is silicon carbide.
7. A method of processing a wafer, comprising:
providing a wafer comprising silicon carbide, the wafer having a first side and a second side opposite the first side, and having a first thickness;
providing a semiconductor device on the first side;
grinding the second side to thin the wafer from the first thickness to a second thickness and create a damaged layer on the second side;
laser processing the damage layer to convert the silicon carbide of the damage layer into polycrystalline silicon carbide; and
and removing the damage layer to thin the wafer from the second thickness to a third thickness.
8. The method of claim 7, wherein the step of removing the damage layer comprises chemically etching the damage layer with a solution of hydrofluoric acid and nitric acid.
9. The wafer processing method of claim 8, further comprising detecting a radius or curvature of the wafer warp to determine if the damage layer has been completely removed.
10. The wafer processing method of claim 7, further comprising:
depositing a metal layer on the second side; and
the wavelength range is between 248nm and 532nm, and the energy range is 2.8J/cm2To 4.8J/cm2The laser annealing is performed on the metal layer.
11. A semiconductor device, comprising:
a wafer obtained by the method according to any one of claims 1 to 6; and
a semiconductor device disposed on a first side of the wafer.
12. The semiconductor device according to claim 11, wherein the semiconductor device is selected from one or more of the following groups: schottky diodes, bipolar transistors, insulated gate bipolar transistors, metal oxide field effect transistors, junction field effect transistors, semiconductor memory devices, semiconductor photovoltaic devices.
CN201910127050.9A 2019-02-20 2019-02-20 Wafer processing method and semiconductor device Pending CN111599670A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113097068A (en) * 2021-03-31 2021-07-09 中国科学院微电子研究所 Method for manufacturing semiconductor device
CN115938927A (en) * 2022-12-28 2023-04-07 芯钛科半导体设备(上海)有限公司 Ultrathin wafer thinning process

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1419708A (en) * 2000-03-17 2003-05-21 瓦里安半导体设备联合公司 Method of formation jonctions by laser annealing and rapid thermal annealing
JP2009272314A (en) * 2008-04-30 2009-11-19 Shin Etsu Handotai Co Ltd Multilayer silicon semiconductor wafer and method of manufacturing the same
JP2010050175A (en) * 2008-08-20 2010-03-04 Disco Abrasive Syst Ltd Laser processing method and laser processing device
CN102324220A (en) * 2005-07-14 2012-01-18 株式会社半导体能源研究所 Semiconductor device and drive method thereof
CN102859652A (en) * 2010-04-29 2013-01-02 株式会社日本制钢所 Method of manufacturing crystalline semiconductor and laser anneal apparatus
CN104718604A (en) * 2012-10-23 2015-06-17 富士电机株式会社 Semiconductor device manufacturing method
CN105097480A (en) * 2015-08-08 2015-11-25 海门市明阳实业有限公司 Wafer thinning processing method

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1419708A (en) * 2000-03-17 2003-05-21 瓦里安半导体设备联合公司 Method of formation jonctions by laser annealing and rapid thermal annealing
CN102324220A (en) * 2005-07-14 2012-01-18 株式会社半导体能源研究所 Semiconductor device and drive method thereof
JP2009272314A (en) * 2008-04-30 2009-11-19 Shin Etsu Handotai Co Ltd Multilayer silicon semiconductor wafer and method of manufacturing the same
JP2010050175A (en) * 2008-08-20 2010-03-04 Disco Abrasive Syst Ltd Laser processing method and laser processing device
CN102859652A (en) * 2010-04-29 2013-01-02 株式会社日本制钢所 Method of manufacturing crystalline semiconductor and laser anneal apparatus
CN104718604A (en) * 2012-10-23 2015-06-17 富士电机株式会社 Semiconductor device manufacturing method
CN105097480A (en) * 2015-08-08 2015-11-25 海门市明阳实业有限公司 Wafer thinning processing method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
罗晋生, 国防工业出版社 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113097068A (en) * 2021-03-31 2021-07-09 中国科学院微电子研究所 Method for manufacturing semiconductor device
CN115938927A (en) * 2022-12-28 2023-04-07 芯钛科半导体设备(上海)有限公司 Ultrathin wafer thinning process
CN115938927B (en) * 2022-12-28 2024-02-09 芯钛科半导体设备(上海)有限公司 Ultrathin wafer thinning process

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