CN111596183A - Multichannel gain controllable photoelectric detection system and method thereof - Google Patents
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Abstract
The invention discloses a multichannel gain controllable photoelectric detection system and a method thereof, wherein the multichannel gain controllable photoelectric detection system comprises: the multi-channel gain adjusting subsystem finishes the acquisition of voltage signals through the main FPGA module, calculates the gain adjusting control voltage of the photoelectric detection system, finishes the output of the gain adjusting control voltage through the FPGA module, and finally displays and stores the voltage signals of the photoelectric detection system through the acquisition subsystem. The invention can adaptively adjust the gain of the multi-channel photoelectric detection system, thereby realizing the optimal processing of detection signals with different magnitudes.
Description
Technical Field
The invention belongs to the technical field of photoelectric detection, and particularly relates to a multichannel gain-controllable photoelectric detection system and a method thereof.
Background
The photoelectric detection system is an electronic system for converting optical information into electronic information, and is widely applied to various fields, such as the field of plasma physics. The radiation energy of the plasma in the tokamak device generates larger difference along with the different auxiliary heating power, and a matched photoelectric detection system is required to have the capabilities of high gain, quick response time and quick gain change due to the fact that the signal is very weak, the amplitude range is larger, and even the difference is several orders of magnitude.
In the discharge experiment process of the tokamak device, due to the experiment specificity, the environment is in a closed and unopened state, and a part of diagnosed photoelectric detection systems need to have the capability of changing the system gain in real time to realize the optimization of diagnosis signals.
The photoelectric detection system adopts a PMT module as a photoelectric sensor. At present, the traditional PMT module gain adjusting method is to adjust the gain of the PMT module by manually adjusting the control voltage by using a potentiometer, and the adjusting mode needs personal experience and can only be carried out in an experimental site, so that the operation is very inconvenient. Meanwhile, for signals with faster time response, the potentiometer cannot be adjusted to a proper control voltage value in real time through manual adjustment, the relative delay time is long, and the accuracy of signal acquisition is affected.
Disclosure of Invention
The invention aims to solve the defects of the prior art and provides a multichannel gain-controllable photoelectric detection system and a method thereof, so that the photoelectric detection system is not limited by environment, has high gain and fast response time and can adaptively adjust the gain of the multichannel system, and thus, the optimal processing of detection signals with different magnitudes can be realized.
In order to achieve the purpose, the invention adopts the following technical scheme:
the invention relates to a multichannel gain controllable photoelectric detection system which is characterized by comprising the following components: the system comprises a multi-channel gain adjustment subsystem, n PMT modules, n current amplifiers and an acquisition subsystem;
the multi-channel gain adjustment subsystem comprises: the system comprises a master FPGA module and m slave FPGA modules;
an ith PMT module, an ith current amplifier and the acquisition subsystem form an ith photoelectric detection subsystem; i is more than or equal to 1 and less than or equal to n;
the ith PMT module converts the received optical signal into an ith current signal Ii；
The ith current amplifier converts the ith current signal IiAmplifying and converting to obtain the ith path voltage signal Ui；
The main FPGA module collects the ith path of voltage signal UiAnd judging the ith path voltage signal UiIf the amplitude is over-saturated or too small, the ith path of gain adjustment control voltage V is calculatediAnd the signal is sent to a corresponding slave FPGA module, and the corresponding slave FPGA module outputs the signal to the ith PMT module, so that the gain of the ith photoelectric detection subsystem is changed, and the self-adaptive detection of the photoelectric detection system on the optical signal is realized; otherwise, directly transmitting the ith path voltage signal UiThe voltage signal U is sent to the acquisition subsystem for the ith path of voltage signal UiAnd displaying and storing.
The photoelectric detection system of the present invention is also characterized in that the main FPGA module includes: the device comprises an ADC module and a main FPGA core module;
the main FPGA core module comprises: the device comprises an ADC controller, a gain adjustment calculation module, a weight memory, a main SPI module and a main logic control module;
the ADC module converts the ith voltage signal UiConverting the digital quantity into the ith path of digital quantity and sending the ith path of digital quantity into a main FPGA core module;
under the main logic control module, the ADC controller receives and stores the ith path of digital quantity in the current period;
the gain adjustment calculation module subtracts the ith path of digital quantity in the current period from the expected output voltage to obtain the ith path of gain adjustment error in the current periodi；
The weight calculation module adjusts the ith path gain error in the current periodiMultiplying the iteration step length u and the ith digital quantity to obtain an intermediate value A, and respectively adding the intermediate value A and each component of the ith weight vector in the previous period to obtain the ith weight vector in the current period; let the initial weight vector be w0；
The weight value memory stores the ith path weight value vector in the current period;
the gain adjustment calculation module multiplies and accumulates the ith digital quantity in the current period and the ith weight value vector in the current period to obtain the ith gain adjustment control voltage V in the current periodi；
The main SPI module adjusts the ith path of gain to control voltage ViAnd sending the data to the corresponding slave FPGA module.
The slave FPGA module includes: the DAC module and the slave FPGA core module;
the slave FPGA core module comprises: the slave SPI module, the data memory, the data distribution processing, the slave logic control module, the DA controller and the DAC module;
under the slave logic control module, the slave SPI module receives an ith gain adjustment control voltage ViAnd sending the data to the data memory for storage;
the data distribution process reads the ith path of gain adjustment control voltage ViAnd distributed to the DA controller corresponding to the ith PMT module;
the DA controller generates a DA control signal to the DAC module;
the DAC moduleAdjusting the ith path gain by a control voltage ViAnd converting the analog quantity into the ith gain adjustment control analog quantity, and outputting the ith gain adjustment control analog quantity to the ith PMT module.
The invention relates to a multichannel gain controllable photoelectric detection method which is characterized by being applied to a detection system consisting of a main FPGA module, m slave FPGA modules, n PMT modules, n current amplifiers and an acquisition subsystem, wherein an ith photoelectric detection subsystem consists of any ith PMT module, an ith current amplifier and the acquisition subsystem, and the photoelectric detection method is carried out according to the following steps:
step 1, the ith PMT module converts the received optical signal into the ith current signal Ii；
Step 2, the ith current amplifier converts the ith current signal IiAmplifying and converting to obtain the ith path voltage signal Ui；
Step 3, the main FPGA module collects the ith path voltage signal UiAnd judging the ith path voltage signal UiIs oversaturated or too small, if yes, the step 4 is executed; otherwise, go to step 6
Step 4, the main FPGA module calculates the ith path gain adjustment control voltage ViAnd sending the data to the corresponding slave FPGA module;
step 5, correspondingly outputting the signal from the FPGA module to the ith PMT module, and returning to the step 1 after changing the gain of the ith photoelectric detection subsystem;
step 6, directly converting the ith path of voltage signal UiThe voltage signal U is sent to the acquisition subsystem for the ith path of voltage signal UiAnd displaying and storing.
Compared with the prior art, the invention has the beneficial effects that:
1. the invention realizes the self-adaptive detection of the multi-channel photoelectric detection system on the optical signals with short existence time and different magnitudes by the multi-channel gain adjustment subsystem, the PMT module, the current amplifier and the acquisition subsystem.
2. According to the invention, through the multi-channel gain adjustment subsystem, the main FPGA module is utilized to complete the acquisition of the voltage signal, the gain adjustment control voltage of the photoelectric detection system is calculated, and the slave FPGA module completes the output of the gain adjustment control voltage, so that the adjustment of the gain of the photoelectric detection system can be rapidly and accurately completed, the delay time is reduced, and the accuracy of the signal acquisition is improved.
3. The multi-channel gain adjustment subsystem of the invention applies the digital and integrated design, and can self-adaptively and rapidly adjust the gain of the multi-channel photoelectric detection system through the gain adjustment calculation module and the weight calculation module, so that the photoelectric detection system can self-adaptively detect multi-channel optical signals without being influenced by complex environment.
Drawings
FIG. 1 is a schematic diagram of a multi-channel gain-controllable photoelectric detection system according to the present invention;
FIG. 2 is a hardware diagram of the main FPGA of the multi-channel gain adjustment subsystem of the present invention;
FIG. 3 is a hardware diagram of the slave FPGA of the multi-channel gain adjustment subsystem of the present invention.
Detailed Description
In this embodiment, as shown in fig. 1, a multichannel gain-controllable photodetection system includes: the system comprises a multi-channel gain adjustment subsystem, n PMT modules, n current amplifiers and an acquisition subsystem;
the multi-channel gain adjustment subsystem comprises: the system comprises a master FPGA module and m slave FPGA modules;
an ith PMT module, an ith current amplifier and an acquisition subsystem form an ith photoelectric detection subsystem; i is more than or equal to 1 and less than or equal to n;
the ith PMT module converts the received optical signal into the ith current signal Ii；
The ith current amplifier converts the ith current signal IiAmplifying and converting to obtain the ith path voltage signal Ui；
When the ith path voltage signal U is detectediThen, a main FPGA module in the multi-channel gain adjustment subsystem starts to acquire the ith voltage signal UiAnd judging the ith path voltage signal UiIs over-saturated or too small, if electricity is judgedPressure signal UiIf the saturation is over-low, the ith path of gain adjustment control voltage V is calculated by an algorithmiThe signal is sent to the corresponding slave FPGA module and is output to the ith PMT module by the corresponding slave FPGA module, so that the gain of the ith photoelectric detection subsystem is changed to realize the self-adaptive detection of the photoelectric detection system on the optical signal, and the signal of the ith photoelectric detection subsystem after the self-adaptive gain adjustment is displayed as the optimal state in the acquisition system; if the voltage signal U is judgediIf the voltage is at a normal level, the ith path of voltage signal U is directly transmittediSending the voltage signal to an acquisition subsystem for carrying out voltage signal U on the ith pathiAnd displaying and storing.
In specific implementation, as shown in fig. 2, the main FPGA module includes: the device comprises an ADC module and a main FPGA core module;
the main FPGA core module comprises: the device comprises an ADC controller, a gain adjustment calculation module, a weight memory, a main SPI module and a main logic control module;
when the circuit works, the main logic control module sends out a logic control signal, and the ADC controller controls the ADC module to enable the ith voltage signal U to be transmittediConverting the analog quantity into an ith path of digital quantity and sending the ith path of digital quantity into a main FPGA core module;
meanwhile, the ADC controller receives and stores the ith path of digital quantity in the current period;
the gain adjustment calculation module reads an ith path voltage signal UiThen, the ith digital quantity in the current period is subtracted from the expected output voltage to obtain the ith gain adjustment error in the current periodi；
The weight calculation module adjusts the ith path gain error in the current periodiMultiplying the iteration step length u and the ith digital quantity to obtain an intermediate value A, and respectively adding the intermediate value A and each component of the ith weight vector in the previous period to obtain the ith weight vector in the current period; let the initial weight vector be w0；
The weight value memory stores the ith path weight value vector in the current period;
get the ith way under the current cycleAfter the weight vector is obtained, the gain adjustment calculation module multiplies and accumulates the ith digital quantity in the current period and the ith weight vector in the current period to obtain the ith gain adjustment control voltage V in the current periodi；
Finally, the ith path of gain is adjusted by the main SPI module to control the voltage ViAnd sending the data to the corresponding slave FPGA module.
In a specific implementation, as shown in fig. 3, the slave FPGA module includes: the DAC module and the slave FPGA core module;
the slave FPGA core module comprises: the slave SPI module, the data memory, the data distribution processing, the slave logic control module, the DA controller and the DAC module;
under the control of the slave logic control module, the slave SPI module receives the ith gain adjustment control voltage ViAnd sending to a data storage for storage;
after the data is received, the data distribution process reads the ith path of gain adjustment control voltage ViAnd distributed to the DA controller corresponding to the ith PMT module;
the DA controller generates DA control signals to the corresponding DAC module;
the DAC module adjusts the ith path of gain by the control voltage ViConverting digital quantity into ith path gain regulation control voltage ViAnd the analog quantity is output to the ith PMT module, so that the gain adjustment of the ith photoelectric detection system is realized. .
In this embodiment, a multichannel gain-controllable photoelectric detection method is applied to a detection system including a master FPGA module, m slave FPGA modules, n PMT modules, n current amplifiers, and an acquisition subsystem, and an ith photoelectric detection subsystem including any ith PMT module, ith current amplifier, and acquisition subsystem, and the photoelectric detection method is performed according to the following steps:
step 1, the ith PMT module converts the received optical signal into the ith current signal Ii；
Step 2, the ith current amplifier converts the ith current signal IiAmplifying and converting to obtain the ith path voltage signal Ui；
Step 3, the main FPGA module collects the ith path voltage signal UiAnd judging the ith path voltage signal UiIs oversaturated or too small, if yes, the step 4 is executed; otherwise, go to step 6
Step 4, the main FPGA module calculates the ith path gain adjustment control voltage ViAnd sending the data to the corresponding slave FPGA module;
step 5, correspondingly outputting the ith path of gain adjustment control voltage V from the FPGA moduleiGiving the ith PMT module, thereby changing the gain of the ith photoelectric detection subsystem, and returning to the step 1;
step 6, directly converting the ith path of voltage signal UiSending the voltage signal to an acquisition subsystem for carrying out voltage signal U on the ith pathiAnd displaying and storing.
Claims (4)
1. A multi-channel gain-controllable photoelectric detection system is characterized by comprising: the system comprises a multi-channel gain adjustment subsystem, n PMT modules, n current amplifiers and an acquisition subsystem;
the multi-channel gain adjustment subsystem comprises: the system comprises a master FPGA module and m slave FPGA modules;
an ith PMT module, an ith current amplifier and the acquisition subsystem form an ith photoelectric detection subsystem; i is more than or equal to 1 and less than or equal to n;
the ith PMT module converts the received optical signal into an ith current signal Ii；
The ith current amplifier converts the ith current signal IiAmplifying and converting to obtain the ith path voltage signal Ui；
The main FPGA module collects the ith path of voltage signal UiAnd judging the ith path voltage signal UiIf the amplitude is over-saturated or too small, the ith path of gain adjustment control voltage V is calculatediAnd the signal is sent to a corresponding slave FPGA module, and the corresponding slave FPGA module outputs the signal to the ith PMT module, so that the gain of the ith photoelectric detection subsystem is changed, and the self-adaptive detection of the photoelectric detection system on the optical signal is realized; otherwise, directlyThe ith path of voltage signal UiThe voltage signal U is sent to the acquisition subsystem for the ith path of voltage signal UiAnd displaying and storing.
2. The photodetection system according to claim 1, characterized in that the main FPGA module comprises: the device comprises an ADC module and a main FPGA core module;
the main FPGA core module comprises: the device comprises an ADC controller, a gain adjustment calculation module, a weight memory, a main SPI module and a main logic control module;
the ADC module converts the ith voltage signal UiConverting the digital quantity into the ith path of digital quantity and sending the ith path of digital quantity into a main FPGA core module;
under the main logic control module, the ADC controller receives and stores the ith path of digital quantity in the current period;
the gain adjustment calculation module subtracts the ith path of digital quantity in the current period from the expected output voltage to obtain the ith path of gain adjustment error in the current periodi；
The weight calculation module adjusts the ith path gain error in the current periodiMultiplying the iteration step length u and the ith digital quantity to obtain an intermediate value A, and respectively adding the intermediate value A and each component of the ith weight vector in the previous period to obtain the ith weight vector in the current period; let the initial weight vector be w0；
The weight value memory stores the ith path weight value vector in the current period;
the gain adjustment calculation module multiplies and accumulates the ith digital quantity in the current period and the ith weight value vector in the current period to obtain the ith gain adjustment control voltage V in the current periodi；
The main SPI module adjusts the ith path of gain to control voltage ViAnd sending the data to the corresponding slave FPGA module.
3. The photodetection system according to claim 1, characterized in that the slave FPGA module comprises: the DAC module and the slave FPGA core module;
the slave FPGA core module comprises: the slave SPI module, the data memory, the data distribution processing, the slave logic control module, the DA controller and the DAC module;
under the slave logic control module, the slave SPI module receives an ith gain adjustment control voltage ViAnd sending the data to the data memory for storage;
the data distribution process reads the ith path of gain adjustment control voltage ViAnd distributed to the DA controller corresponding to the ith PMT module;
the DA controller generates a DA control signal to the DAC module;
the DAC module adjusts the ith gain to control the voltage ViAnd converting the analog quantity into the ith gain adjustment control analog quantity, and outputting the ith gain adjustment control analog quantity to the ith PMT module.
4. A multi-channel gain-controllable photoelectric detection method is characterized by being applied to a detection system consisting of a main FPGA module, m slave FPGA modules, n PMT modules, n current amplifiers and an acquisition subsystem, and an ith photoelectric detection subsystem consisting of any ith PMT module, an ith current amplifier and the acquisition subsystem, wherein the photoelectric detection method comprises the following steps:
step 1, the ith PMT module converts the received optical signal into the ith current signal Ii；
Step 2, the ith current amplifier converts the ith current signal IiAmplifying and converting to obtain the ith path voltage signal Ui；
Step 3, the main FPGA module collects the ith path voltage signal UiAnd judging the ith path voltage signal UiIs oversaturated or too small, if yes, the step 4 is executed; otherwise, go to step 6
Step 4, the main FPGA module calculates the ith path gain adjustment control voltage ViAnd sending the data to the corresponding slave FPGA module;
step 5, correspondingly outputting the signal from the FPGA module to the ith PMT module, and returning to the step 1 after changing the gain of the ith photoelectric detection subsystem;
step 6, directly converting the ith path of voltage signal UiThe voltage signal U is sent to the acquisition subsystem for the ith path of voltage signal UiAnd displaying and storing.
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| CN117572115A (en) * | 2023-11-15 | 2024-02-20 | 河北工程大学 | Photomultiplier signal detection method based on FPGA |
| CN117572115B (en) * | 2023-11-15 | 2024-05-10 | 河北工程大学 | Photomultiplier signal detection method based on FPGA |
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