CN111584657A - Semiconductor material, preparation method and application thereof, laser and photoelectric detector - Google Patents

Semiconductor material, preparation method and application thereof, laser and photoelectric detector Download PDF

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CN111584657A
CN111584657A CN202010445691.1A CN202010445691A CN111584657A CN 111584657 A CN111584657 A CN 111584657A CN 202010445691 A CN202010445691 A CN 202010445691A CN 111584657 A CN111584657 A CN 111584657A
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buffer layer
gaas
layer
silicon substrate
semiconductor material
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CN111584657B (en
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杜鹏
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Hunan Klaette Photoelectric Co ltd
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Hunan Klaette Photoelectric Co ltd
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Abstract

The invention relates to the field of semiconductors, and particularly provides a semiconductor material, a preparation method and application thereof, a laser and a photoelectric detector. The semiconductor material comprises a silicon substrate, a first GaAs buffer layer and G which are arranged in sequenceaSb buffer layer and InAs (Sb)/InxGa1‑xAsySb1‑yA superlattice of which 0<x<1，0<y<1. In the semiconductor material, a silicon substrate and InAs (Sb)/InxGa1‑xAsySb1‑yThe degree of lattice mismatch and thermal mismatch between the superlattices is low, and the dislocation defect density in the superlattices is low and the quality is high.

Description

Semiconductor material, preparation method and application thereof, laser and photoelectric detector
Technical Field
The invention relates to the field of semiconductors, in particular to a semiconductor material, a preparation method and application thereof, a laser and a photoelectric detector.
Background
The silicon substrate is low in price, the microelectronic process mainly based on the silicon material is mature, the semiconductor material with the largest size and mature device process can be obtained, and the manufacturing cost of the semiconductor material is reduced. The material for manufacturing the semiconductor material on the silicon substrate firstly solves the problems of lattice mismatch and thermal mismatch between the silicon substrate and the epitaxial layer, wherein the lattice mismatch and the thermal mismatch can cause the defects of dislocation and the like in the epitaxial process, thereby seriously reducing the quality of the epitaxial layer.
InAs(Sb)/InxGa1-xAsySb1-yThe superlattice is an important active region and absorption region material of an infrared laser and a photoelectric detector, and has wide application prospect. Currently, InAs (Sb)/InxGa1-xAsySb1-yThe research on the superlattice is still rare, and when the superlattice is epitaxially grown on a silicon substrate, the problems of lattice mismatch and thermal mismatch also exist, so that the quality of the obtained superlattice is not high.
In view of the above, the present invention is particularly proposed.
Disclosure of Invention
The first purpose of the invention is to provide a semiconductor material, In the device, a silicon substrate and InAs (Sb)/InxGa1-xAsySb1-yThe degree of lattice mismatch and thermal mismatch between the superlattices is low, and the dislocation defect density in the superlattices is low and the quality is high.
The second purpose of the invention is to provide a preparation method of the semiconductor material.
The third purpose of the present invention is to provide an application of the semiconductor material in a laser or a photoelectric detector.
A fourth object of the present invention is to provide a laser or photodetector.
In order to achieve the above purpose of the present invention, the following technical solutions are adopted:
in a first aspect, the invention provides a semiconductor material comprising a silicon substrate, an intermediate layer and InAs (Sb)/In arranged In that orderxGa1-xAsySb1-yA superlattice, an intermediate layer including a first GaAs buffer layer and a GaSb buffer layerLayer of which 0<x<1，0<y<1。
As a further preferable technical proposal, the silicon substrate, the first GaAs buffer layer, the GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the thickness of the intermediate layer is 100-. As a further preferable technical solution, the intermediate layer further includes at least one of a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer, or a Ge buffer layer.
As a further preferable technical scheme, the middle layer also comprises a GaAs/AlAs superlattice dislocation filter layer, a silicon substrate, a first GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the intermediate layer further comprises a Ge buffer layer, a silicon substrate, a Ge buffer layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the interlayer further comprises a GaAs/AlAs superlattice dislocation filter layer and a second GaAs buffer layer, a silicon substrate, a second GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the interlayer further comprises a GaAs/AlAs superlattice dislocation filter layer and a Ge buffer layer, a silicon substrate, a Ge buffer layer, a first GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the intermediate layer further comprises a second GaAs buffer layer and a Ge buffer layer, a silicon substrate, a Ge buffer layer, a second GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the first and second electrodes are formed of a metal,the middle layer also comprises a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer and a Ge buffer layer, a silicon substrate, a Ge buffer layer, a second GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
As a further preferred embodiment, the silicon substrate comprises a patterned silicon substrate.
As a further preferable technical solution, the semiconductor material further includes a cap layer disposed on inas (sb)/InxGa1-xAsySb1-yThe side of the superlattice remote from the silicon substrate;
preferably, the cap layer comprises a GaSb cap layer.
In a second aspect, the present invention provides a method for preparing the above semiconductor material, including: growing an intermediate layer and InAs (Sb)/In on a silicon substrate In sequencexGa1-xAsySb1-yAnd superlattice to obtain the semiconductor material.
As a further preferred solution, the method further comprises at least one of the following steps (a) - (c):
(a) on a silicon substrate and InAs (Sb)/InxGa1-xAsySb1-yAt least one of a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer or a Ge buffer layer grows between the superlattices;
(b) patterning the silicon substrate;
(c) in InAs (Sb)/InxGa1-xAsySb1-yA cap layer is grown on the side of the superlattice remote from the silicon substrate.
In a third aspect, the invention provides an application of the semiconductor material or the semiconductor material obtained by the preparation method in a laser;
or the semiconductor material obtained by the preparation method is applied to a photoelectric detector.
In a fourth aspect, the present invention provides a laser, including the semiconductor material or the semiconductor material obtained by the above preparation method;
or, the photoelectric detector comprises the semiconductor material or the semiconductor material obtained by the preparation method.
Compared with the prior art, the invention has the beneficial effects that:
the semiconductor material provided by the invention is prepared by mixing a silicon substrate and InAs (Sb)/InxGa1-xAsySb1-yAn intermediate layer comprising a first GaAs buffer layer and a GaSb buffer layer is arranged between the superlattices, lattice mismatch and thermal mismatch between the silicon substrate and the superlattices can be effectively relieved, and dislocation defects in the superlattices are low in density and high in quality.
The design principle is lattice matching layer by layer, with a mismatch of about 4% for Si and about 12% for Si and GaSb. That is, the first layer of material grown on Si, whose lattice needs to be close to Si, is chosen to be GaAs. The GaAs/AlAs superlattice dislocation filter layer can be matched with GaAs, and GaSb and InAs (Sb)/InxGa1-xAsySb1-ySuperlattice matching, so the layer-by-layer matching mode is important.
Drawings
FIG. 1 is a schematic structural view of a semiconductor material according to example 1;
FIG. 2 is a schematic structural view of a semiconductor material according to embodiment 2;
fig. 3 is a schematic structural diagram of a semiconductor material in embodiment 3.
Icon: 1-a silicon substrate; 2-patterning a silicon substrate; 3-a first GaAs buffer layer; 4-InAs (Sb)/InxGa1- xAsySb1-yA superlattice; 5-GaSb buffer layer; 6-GaAs/AlAs superlattice dislocation filter layer; 7-a second GaAs buffer layer; an 8-GaSb cap layer; a 9-Ge buffer layer.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to examples, but it will be understood by those skilled in the art that the following examples are only illustrative of the present invention and should not be construed as limiting the scope of the present invention. The examples, in which specific conditions are not specified, were conducted under conventional conditions or conditions recommended by the manufacturer.
According to one aspect of the invention, a semiconductor material is provided, comprising a silicon substrate, an intermediate layer and InAs (Sb)/In arranged In sequencexGa1-xAsySb1-yA superlattice, the intermediate layer comprising a first GaAs buffer layer and a GaSb buffer layer, wherein 0<x<1，0<y<1。
The semiconductor material is prepared by mixing InAs (Sb)/In with a silicon substratexGa1-xAsySb1-yAn intermediate layer comprising a first GaAs buffer layer and a GaSb buffer layer is arranged between the superlattices, lattice mismatch and thermal mismatch between the silicon substrate and the superlattices can be effectively relieved, and dislocation defects in the superlattices are low in density and high in quality.
It should be noted that:
InAs(Sb)/InxGa1-xAsySb1-ythe symbol "/" In the superlattice represents a "sum", i.e., InAs (Sb)/InxGa1- xAsySb1-yThe superlattice refers to InAs (Sb) and InxGa1-xAsySb1-yA superlattice formed by alternately stacking growth, wherein InAs (Sb) refers to an alloy formed by replacing partial As in InAs by Sb, wherein As accounts for 91 percent, and Sb accounts for 9 percent; inxGa1- xAsySb1-yWherein x and y are each independently any value between 0 and 1 (excluding 0 and 1).
The silicon substrate may have a (100) crystal plane or a (111) crystal plane.
In a preferred embodiment, the silicon substrate, the first GaAs buffer layer, the GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
In the semiconductor material provided by the preferred embodiment, the first GaAs buffer layer and the GaSb buffer layer in the intermediate layer have a specific positional relationship with the silicon substrate, and the arrangement modes can achieve the effect of adjusting lattice parameters, so that the matching of the lattice parameters between the silicon substrate and the superlattice is better.
Preferably, the thickness of the intermediate layer is 100-. The thickness of the intermediate layer is typically, but not limited to, 100, 500, 1000, 1500, 2000, 2500, 3000, 3500, 4000, 4500, or 5000 nm.
In a preferred embodiment, the intermediate layer further comprises at least one of a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer, or a Ge buffer layer. By extending the composition of the intermediate layer, the lattice mismatch between the silicon substrate and the superlattice can be further reduced.
For example, the intermediate layer further comprises: a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer, a Ge buffer layer, a combination of the GaAs/AlAs superlattice dislocation filter layer and the second GaAs buffer layer, a combination of the second GaAs buffer layer and the Ge buffer layer, a combination of the GaAs/AlAs superlattice dislocation filter layer and the Ge buffer layer, or a combination of the GaAs/AlAs superlattice dislocation filter layer, the second GaAs buffer layer and the Ge buffer layer.
When the intermediate layer further comprises the above at least two different layers, the at least two different layers are aligned with the remaining layers (e.g. with the silicon substrate, the first GaAs buffer layer, the GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-ySuperlattice) is not particularly limited. For example, when the interlayer further comprises a combination of a GaAs/AlAs superlattice dislocation filter layer and a second GaAs buffer layer, it may be: a silicon substrate, a second GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
The "GaAs/AlAs superlattice dislocation filter layer" refers to a superlattice formed by alternately growing GaAs and AlAs in a stacked manner.
In a preferred embodiment, the interlayer further comprises a GaAs/AlAs superlattice dislocation filter layer, a silicon substrate, a first GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
Preferably, the intermediate layer further comprises a Ge buffer layer, a silicon substrate, a Ge buffer layer, a second layerA GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
Preferably, the interlayer further comprises a GaAs/AlAs superlattice dislocation filter layer and a second GaAs buffer layer, a silicon substrate, a second GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
Preferably, the interlayer further comprises a GaAs/AlAs superlattice dislocation filter layer and a Ge buffer layer, a silicon substrate, a Ge buffer layer, a first GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
Preferably, the intermediate layer further comprises a second GaAs buffer layer and a Ge buffer layer, a silicon substrate, a Ge buffer layer, a second GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
Preferably, the interlayer further comprises a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer and a Ge buffer layer, a silicon substrate, a Ge buffer layer, a second GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
In a preferred embodiment, the silicon substrate comprises a patterned silicon substrate. The "patterned silicon substrate" refers to a silicon substrate having a pattern of a concave-convex structure on the surface.
In a preferred embodiment, the semiconductor material further comprises a cap layer disposed on InAs (Sb)/InxGa1-xAsySb1-yThe side of the superlattice remote from the silicon substrate. In InAs (Sb)/InxGa1-xAsySb1-yThe superlattice may have a side in contact with the intermediate layers and a side not in contact with the intermediate layers, the side facing away from the silicon substrate"i.e. the side which is not in contact with the intermediate layers, is at a greater distance from the silicon substrate than the other side.
Preferably, the cap layer comprises a GaSb cap layer.
According to another aspect of the present invention, there is provided a method for preparing the semiconductor material, comprising: growing an intermediate layer and InAs (Sb)/In on a silicon substrate In sequencexGa1-xAsySb1-yAnd superlattice to obtain the semiconductor material. The preparation method has simple process, is suitable for industrial production, and the obtained semiconductor material has low lattice mismatch and thermal mismatch degree, less defects and high quality.
In a preferred embodiment, the method further comprises at least one of the following steps (a) - (c):
(a) on a silicon substrate and InAs (Sb)/InxGa1-xAsySb1-yAt least one of a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer or a Ge buffer layer grows between the superlattices;
(b) patterning the silicon substrate;
(c) in InAs (Sb)/InxGa1-xAsySb1-yA cap layer is grown on the side of the superlattice remote from the silicon substrate.
By adding at least one of the steps, the structural form of the semiconductor material is further enriched, the lattice mismatch degree of the semiconductor material is lower, the dislocation defect density in the superlattice is lower, and the quality of the semiconductor material is higher.
Optionally, when each buffer layer or superlattice is grown, an epitaxial growth mode can be adopted; the silicon substrate may be patterned by etching.
It should be noted that the process parameters not mentioned in the present invention can all adopt the parameters commonly used in the art, and the present invention is not particularly limited thereto.
According to another aspect of the present invention there is provided a use of the above semiconductor material in a laser or photodetector. The semiconductor material is applied to a laser or a photoelectric detector, and the quality and the performance of the laser or the photoelectric detector can be effectively improved.
According to another aspect of the present invention, there is provided a laser or photodetector comprising the above semiconductor material. The laser or photodetector comprises the semiconductor material, and thus has at least the advantages of high quality and good performance.
Example 1
A semiconductor material comprises a silicon substrate 1, a second GaAs buffer layer 7, a GaAs/AlAs superlattice dislocation filter layer 6, a first GaAs buffer layer 3, a GaSb buffer layer 5, InAs (Sb)/InxGa1-xAsySb1-yA superlattice 4 and a GaSb cap layer 8.
Example 2
A semiconductor material comprises a silicon substrate 1, a Ge buffer layer 9, a first GaAs buffer layer 3, a GaSb buffer layer 5, InAs (Sb)/InxGa1-xAsySb1-yA superlattice 4 and a GaSb cap layer 8.
Example 3
A semiconductor material, as shown In FIG. 3, comprises a patterned silicon substrate 2, a first GaAs buffer layer 3, a GaSb buffer layer 5, InAs (Sb)/InxGa1-xAsySb1-yA superlattice 4 and a GaSb cap layer 8.
The defect density of the semiconductor materials of examples 1-3 can be reduced to 10-5cm-1The defect density is much lower than that of the existing semiconductor material.
While particular embodiments of the present invention have been illustrated and described, it would be obvious that various other changes and modifications can be made without departing from the spirit and scope of the invention. It is therefore intended to cover in the appended claims all such changes and modifications that are within the scope of this invention.

Claims (10)

1. The semiconductor material is characterized by comprising a silicon substrate, an intermediate layer and InAs (Sb)/In which are sequentially arrangedxGa1- xAsySb1-yA superlattice with an intermediate layer comprising a first GaAs buffer layerAnd a GaSb buffer layer of 0<x<1，0<y<1。
2. The semiconductor material of claim 1, wherein the silicon substrate, the first GaAs buffer layer, the GaSb buffer layer, and the InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the thickness of the intermediate layer is 100-.
3. The semiconductor material of claim 1, wherein the intermediate layer further comprises at least one of a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer, or a Ge buffer layer.
4. The semiconductor material of claim 3, wherein the interlayer further comprises a GaAs/AlAs superlattice dislocation filter, a silicon substrate, a first GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter, a first GaAs buffer layer, a GaSb buffer layer, and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the intermediate layer further comprises a Ge buffer layer, a silicon substrate, a Ge buffer layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the interlayer further comprises a GaAs/AlAs superlattice dislocation filter layer and a second GaAs buffer layer, a silicon substrate, a second GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the interlayer further comprises a GaAs/AlAs superlattice dislocation filter layer and a Ge buffer layer, a silicon substrate, a Ge buffer layer, a first GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferablyThe intermediate layer also comprises a second GaAs buffer layer and a Ge buffer layer, a silicon substrate, the Ge buffer layer, the second GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence;
preferably, the interlayer further comprises a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer and a Ge buffer layer, a silicon substrate, a Ge buffer layer, a second GaAs buffer layer, a GaAs/AlAs superlattice dislocation filter layer, a first GaAs buffer layer, a GaSb buffer layer and InAs (Sb)/InxGa1-xAsySb1-yThe superlattices are arranged in sequence.
5. The semiconductor material of claim 1, wherein the silicon substrate comprises a patterned silicon substrate.
6. The semiconductor material of any one of claims 1-5, further comprising a cap layer disposed on InAs (Sb)/InxGa1-xAsySb1-yThe side of the superlattice remote from the silicon substrate;
preferably, the cap layer comprises a GaSb cap layer.
7. A method for preparing a semiconducting material according to any of claims 1-6, comprising: growing an intermediate layer and InAs (Sb)/In on a silicon substrate In sequencexGa1-xAsySb1-yAnd superlattice to obtain the semiconductor material.
8. The method of claim 7, further comprising at least one of the following steps (a) - (c):
(a) on a silicon substrate and InAs (Sb)/InxGa1-xAsySb1-yAt least one of a GaAs/AlAs superlattice dislocation filter layer, a second GaAs buffer layer or a Ge buffer layer grows between the superlattices;
(b) patterning the silicon substrate;
(c) in thatInAs(Sb)/InxGa1-xAsySb1-yA cap layer is grown on the side of the superlattice remote from the silicon substrate.
9. Use of a semiconductor material according to any one of claims 1 to 6 or obtained by a method according to claim 7 or 8 in a laser;
or, the use of a semiconductor material according to any one of claims 1 to 6 or obtained by the production method according to claim 7 or 8 in a photodetector.
10. A laser comprising the semiconductor material according to any one of claims 1 to 6 or the semiconductor material obtained by the production method according to claim 7 or 8;
or, a photodetector comprising the semiconductor material according to any one of claims 1 to 6 or the semiconductor material obtained by the production method according to claim 7 or 8.
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