CN111579874B

CN111579874B - Thermal impedance test system of high-reflectivity device

Info

Publication number: CN111579874B
Application number: CN202010241715.1A
Authority: CN
Inventors: 苏江涛; 王飞
Original assignee: Hangzhou Dianzi University
Current assignee: Hangzhou Dianzi University
Priority date: 2020-03-31
Filing date: 2020-03-31
Publication date: 2023-05-09
Anticipated expiration: 2040-03-31
Also published as: CN111579874A

Abstract

The invention discloses a thermal impedance testing system of a high-reflectivity device, which comprises a vector network analyzer, a first power amplifier, a second power amplifier, a first coupler, a second coupler, a first Bias-Tee biaser, a second Bias-Tee biaser, an ESG signal generator, a direct current power supply, a tested device and a passive tuner, wherein the first power amplifier is connected with the vector network analyzer; the invention provides a thermal impedance testing method which can be used for high-reflectivity devices and can improve the maximum synthesizable reflectance value to a certain extent by combining a passive impedance tuner with an active impedance tuner.

Description

Thermal impedance test system of high-reflectivity device

Technical Field

The invention relates to the technical field of radio frequency circuit testing, in particular to a thermal impedance testing system of a high-reflectivity device.

Background

The thermal impedance of the device is critical to determine its performance in nonlinear applications such as Radio Frequency Power Amplifiers (RFPAs). The thermal impedance testing system can be divided into two types according to the kind of impedance tuner in the thermal impedance testing system, passive technology based on passive impedance tuner and active technology based on active impedance tuner. The passive technology is mainly used for the application requiring higher stability, does not have any oscillation and has higher power processing capability. But such systems are passive in nature and the resultant reflection coefficient size is generally limited by the inherent losses of the tuner and associated cabling, limiting the maximum realized reflection coefficient and thus the resultant impedance. Any standard passive load drag will generally not be able to synthesize reflection coefficients near the boundary of the Smith chart. Therefore, for a DUT having a low output impedance (2Ω or less), i.e., a high reflection coefficient, it is impossible to synthesize a proper matching impedance. While the active technology can theoretically synthesize the reflection coefficient near and on the boundary of the Smith chart, in practical application, the reflection coefficient near and on the boundary of the Smith chart part cannot be synthesized, although the performance of the active technology is improved compared with that of the passive load traction technology, due to the limitation of the ESG output power and the PA performance. In order to improve the problem of limited maximum synthesizable reflectance in both systems, a thermal impedance testing system for high reflectance devices is newly presented herein.

Disclosure of Invention

The invention overcomes the defects of the prior art, provides a thermal impedance testing method which can be used for high-reflectivity devices and can improve the maximum synthesizable reflectance value to a certain extent by combining a passive impedance tuner with an active impedance tuner and solving the problem that the maximum synthesizable reflectance in the active technology and the passive technology is limited.

The technical scheme of the invention is as follows:

the thermal impedance testing system of the high-reflectivity device comprises a vector network analyzer, a first power amplifier, a second power amplifier, a first coupler, a second coupler, a first Bias-Tee biaser, a second Bias-Tee biaser, an ESG signal generator, a direct current power supply, a device to be tested and a passive tuner; the vector network analyzer is connected with the ESG signal generator, the first power amplifier, the first coupler and the second coupler, the first coupler is connected with the first power amplifier and the first Bias-Tee biaser, the GSG probe is arranged on the first Bias-Tee biaser, and the first Bias-Tee biaser is connected with the direct current power supply and the tested device; the second coupler is connected with the passive tuner and the second Bias-Tee biaser, a GSG probe is arranged on the second Bias-Tee biaser, and the second Bias-Tee biaser is connected with the direct current power supply and the tested device; the second power amplifier is connected with the passive tuner and the ESG signal generator; the output ends of the first power amplifier and the second power amplifier are provided with circulators; the ESG signal generator is connected with the computer through a GPIB line, and the computer controls the output power of the ESG signal generator;

before the passive tuner is connected, the reflection coefficient of a plane close to one side of the tested device meets the following formula:

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Γ _IN the total reflection coefficient generated for two tuners, S being the S parameter of the passive tuner Γ _L The reflection coefficient generated for the active tuner.

Compared with the prior art, the invention has the advantages that: the invention can fix the impedance point of the passive tuner, namely, the S parameter of the passive tuner to adjust the output power of the ESG signal generator in the active tuner, and can also fix the output power of the ESG signal generator to adjust the impedance point of the passive tuner so as to adjust the S parameter, thus synthesizing the reflection coefficients near and on the boundary of the Smith circle graph. The invention improves the problem that the maximum synthesizable reflectance in the active technology and the passive technology is limited, and combines the passive impedance tuner and the active impedance tuner, thereby improving the maximum synthesizable reflectance to a certain extent.

Drawings

FIG. 1 is a block diagram of an active thermal impedance testing system;

FIG. 2 is a block diagram of a novel thermal impedance testing system of the present invention;

FIG. 3 is a simplified diagram of the load side of the test system of the present invention;

FIG. 4 is a graph comparing the system test results with the conventional test results.

Detailed Description

The invention is further described below with reference to the drawings and the detailed description.

As shown in fig. 1 to 4, a thermal impedance testing system for a high reflectivity device includes a vector network analyzer, a first power amplifier, a second power amplifier, a first coupler, a second coupler, a first Bias-Tee Bias, a second Bias-Tee Bias, an ESG signal generator, a dc power supply, a device under test, and a passive tuner; the vector network analyzer is connected with the ESG signal generator, the first power amplifier, the first coupler and the second coupler, the first coupler is connected with the first power amplifier and the first Bias-Tee biaser, the GSG probe is arranged on the first Bias-Tee biaser, and the first Bias-Tee biaser is connected with the direct current power supply and the tested device; the second coupler is connected with the passive tuner and the second Bias-Tee biaser, a GSG probe is arranged on the second Bias-Tee biaser, and the second Bias-Tee biaser is connected with the direct current power supply and the tested device; the second power amplifier is connected with the passive tuner and the ESG signal generator; the output ends of the first power amplifier and the second power amplifier are provided with circulators; the ESG signal generator is connected with the computer through the GPIB line, and the computer controls the output power of the ESG signal generator. In the large signal test, the fact that the accuracy of the coupler in the vector network analyzer is not high enough is considered, so that the external high-accuracy first coupler and the external high-accuracy second coupler are connected into the system, the calibration path can be shortened, and the calibration accuracy can be improved. The source end of the first power amplifier uses the 3 port of the vector network analyzer as a signal source to generate an input signal, the output range is-20 dBm to 10dBm, and the input signal is amplified by the first power amplifier and then used as the input signal of the tested device.

An ESG signal generator, a power amplifier and a circulator in the system form an active tuner. By controlling the amplitude and phase of the injection signal, the impedance at a particular load reference plane can be obtained, while the reflection coefficient depends on the output power of the ESG signal generator and the effective gain of the drive power amplifier. The circulator connected to the output end of the power amplifier can prevent reflected waves from entering the power amplifier and the ESG signal generator to cause damage. In practical tests, the output signal power of an ESG signal generator and the amplification performance of a power amplifier are limited, and the reflection coefficient near the boundary of the Smith chart cannot be synthesized. Simulation results of the reflection coefficient that can be synthesized by the active thermal impedance test system without using the passive tuner are shown in fig. 4 a.

The system provides preconditioning prior to accessing the passive tuner, thereby reducing the required active tuner output power and reducing the requirements on ESG signal generator and power amplifier performance. At this time, if the passive tuner is connected, the passive tuner can be simply regarded as a two-port network, the simplified diagram of the system load end is shown in fig. 3, and the reflection coefficient of the plane near one side of the tested device satisfies the following formula:

The system can fix the impedance point of the passive tuner, namely, fix the S parameter of the impedance point and adjust the output power of an ESG signal generator in the active tuner; the output power of the ESG signal generator may also be fixed to adjust the impedance point of the passive tuner, so as to adjust the S parameter, i.e. the reflection coefficients near and on the boundary of the Smith chart may be synthesized. Simulation results of the reflection coefficient which can be synthesized by the system are shown in fig. 4 b. By comparison, the system is obviously improved.

Since both passive and active tuners are used, the present system requires multi-step calibration. The specific system operation steps are as follows (wherein conventional technical means are adopted without specific explanation):

step 1: an active thermal impedance testing system shown in fig. 1 is built, a vector network analyzer is connected with a computer by a GPIB connecting wire, and relevant testing parameters such as measuring frequency and the like are set in the vector network analyzer.

Step 2: vector calibration is carried out on the test system, and a radio frequency GSG probe is used for respectively measuring a Thlu (through) calibration piece, a reflection calibration piece and a Match calibration piece on a calibration piece. And performing power calibration on the test system. And judging the calibration quality through measurement data of the through calibration piece after the calibration is finished.

Step 3: and measuring the DUT (device under test) by using a radio frequency GSG (GSG) probe, firstly performing power scanning, finding out the working point of the DUT, and then performing thermal impedance test. By adjusting the output power of the ESG signal generator it is found that the desired reflection coefficient cannot be synthesized.

Step 4: disconnecting the test system, connecting test cables to two ends of the vector network analyzer, calibrating the proper network analyzer at the cable port by using the calibration piece, and judging the calibration quality by using the measurement data of the straight-through calibration piece after the calibration is completed.

Step 5: devices except the active tuner are connected by a test cable and added into a test system, on-chip TRL calibration is firstly carried out by FDCS software, then probes are pricked on a Threu (through) calibration piece to calibrate the tuner, and a calibration file is obtained.

Step 6: and disconnecting the source end of the passive tuner from the test cable, connecting the source end of the passive tuner into the active tuner structure, and constructing the novel thermal impedance test system shown in figure 2. Because the test system has changed, it is necessary to re-vector calibrate the system. Test related parameters are set in the vector network analyzer.

Step 7: after the construction is completed, vector calibration is carried out on the test system, a radio frequency GSG probe is used for respectively measuring a Thlu (through) calibration piece, a reflection calibration piece and a Match (matching) calibration piece on the calibration piece, and then a power meter is used for carrying out power calibration. And judging the calibration quality through measurement data of the through calibration piece after the calibration is finished.

Step 8: the DUT is measured using a radio frequency GSG probe. The ESG signal generator output power can be set and kept unchanged, and the impedance value of the scanning passive tuner is selected to be suitable for combining the required reflection coefficient. Or the impedance value of the passive tuner is set to be unchanged, and the output power of the scanning ESG signal generator is selected to be proper to synthesize the required reflection coefficient. So that a maximum efficiency point and a maximum output power point can be obtained.

To sum up, fig. 4 a shows a synthesizable impedance region of the active thermal impedance test system, and fig. b shows a synthesizable impedance region of the novel thermal impedance test system, wherein the solid black dots are impedances to be synthesized. Compared with the common active thermal impedance testing technology, the system has the advantages that the passive tuner is added, the synthesizable reflection coefficient area is obviously increased, the target impedance point can be synthesized, and the performance is obviously improved.

The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the concept of the present invention, and such modifications and adaptations are intended to be comprehended within the scope of the present invention.

Claims

1. The thermal impedance testing system of the high-reflectivity device is characterized by comprising a vector network analyzer, a first power amplifier, a second power amplifier, a first coupler, a second coupler, a first Bias-Tee biaser, a second Bias-Tee biaser, an ESG signal generator, a direct current power supply, a tested device and a passive tuner; the vector network analyzer is connected with the ESG signal generator, the first power amplifier, the first coupler and the second coupler, the first coupler is connected with the first power amplifier and the first Bias-Tee biaser, the GSG probe is arranged on the first Bias-Tee biaser, and the first Bias-Tee biaser is connected with the direct current power supply and the tested device; the second coupler is connected with the passive tuner and the second Bias-Tee biaser, a GSG probe is arranged on the second Bias-Tee biaser, and the second Bias-Tee biaser is connected with the direct current power supply and the tested device; the second power amplifier is connected with the passive tuner and the ESG signal generator; the output ends of the first power amplifier and the second power amplifier are provided with circulators; the ESG signal generator is connected with the computer through a GPIB line, and the computer controls the output power of the ESG signal generator;

the ESG signal generator, the first power amplifier, the second power amplifier and the circulator form an active tuner; wherein the reflection coefficient of the plane near the side of the device under test satisfies the following formula:

the total reflection coefficient generated for both tuners, S being the S parameter of the passive tuner,/->

The reflection coefficient generated for the active tuner. />