CN111540721A - Bump package structure and manufacturing method thereof - Google Patents
Bump package structure and manufacturing method thereof Download PDFInfo
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- CN111540721A CN111540721A CN202010577124.1A CN202010577124A CN111540721A CN 111540721 A CN111540721 A CN 111540721A CN 202010577124 A CN202010577124 A CN 202010577124A CN 111540721 A CN111540721 A CN 111540721A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13005—Structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
Abstract
The embodiment of the invention provides a bump packaging structure and a manufacturing method thereof, relating to the technical field of semiconductor packaging, wherein the bump packaging structure comprises a base body, a first conductive bump arranged on the base body, a second conductive bump arranged on the first conductive bump and a solder ball arranged on the second conductive bump; wherein the width L2 of the second conductive bump is greater than the width L1 of the first conductive bump; the second conductive bump is provided with a groove, and the solder ball covers the second conductive bump and is partially filled in the groove. The T-shaped structures of the first conductive bump and the second conductive bump can greatly improve the structural strength of the copper pillar bump. Meanwhile, the groove is formed, so that the bonding force between the solder and the second conductive bump is improved, the solder can play a certain buffering role, and the problem that the welding spot is hidden or even fails due to the stress caused by the mismatch of the thermal expansion coefficients on the chip welding point can be solved.
Description
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a bump packaging structure and a manufacturing method of the bump packaging structure.
Background
With the rapid development of the semiconductor industry, the flip chip package structure is widely applied to the flip chip package in the semiconductor industry, and the bumps are used for electrically connecting the chip and the substrate. The bump comprises a copper column, a metal layer (UBM) and a protective layer (passivation), the copper column bump can have the minimum distance, a flip-chip substrate copper layer adopts a core-less coreless substrate and a coreless substrate, the materials of the flip-chip substrate copper layer are FR4 resin or BT resin, the substrate can generate irreversible plastic deformation under the influence of external mechanical, time, temperature, humidity and other conditions, and the stress caused by mismatch of the thermal expansion coefficients acts on the chip bump (welding point), so that the product performance is reduced and even fails.
Disclosure of Invention
The present invention provides a bump package and a method for manufacturing the same, which can improve the connection strength of the bump and avoid the problem of solder joint crack or even failure caused by the stress on the chip bump (solder joint) due to the mismatch of thermal expansion coefficients.
Embodiments of the invention may be implemented as follows:
in a first aspect, an embodiment of the present invention provides a bump package structure, including:
a substrate;
a first conductive bump disposed on the substrate;
a second conductive bump disposed on the first conductive bump, the second conductive bump having a width greater than a width of the first conductive bump;
a solder ball disposed on the second conductive bump;
the second conductive bump is provided with a groove, and the solder ball covers the second conductive bump and is partially filled in the groove.
In an optional embodiment, a cap layer is further disposed on the substrate, the cap layer has a bump opening, and the first conductive bump is disposed in the bump opening, so that the cap layer covers the first conductive bump.
In an alternative embodiment, the cap layer is formed of a non-conductive material.
In an alternative embodiment, the recess extends to the first conductive bump, and the solder ball partially fills the recess and contacts the first conductive bump.
In an optional embodiment, a protective layer having an opening is further disposed on the substrate, a metal pad is disposed in the opening, a metal layer is disposed on the metal pad, and the first conductive bump is disposed on the metal layer, so that the first conductive bump is electrically connected to the substrate.
In an alternative embodiment, the metal layer includes a first conductive portion disposed on the metal pad and a second conductive portion disposed on a portion of the protective layer, and the first conductive bump is disposed on the first conductive portion.
In an alternative embodiment, the protective layer is formed of a polymeric dielectric material.
In an alternative embodiment, the metal layer comprises at least one material of Ti, TiN, TaN, Ta.
In an alternative embodiment, the solder ball comprises at least one of Sn, SnAg, SnAgCu.
In a second aspect, an embodiment of the invention provides a method for manufacturing a bump package structure, including:
forming a first conductive bump on the substrate;
forming a second conductive bump on the first conductive bump;
slotting on the second conductive bump and forming a groove;
forming a solder ball on the second conductive bump;
the width of the second conductive bump is larger than that of the first conductive bump, and the solder ball covers the second conductive bump and partially fills the groove.
In an alternative embodiment, the step of forming the first conductive bump on the substrate includes:
coating a protective layer on the surface of the substrate, and opening a metal pad by utilizing a photoetching process;
forming a metal layer by using a sputtering process;
covering a cap layer on the metal layer, and forming a bump opening by utilizing a photoetching process;
and electroplating a copper layer in the bump opening, and forming the first conductive bump.
In an alternative embodiment, the step of forming a second conductive bump on the first conductive bump includes:
covering a patterned light sensing layer on the first conductive bump, forming a transition opening by using a photoetching/etching process, and leaking out the first conductive bump;
and electroplating a copper layer in the transition opening, and forming the second conductive bump.
In an alternative embodiment, after the step of notching the second conductive bump, the method further includes:
removing the light sensitive layer and part of the cap layer by utilizing a photoetching/etching process, and leaking the metal layer;
and removing part of the metal layer by using an etching process.
In an alternative embodiment, the step of notching the second conductive bump includes:
forming a plurality of grooves on the second conductive bump by using a laser grooving process;
wherein each groove extends to the first conductive bump so that the solder ball is in contact with the first conductive bump.
The beneficial effects of the embodiment of the invention include, for example:
according to the bump packaging structure and the manufacturing method thereof provided by the invention, the first conductive bump and the second conductive bump are arranged, the width of the second conductive bump is larger than that of the first conductive bump, so that the second conductive bump and the first conductive bump form a T-shaped structure, and the second conductive bump is planted with balls to form a solder ball, so that the volume of the solder ball is increased, the size of the copper pillar bump is widened in the transverse direction, and the structural strength of the copper pillar bump can be greatly improved by the T-shaped structure. Meanwhile, the groove is formed in the second conductive bump, and the solder enters the groove when the ball is planted, so that the welding area of the solder and the second conductive bump is greatly increased, the bonding force between the solder and the second conductive bump is improved, and the solder can play a certain buffering role, so that the problem that the stress caused by the mismatch of the thermal expansion coefficients causes the solder joint to crack or even fail on a chip welding point can be avoided.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a schematic view of a bump package structure according to a first embodiment of the invention;
fig. 2 is a block diagram illustrating a method for manufacturing a bump package structure according to a second embodiment of the present invention;
fig. 3 to 12 are flow chart structures of a bump package structure according to a second embodiment of the invention.
Icon: 100-bump package structure; 110-a substrate; 130-a first conductive bump; 131-a cap layer; 133-bump opening; 150-a second conductive bump; 151-grooves; 170-solder ball; 180-metal layer; 190-a protective layer; 191-a metal pad; 200-a light-sensitive layer; 210-transition opening.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. indicate an orientation or a positional relationship based on that shown in the drawings or that the product of the present invention is used as it is, this is only for convenience of description and simplification of the description, and it does not indicate or imply that the device or the element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present invention.
Furthermore, the appearances of the terms "first," "second," and the like, if any, are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.
It should be noted that the features of the embodiments of the present invention may be combined with each other without conflict.
As disclosed in the background art, in the prior art, because the chip is directly flip-chip mounted on the substrate and the soldering is realized by the solder balls, the thermal stress caused by the difference of the thermal expansion coefficients of the substrate and the chip directly acts on the soldering points of the chip, the soldering points are easy to fall off, and the performance of the product is reduced or even fails. According to the bump packaging structure provided by the invention, the bonding strength between the solder and the bump is improved, so that the welding point is prevented from falling off, and meanwhile, the structural strength of the bump is improved, so that the problem that the welding point is hidden or even fails due to the stress action on a chip welding point caused by the mismatching of thermal expansion coefficients is avoided.
First embodiment
Referring to fig. 1, the present embodiment provides a bump package structure 100, which can improve the overall structural strength and connection strength, avoid the problem of solder joint cracks and even failures caused by stress acting on the chip solder joints due to mismatch of thermal expansion coefficients, and effectively protect the structure from moisture, ion contamination, radiation, or adverse environmental intrusion.
The bump package structure 100 provided by the embodiment includes a substrate 110, a first conductive bump 130 disposed on the substrate 110, a second conductive bump 150 disposed on the first conductive bump 130, and a solder ball 170 disposed on the second conductive bump 150; wherein the width L2 of the second conductive bump 150 is greater than the width L1 of the first conductive bump 130; the second conductive bump 150 has a recess 151, and the solder ball 170 covers the second conductive bump 150 and partially fills the recess 151.
In the present embodiment, the substrate 110 is a substrate 110 structure on a semiconductor chip, and the bump package 100 in the present embodiment is applied to a flip-chip package structure, that is, the semiconductor chip is a flip chip, and the first conductive bumps 130 and the second conductive bumps 150 are used as chip bumps and are soldered on the substrate by the solder balls 170, so as to realize the flip-chip of the chip.
By arranging the first conductive bump 130 and the second conductive bump 150, and the width L2 of the second conductive bump 150 is greater than the width L1 of the first conductive bump 130, the second conductive bump 150 and the first conductive bump 130 form a T-shaped structure, and the solder ball 170 is formed by implanting balls on the second conductive bump 150, so that the volume of the solder ball 170 is increased, the size of the copper pillar bump is widened in the transverse direction, and the structural strength of the copper pillar bump can be greatly improved by the T-shaped structure. Meanwhile, the grooves are formed in the second conductive bumps 150, and solder enters the grooves 151 when the balls are planted, so that the welding area between the solder and the second conductive bumps 150 is greatly increased, the bonding force between the solder and the second conductive bumps 150 is improved, the solder can play a certain buffering role, and the problem that the stress caused by the mismatch of thermal expansion coefficients causes solder joint crack or even failure on a chip welding point can be avoided.
It should be noted that, in the present embodiment, the widths of the first conductive bump 130 and the second conductive bump 150 refer to the dimension of the first conductive bump 130 in the direction parallel to the substrate 110, and the width L2 of the second conductive bump 150 is greater than the width L1 of the first conductive bump 130, that is, the lateral dimension of the first conductive bump 130 is smaller than the lateral dimension of the second conductive bump 150, so that the first conductive bump 130 and the second conductive bump 150 form a T-shaped structure, and the first conductive bump 130 and the second conductive bump 150 are sequentially formed and melted into a whole, and the structural dimension of the second conductive bump 150 is widened by outward expansion of the second conductive bump 150, so that the soldering area is increased, more solder can be loaded, and the overall structural strength is further improved.
In this embodiment, a cap layer 131 is further disposed on the substrate 110, the cap layer 131 has a bump opening 133, and the first conductive bump 130 is disposed in the bump opening 133, such that the cap layer 131 covers the first conductive bump 130. By arranging the cap layer 131, and covering the first conductive bump 130 with the cap layer 131, the structure of the first conductive bump can be protected from moisture, ion contamination, radiation, or adverse environment (such as thermal and mechanical force, impact, or vibration), and meanwhile, the cap layer 131 can play a role in buffering, so that stress generated by thermal expansion can be effectively eliminated or reduced.
It should be noted that, in this embodiment, the capping layer 131 is formed of a non-conductive material, which can ensure that the first conductive bump 130 is insulated from the outside, and specifically, the capping layer 131 may be formed of an amine cured epoxy material, an epoxy polymer material, and the like, which play a good role in buffering and protecting.
It should be further noted that the size of the cap layer 131 matches the size of the second conductive bump 150, specifically, after the first conductive bump 130 and the second conductive bump 150 are formed and ball-planted, the cap layer 131 needs to be partially removed, the cap layer 131 is removed by using a photolithography/etching process, and since the width L2 of the second conductive bump 150 is greater than the width L1 of the first conductive bump 130, the edge of the second conductive bump 150 can play a role in shielding, and the cap layer 131 is prevented from being completely removed, so that the cap layer 131 under the second conductive bump 150 is retained, and a cap layer structure covering the first conductive bump 130 is formed.
In the embodiment, the groove 151 extends to the first conductive bump 130, and the solder ball 170 partially fills the groove 151 and contacts the first conductive bump 130. Specifically, a groove 151 penetrating through the first conductive bump 130 is formed by laser grooving on the upper surface of the second conductive bump 150, so that the first conductive bump 130 leaks, and after the ball is planted on the second conductive bump 150, the solder can penetrate into the groove 151 and contact with the first conductive bump 130, so that the contact area between the solder and the first conductive bump 130 and the contact area between the solder and the second conductive bump 150 are greatly increased, the bonding force between the solder and the conductive bumps is increased, the integrity of the whole structure is better, and the solder joint is prevented from being hidden and cracked due to thermal stress.
In this embodiment, a plurality of grooves 151 are formed on the second conductive bump 150 by laser grooving, the grooves 151 are disposed at intervals, solder is filled in the grooves 151 after ball mounting, and a solder ball 170 is formed on the surface of the first conductive bump 130 after reflow.
It should be noted that, in the present embodiment, the first conductive bump 130 and the second conductive bump 150 are both copper pillars, and are formed by electrochemical copper plating, and the first conductive bump 130 and the second conductive bump 150 are formed by copper plating in sequence and are melted together to perform an electrical connection function.
In this embodiment, a protection layer 190 having an opening is further disposed on the substrate 110, a metal pad 191 is disposed in the opening, a metal layer 180 is disposed on the metal pad 191, and the first conductive bump 130 is disposed on the metal layer 180, so that the first conductive bump 130 is electrically connected to the substrate 110. A pad structure is formed by the metal pad 191, the metal layer 180, the first conductive bump 130, the second conductive bump 150, and the solder ball 170, thereby achieving an electrical connection between the flip chip and the substrate.
In the present embodiment, the metal layer 180 includes a first conductive portion disposed on the metal pad 191 and a second conductive portion disposed on a portion of the protection layer 190, and the first conductive bump 130 is disposed on the first conductive portion. Specifically, after the surface of the substrate 110 is coated with the protection layer 190, the metal pad 191 is opened by using a photolithography process, and then the metal layer 180 is formed on the surface of the substrate 110 by using a sputtering process, wherein the first conductive part and the second conductive part have equal thickness and are respectively covered on the protection layer 190 and the metal pad 191, so that the first conductive part is recessed downwards compared with the second conductive part to form a recess capable of accommodating the lower part of the first conductive bump 130, thereby increasing the contact area between the first conductive bump 130 and the metal layer 180, increasing the connection strength between the first conductive bump 130 and the metal layer 180, increasing the associativity between the metal layer 180 and the copper pillar bump, and avoiding the welding failure of the product.
It should be noted that, in the present embodiment, the bump opening 133 is opened in the cap layer 131 through a photolithography process, and the first conductive bump 130 is formed by electroplating a copper layer in the bump opening 133, wherein the bump opening 133 extends to the first conductive portion, so that the first conductive portion is exposed, and the copper layer is electroplated to enable the first conductive bump 130 to be electrically contacted with the first conductive portion.
In an embodiment, the protection layer 190 is formed of a polymer dielectric material, such as epoxy, polyimide benzocyclobutene, and the like. The metal layer 180 includes titanium (Ti), titanium nitride (TiN), tantalum nitride (TaN), tantalum (Ta), etc., and the thickness of the metal layer 180 is designed as required.
In this embodiment, the solder ball 170 may be Sn, SnAg, SnAgCu, or the like, and specifically, during ball mounting, the solder fills the groove 151 on the second conductive bump 150, the solder ball 170 is formed on the surface of the second conductive bump 150 after reflow, and a part of the solder ball 170 fills the groove 151.
In summary, the bump package structure 100 provided in the present embodiment forms the groove 151 by laser grooving the second conductive bump 150, during ball mounting, the solder entering groove 151 contacts and bonds with the first conductive bump 130, the bonding force between the solder and the first and second conductive bumps 130 and 150 can be better improved, the structure has higher strength and plays a role of a buffer structure, and by arranging the T-shaped copper column lug, i.e. the width L1 of the first conductive bump 130 is less than the width L2 of the second conductive bump 150, the overall structural strength of the copper pillar bump can be greatly improved, and the cap layer 131 is arranged below the second conductive bump 150, so that the structure of the copper pillar bump can be protected from water vapor, ion pollution, radiation or adverse environmental disturbance (such as thermal and mechanical force action, impact or vibration) by utilizing the material characteristics of the copper pillar bump, and meanwhile, the copper pillar bump can also play a role in buffering and protection.
Second embodiment
Referring to fig. 2, the present embodiment provides a method for manufacturing a bump package structure 100, for manufacturing the bump package structure 100 provided by the first embodiment, the method includes:
s1: a first conductive bump 130 is formed on the base 110.
Specifically, a protective layer 190 is coated on the surface of the substrate 110, a metal pad 191 is opened by a photolithography process, a metal layer 180 is formed by a sputtering process, a cap layer 131 is coated on the metal layer 180, a bump opening 133 is formed by a photolithography process, a copper layer is electroplated in the bump opening 133, and the first conductive bump 130 is formed.
Specifically, a substrate 110 is first taken, a protective layer 190 is coated on the surface of the substrate 110 (passivation), a metal pad 191 is opened by a photolithography process (exposure/development/baking), and then a metal layer 180 is sputtered on the surface of the substrate 110 by a sputtering process (UBM: under bump metallization). The passivation layer 190 may be made of a polymer dielectric material, such as epoxy, polyimide benzocyclobutene, etc. The metal layer 180 may be made of at least one of titanium (Ti), titanium nitride (TiN), tantalum nitride (TaN), tantalum (Ta), etc., and the thickness thereof is designed according to the requirement.
Then, the cap layer 131 is coated on the metal layer 180, and a bump opening 133 is opened through a photolithography process (exposure/development/baking), and the bump opening 133 is opened to the metal layer 180, so that the metal layer 180 is exposed. The cap layer 131 is made of a non-conductive material, such as an amine-based cured epoxy material, an epoxy polymer, and the like, and the cap layer 131 can protect the structure in the bump opening 133 from moisture, ion contamination, radiation, or adverse environmental disturbance (e.g., thermal and mechanical force, impact, or vibration), and can also play a role in buffering protection.
A copper layer is then electroplated within the bump opening 133 using electrochemical plating, and a first conductive bump 130 is formed. The first conductive bump 130 contacts the metal layer 180 to achieve electrical connection. The first conductive bump 130 is filled in the bump opening 133, and the height of the first conductive bump 130 is matched with the height of the cap layer 131, so that the first conductive bump 130 is flush with the cap layer 131.
S2: a second conductive bump 150 is formed on the first conductive bump 130.
Specifically, the patterned photo-sensitive layer 200 is covered on the first conductive bump 130, and a transition opening 210 is formed by using a photolithography/etching process and the first conductive bump 130 is exposed, a copper layer is electroplated in the transition opening 210, and the second conductive bump 150 is formed.
Specifically, after the step of forming the first conductive bump 130, a patterned photo layer 200 is used to cover the first conductive bump 130 and the cap layer 131, wherein the patterned pattern position corresponds to the position of the first conductive bump 130. The patterned pattern is removed by photolithography or etching process to form a transition opening 210, and the first conductive bump 130 is exposed, wherein the size of the transition opening 210 is larger than that of the first conductive bump 130. After the first conductive bump 130 is exposed, the second conductive bump 150 is formed in the transition opening 210 by electrochemical copper plating, such that the width L2 of the second conductive bump 150 is greater than the width L1 of the first conductive bump 130, and a T-shaped structure is formed. The photosensitive layer 200 can be formed by a photosensitive etchant, and can be removed by photolithography or etching.
S3: grooves are formed on the second conductive bumps 150 and grooves 151 are formed.
Specifically, a plurality of grooves 151 are formed in the second conductive bump 150 by laser grooving, and specifically, by controlling the grooving depth, each groove 151 extends to the first conductive bump 130, so that the first conductive bump 130 leaks.
S4: the photo layer 200 and a portion of the cap layer 131 are removed by a photolithography/etching process and the metal layer 180 is exposed.
Specifically, the photosensitive layer 200 and the cap layer 131 are stacked, and after the plurality of grooves 151 are formed, the photosensitive layer 200 and the cap layer 131 are removed by photolithography or etching, and the metal layer 180 is exposed. Specifically, since the width L2 of the second conductive bump 150 is greater than the width L1 of the first conductive bump 130, so that the second conductive bump 150 is shielded on part of the cap layer 131, when the photo-sensing layer 200 and the cap layer 131 are removed by using a photolithography or etching process, all the photo-sensing layer 200 and part of the unmasked cap layer 131 can be removed, thereby leaving part of the cap layer 131 covering the first conductive bump 130 and located below the second conductive bump 150, that is, the T-shaped structure formed by the first conductive bump 130 and the second conductive bump 150 here can also contribute to the final molding of the cap layer 131.
S5: a portion of metal layer 180 is removed using an etching process.
Specifically, after the metal layer 180 is exposed, the metal layer 180 is removed by using an etching process, and since the first conductive bump 130 and the remaining cap 131 both shield a portion of the metal layer 180, when the metal layer 180 is removed by using the etching process, a portion of the metal layer 180 at the periphery can be removed, and the shielded portion of the metal layer 180 can be retained.
Specifically, the remaining metal layer 180 includes a first conductive portion and a second conductive portion, which are integrated into a single structure, and the height of the first conductive portion and the second conductive portion is different due to the opening of the protective layer 190, and a concave portion capable of accommodating the lower portion of the first conductive bump 130 is formed, so that the contact area between the first conductive bump 130 and the metal layer 180 is increased, the connection strength between the first conductive bump 130 and the metal layer 180 is increased, the bonding performance between the metal layer 180 and the copper pillar bump is improved, and the product welding failure is avoided.
S6: a solder ball 170 is formed on the second conductive bump 150.
Specifically, a ball-mounting process is performed on the surface of the second conductive bump 150 to form a solder, wherein the solder ball 170 may be Sn, SnAg, SnAgCu, or the like, and the solder fills the groove 151, and the solder ball 170 is formed on the surface of the second conductive bump 150 after reflow.
It should be noted that, in this embodiment, by providing the groove 151, the contact area between the solder and the second conductive bump 150 and the first conductive bump 130 is increased, the bonding force of the solder is improved, and the width of the second conductive bump 150 is increased and a T-shaped structure is formed, so that the structural strength of the copper pillar is improved, and meanwhile, the amount of the solder on the surface of the second conductive bump 150 is increased, so that the bonding force of the solder is further improved, and the failure of soldering is avoided.
As shown in fig. 3 to 12, in actual operation, the method for manufacturing the bump package structure 100 according to the present invention includes steps of providing a substrate 110, applying glue, performing photolithography, sputtering, applying glue, performing photolithography, electroplating, performing laser grooving, performing photolithography/etching, ball mounting, and the like, and specifically includes the following steps:
step 1, base material: as shown in fig. 3, a substrate is taken, wherein the substrate may be a substrate of a semiconductor chip.
Step 4, gluing and photoetching processes: as shown in fig. 6, the cap layer 131 is applied on the metal layer 180, and the bump opening 133 is opened by a photolithography process (exposure/development/baking).
Step 5, electroplating: as shown in fig. 7, a copper layer is electroplated within the bump opening 133 using an electrochemical plating process to form a first conductive bump 130.
Step 6, gluing and photoetching processes: as shown in fig. 8, the patterned pattern is removed by photolithography or etching process on the first conductive bump 130 by covering the patterned photosensitive layer 200, so as to form a transition opening 210 to expose the first conductive bump 130.
Step 7, electroplating: as shown in fig. 9, a copper layer is electroplated within the transition opening 210 using an electrochemical process to form the second conductive bump 150.
Step 8, laser grooving: as shown in fig. 10, a plurality of grooves 151 are formed on the surface of the second conductive bump 150 by using a laser.
Step 9, photoetching/etching: as shown in fig. 11, the protective layer 190 and a portion of the cap layer 131 are removed by photolithography or etching to expose the metal layer 180, and then the excess metal layer 180 is removed by etching.
Step 10, ball planting: as shown in fig. 12, solder is printed on one surface of the copper pillar bump by a printing method to form a solder ball 170.
In the manufacturing method of the bump package structure 100 provided in this embodiment, the groove 151 is formed by laser grooving on the second conductive bump 150, and when the ball is mounted, the solder enters the groove 151 to be combined with the first conductive bump 130 and the second conductive bump 150, so that the bonding force between the solder and the copper pillar bump can be better improved, the structural strength is higher, and the buffer structure function is achieved. By designing the T-shaped copper pillar bump, the structural strength of the copper pillar bump can be greatly improved, and by designing the cap layer 131 and utilizing the material characteristics thereof, the structure of the cap layer is protected from moisture, ion pollution, radiation or adverse environmental disturbance (such as thermal and mechanical force action, impact or vibration), and meanwhile, the buffer protection effect can be realized.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (15)
1. A bump package structure, comprising:
a substrate;
a first conductive bump disposed on the substrate;
a second conductive bump disposed on the first conductive bump, the second conductive bump having a width greater than a width of the first conductive bump;
a solder ball disposed on the second conductive bump;
the second conductive bump is provided with a groove, and the solder ball covers the second conductive bump and is partially filled in the groove.
2. The bump package structure according to claim 1, wherein a cap layer is further disposed on the substrate, the cap layer has a bump opening, and the first conductive bump is disposed in the bump opening such that the cap layer covers the first conductive bump.
3. The bump package structure according to claim 2, wherein the cap layer is formed of a non-conductive material.
4. The bump package structure of claim 1, wherein the recess extends to the first conductive bump, and the solder ball partially fills the recess and contacts the first conductive bump.
5. The bump package structure according to any one of claims 1 to 4, wherein a protection layer having an opening is further disposed on the substrate, a metal pad is disposed in the opening, a metal layer is disposed on the metal pad, and the first conductive bump is disposed on the metal layer so as to electrically connect the first conductive bump and the substrate.
6. The bump package structure according to claim 5, wherein the metal layer includes a first conductive portion disposed on the metal pad and a second conductive portion disposed on a portion of the protection layer, and the first conductive bump is disposed on the first conductive portion.
7. The bump package structure according to claim 5, wherein the protection layer is formed of a polymer dielectric material.
8. The bump package structure of claim 5, wherein the metal layer comprises at least one of Ti, TiN, TaN, Ta.
9. The bump package structure of claim 1, wherein the solder balls comprise at least one of Sn, SnAg, and SnAgCu.
10. The bump package structure of claim 1, wherein the first conductive bump and the second conductive bump are each a copper pillar.
11. A method for manufacturing a bump package structure is characterized by comprising the following steps:
forming a first conductive bump on a substrate;
forming a second conductive bump on the first conductive bump;
slotting on the second conductive bump and forming a groove;
planting balls on the second conductive bumps to form solder balls;
the width of the second conductive bump is larger than that of the first conductive bump, and the solder ball covers the second conductive bump and partially fills the groove.
12. The method for manufacturing a bump package according to claim 11, wherein the step of forming the first conductive bump on the substrate includes:
coating a protective layer on the surface of the substrate, and opening a metal pad by utilizing a photoetching process;
forming a metal layer by using a sputtering process;
covering a cap layer on the metal layer, and forming a bump opening by utilizing a photoetching process;
and electroplating a copper layer in the bump opening, and forming the first conductive bump.
13. The method for manufacturing a bump package according to claim 12, wherein the step of forming the second conductive bump on the first conductive bump comprises:
covering a patterned light sensing layer on the first conductive bump, forming a transition opening by using a photoetching/etching process, and leaking out the first conductive bump;
and electroplating a copper layer in the transition opening, and forming the second conductive bump.
14. The method for fabricating the bump package structure according to claim 13, further comprising, after the step of notching the second conductive bump:
removing the light sensitive layer and part of the cap layer by utilizing a photoetching/etching process, and leaking the metal layer;
and removing part of the metal layer by using an etching process.
15. The method for fabricating the bump package structure according to any one of claims 11 to 14, wherein the step of forming the groove on the second conductive bump comprises:
forming a plurality of grooves on the second conductive bump by using a laser grooving process;
wherein each groove extends to the first conductive bump so that the solder ball is in contact with the first conductive bump.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010577124.1A CN111540721A (en) | 2020-06-23 | 2020-06-23 | Bump package structure and manufacturing method thereof |
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| CN202010577124.1A CN111540721A (en) | 2020-06-23 | 2020-06-23 | Bump package structure and manufacturing method thereof |
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| US20060088992A1 (en) * | 2004-10-22 | 2006-04-27 | Advanced Semiconductor Engineering, Inc. | Bumping process and structure thereof |
| CN1913141A (en) * | 2005-08-09 | 2007-02-14 | 精工爱普生株式会社 | Semiconductor device and method of manufacturing the same |
| CN101226908A (en) * | 2007-01-16 | 2008-07-23 | 百慕达南茂科技股份有限公司 | Projection structure with ring-shaped support and manufacturing method thereof |
| CN102915982A (en) * | 2012-11-08 | 2013-02-06 | 南通富士通微电子股份有限公司 | Semiconductor device |
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2020
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060088992A1 (en) * | 2004-10-22 | 2006-04-27 | Advanced Semiconductor Engineering, Inc. | Bumping process and structure thereof |
| CN1913141A (en) * | 2005-08-09 | 2007-02-14 | 精工爱普生株式会社 | Semiconductor device and method of manufacturing the same |
| CN101226908A (en) * | 2007-01-16 | 2008-07-23 | 百慕达南茂科技股份有限公司 | Projection structure with ring-shaped support and manufacturing method thereof |
| CN102915982A (en) * | 2012-11-08 | 2013-02-06 | 南通富士通微电子股份有限公司 | Semiconductor device |
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Application publication date: 20200814 |