CN111540679A - Manufacturing method of reverse conducting IGBT device - Google Patents
Manufacturing method of reverse conducting IGBT device Download PDFInfo
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- CN111540679A CN111540679A CN202010424609.7A CN202010424609A CN111540679A CN 111540679 A CN111540679 A CN 111540679A CN 202010424609 A CN202010424609 A CN 202010424609A CN 111540679 A CN111540679 A CN 111540679A
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- 229910052710 silicon Inorganic materials 0.000 claims abstract description 111
- 239000010703 silicon Substances 0.000 claims abstract description 111
- 239000012535 impurity Substances 0.000 claims abstract description 85
- 238000010884 ion-beam technique Methods 0.000 claims abstract description 79
- 238000000034 method Methods 0.000 claims abstract description 31
- 238000000137 annealing Methods 0.000 claims abstract description 29
- 238000005468 ion implantation Methods 0.000 claims abstract description 9
- 150000002500 ions Chemical class 0.000 claims description 29
- 230000005684 electric field Effects 0.000 claims description 10
- 230000000903 blocking effect Effects 0.000 claims description 9
- 239000007943 implant Substances 0.000 claims description 8
- 238000005516 engineering process Methods 0.000 abstract description 6
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000001259 photo etching Methods 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
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- 230000001133 acceleration Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
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Abstract
The application relates to the technical field of semiconductor manufacturing, in particular to a manufacturing method of a reverse conducting IGBT. The manufacturing method of the reverse conducting IGBT device at least comprises the following steps: providing a silicon wafer; scanning and bombarding the back surface of the silicon wafer at a specific time interval through first conductive type impurity ion beams, and forming a plurality of spaced first conductive type doping regions in the back surface of the silicon wafer after annealing; performing first conductive type impurity ion implantation on the back of the silicon wafer, annealing to form a field stop region, wherein the first conductive type doping region is distributed in the stop region; scanning and bombarding the cut-off region through second conductive type impurity ion beams, and forming a second conductive type doped region between two adjacent first conductive type doped regions after annealing; and metalizing the back structure of the silicon wafer. The application provides a manufacturing method of a reverse conducting IGBT device, and the problem of high process difficulty in the related technology can be solved by saving a large number of processes on the back of a silicon wafer.
Description
Technical Field
The application relates to the technical field of semiconductor manufacturing, in particular to a manufacturing method of a reverse conducting IGBT device.
Background
Insulated Gate Bipolar Transistors (IGBTs) are core devices in new energy power electronic products, are widely popularized in recent years, and application products are evolved from traditional products such as white home appliances, industrial frequency conversion and welding machines to high-end products such as new energy automobiles. In order to meet different circuit requirements, Reverse Conducting (RC) type IGBT devices are produced, the reverse conducting type IGBT devices are formed by integrating an N collector region on the back surface of a conventional IGBT device, so that the N collector region and a P collector region are arranged at intervals, and integration of the IGBT device and a Fast Recovery Diode (FRD) is realized.
However, in the related art, when the reverse conducting IGBT device is manufactured, the IGBT device and the fast diode need to be integrated by adding a photolithography process, so that the requirement for a backside photolithography machine is increased, which may cause an increase in process difficulty and an increase in speed.
Disclosure of Invention
The application provides a manufacturing method of a reverse conducting IGBT device, which can solve the problem of high process difficulty in the related technology.
The application provides a manufacturing method of a reverse conducting IGBT device, which at least comprises the following steps:
providing a silicon wafer;
scanning and bombarding the back surface of the silicon wafer at a specific time interval through first conductive type impurity ion beams, and forming a plurality of spaced first conductive type doping regions in the back surface of the silicon wafer after annealing;
performing first conductive type impurity ion implantation on the back surface of the silicon wafer, and annealing to form a field stop region, wherein the first conductive type doping regions are distributed in the stop region;
scanning and bombarding the cut-off region through second conductive type impurity ion beams, and forming a second conductive type doped region between two adjacent first conductive type doped regions after annealing;
and metalizing the back structure of the silicon wafer.
Optionally, the step of scanning and bombarding the back surface of the silicon wafer by the first conductive type impurity ion beam at specific time intervals includes:
and at a specific time interval, blocking the first conductive type impurity ion beam from performing moving scanning bombardment on the back surface of the silicon wafer.
Optionally, the step of blocking the first conductive type impurity ion beam from performing mobile scanning bombardment on the back surface of the silicon wafer at a specific time interval is performed by an ion implanter;
the ion implanter includes: the silicon wafer loading device comprises a working cavity, wherein a beam current generating device for emitting ion beams, a wafer loading platform for placing the silicon wafer and a Faraday cup dose controller which can periodically extend into a space between the beam current generating device and the wafer loading platform are arranged in the working cavity.
Optionally, the step of blocking the first conductivity type impurity ion beam from performing the mobile scanning bombardment on the back surface of the silicon wafer at specific time intervals includes:
generating a first conductive type impurity ion beam by the beam current generating device, wherein the first conductive type impurity ion beam aims at a silicon wafer on the wafer carrying table to carry out mobile scanning bombardment;
periodically extending the Faraday cup dose controller between the beam current generation device and the wafer carrying platform to prevent the ion beam from bombarding the silicon wafer at specific time intervals.
Optionally, the step of bombarding the back surface of the silicon wafer by scanning the first conductive type impurity ion beam at specific time intervals includes:
and performing moving scanning bombardment on the back surface of the silicon wafer by using the first conductive type impurity ion beam with bombardment energy alternately changed at specific time intervals.
Optionally, the step of performing moving scanning bombardment on the back surface of the silicon wafer by using the N + type impurity ion beam with bombardment energy alternately changed at specific time intervals is performed by an ion implanter;
the ion implanter includes: the working chamber, be equipped with in the working chamber and be used for launching the beam current generating device of ion beam and be used for placing the slide holder of silicon chip, the beam current generating device includes: the ion beam generating device is used for generating impurity ions for bombarding the silicon wafer; and the electric field accelerating device is used for improving bombardment energy when the impurity ions bombard the silicon wafer.
Optionally, the step of performing a moving scan bombardment on the back surface of the silicon wafer by using an ion beam of impurities of the first conductivity type with bombardment energy alternately changed at specific time intervals includes:
closing the electric field accelerating device at a specific time interval to enable the beam current generating device to generate a first conductive type impurity ion beam with bombardment energy alternately changed;
and the first conductive type impurity ion beam aims at the silicon wafer on the wafer carrying table to carry out moving scanning bombardment.
Optionally, the first conductive type impurity ion beam in which the bombardment energy is alternately changed at specific time intervals includes:
the first conductive type impurity ion beam with first bombardment energy can implant first conductive type impurities into a silicon wafer so as to form a first conductive type doping area in the silicon wafer;
the first conductive type impurity ion beam with the second bombardment energy can not implant the first conductive type impurities into the silicon wafer to form the first conductive type doping area.
Optionally, the first conductivity type is an N-type, and the second conductivity type is a P-type.
Optionally, the first conductivity type is a P-type, and the second conductivity type is an N-type.
The technical scheme at least comprises the following advantages: the reverse conducting IGBT device is manufactured by optimizing the injection method, so that the process operation steps of the back side of the silicon wafer, such as steps of photoetching and photoresist removing of the back side of the silicon wafer and bonding (bonding) and de-bonding (bonding) required for realizing photoetching, can be saved, the process difficulty is reduced, and the cost is saved.
Drawings
In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings needed to be used in the detailed description of the present application or the prior art description will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic structural diagram of the back surface of a reverse conducting IGBT device manufactured and formed by the method for manufacturing a reverse conducting IGBT device provided by the present application;
fig. 2 is a flowchart of a method for manufacturing a reverse conducting IGBT device provided in the present application;
fig. 3 is a schematic structural diagram of an ion implanter in embodiment 1 of the method for manufacturing a reverse conducting IGBT device provided in the present application;
fig. 4 is a flowchart of a method for manufacturing a reverse conducting IGBT device according to embodiment 1;
fig. 5 is a schematic structural diagram of an ion implanter in embodiment 2 of the method for manufacturing a reverse conducting IGBT device provided in the present application;
fig. 6 is a flowchart of a method for manufacturing a reverse conducting IGBT device according to embodiment 2.
100. The device comprises a silicon chip, 200, an N + type doping area, 300, a P + type doping area, 410, a working chamber, 420, a beam current generating device, 421, an ion beam generating device, 422, an electric field accelerating device, 430, a wafer carrying table and 440, a Faraday cup.
Detailed Description
The technical solutions in the present application will be described clearly and completely with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; the connection can be mechanical connection or electrical connection; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In addition, the technical features mentioned in the different embodiments of the present application described below may be combined with each other as long as they do not conflict with each other.
The first conductive type can be an N type, the second conductive type can be a P type, the first conductive type can be a P type, and the second conductive type can be an N type.
The following embodiments are described by taking the first conductive type as an N-type and the second conductive type as a P-type as examples.
As a related art of the present application, there is provided a method for manufacturing an RC IGBT, the method including:
the first step is as follows: providing a silicon wafer, and manufacturing an MOS structure on the front side of the silicon wafer;
the second step is that: metalizing the MOS structure positioned on the front side of the silicon wafer;
the third step: bonding (bonding) is carried out on the metallized MOS structure to form a protection structure;
the fourth step: thinning the back of the silicon wafer (BG);
the fifth step: carrying out photoetching definition on the back of the silicon wafer to carry out N + type impurity ion implantation, and forming spaced N + type doped regions after annealing;
and a sixth step: removing the photoresist;
the seventh step: and carrying out N-type impurity ion implantation on the back of the silicon wafer, annealing to form a field stop region, wherein the spaced N + type doped regions are arranged in the stop region at intervals.
Eighth step: and performing P + type impurity ion implantation, and annealing to form N + type doped regions and P + type doped regions which are alternately arranged in the field stop region.
According to the related technology, when the reverse conducting IGBT device is manufactured, the photoetching technology needs to be added to integrate the IGBT device and the fast diode, so that the requirement on a back photoetching machine is improved, the technology difficulty is increased, and meanwhile, the technology difficulty is improved.
Referring to fig. 1 and 2, the method for manufacturing a reverse conducting IGBT device includes at least the following steps:
s1: providing a silicon wafer 100, and manufacturing a front structure of the silicon wafer 100;
s2: scanning and bombarding the back surface of the silicon wafer 100 at a specific time interval through N + type impurity ion beams, and forming a plurality of spaced N + type doping regions 200 in the back surface of the silicon wafer 100 after annealing and knot pushing;
s3: performing N-type impurity ion implantation on the back of the silicon wafer 100, and forming a field stop region after annealing and knot pushing;
s4: the field stop region is scanned by P + type impurity ion beams, and P + type doping regions 300 alternately distributed with the N + type doping regions 200 are formed in the field stop region after annealing.
S5: metallization of the back side structure of silicon wafer 100
Among them, the annealing steps in S2, S3, and S4 may be subjected to one annealing after the end of S4, thereby forming the field stop region, the N + -type doped region 200, and the P + -type doped region 300, respectively.
Referring to fig. 4, a method for manufacturing a reverse conducting IGBT device according to an exemplary embodiment of the present application is shown, and the method for manufacturing the reverse conducting IGBT device includes at least the following steps:
s11: providing a silicon wafer 100, and manufacturing a front structure of the silicon wafer 100;
s12: blocking the N + type impurity ion beams from moving, scanning and bombarding the back surface of the silicon wafer 100 at specific time intervals, and forming a plurality of spaced N + type doping regions 200 in the back surface of the silicon wafer 100 after annealing and knot pushing;
s13: performing N-type impurity ion implantation on the back of the silicon wafer 100, and forming a field stop region after annealing and knot pushing;
the specific time interval ranges from 0.17 second to 0.23 second, and the step of blocking the N + -type impurity ion beam from performing the moving scanning bombardment on the back surface of the silicon wafer 100 at the specific time interval may also be understood as: and periodically blocking the process of bombarding the back surface of the silicon wafer 100 by the moving scanning of the N + type impurity ion beams while bombarding the back surface of the silicon wafer 100 by the moving scanning of the N + type impurity ion beams. Since the back surface of the silicon wafer 100 is periodically blocked from the moving scanning bombardment of the N + type impurity ion beam, the spaced N + type doping regions 200 are formed on the back surface of the silicon wafer 100.
Illustratively, the first conductive type impurity ion beam is caused to scan the back surface of the silicon wafer 100 at certain time intervals by an ion implanter; referring to fig. 3, the ion implanter includes: a working chamber 410, wherein a beam current generating device 420 for emitting an ion beam, a wafer stage 430 for placing the silicon wafer 100, and a faraday cup 440 capable of periodically extending between the beam current generating device 420 and the wafer stage 430 are arranged in the working chamber 410; wherein the driving device is controlled by the control device, and the driving device drives the faraday cup 440 so that the faraday cup 440 can periodically extend between the beam current generating device 420 and the slide holder 430.
The step of scanning the back surface of the silicon wafer 100 at specific time intervals by using the ion implanter to form the N + type doped region 200 includes:
generating a first conductive type impurity ion beam by the beam current generating device 420, wherein the first conductive type impurity ion beam aims at the silicon wafer 100 on the wafer carrying table 430 to carry out mobile scanning bombardment;
periodically extending through the faraday cup 440 between the beam generator 420 and the stage 430 to block the ion beam from bombarding the silicon wafer 100 for a specified time interval;
the N + type doped region 200 is formed after annealing.
S14: the field stop region is scanned by P + type impurity ion beams, and P + type doping regions 300 alternately distributed with the N + type doping regions 200 are formed in the field stop region after annealing.
Among them, the annealing steps in S12, S13, and S14 may be subjected to one annealing after the end of S14, thereby forming the field stop region, the N + -type doped region 200, and the P + -type doped region 300, respectively.
S15: the back side structure of the silicon wafer 100 is metallized.
Referring to fig. 6, a method for manufacturing a reverse conducting IGBT device according to an exemplary embodiment of the present application is shown, and the method for manufacturing the reverse conducting IGBT device includes at least the following steps:
s21: providing a silicon wafer 100, and manufacturing a front structure of the silicon wafer 100;
s22: performing moving scanning bombardment on the back surface of the silicon wafer 100 by using an N + type impurity ion beam with bombardment energy alternately changed at specific time intervals, and forming a plurality of spaced N + type doped regions 200 in the back surface of the silicon wafer 100 after annealing;
s22: performing N-type impurity ion implantation on the back of the silicon wafer 100, and forming a field stop region after annealing and knot pushing;
the step of performing moving scanning bombardment on the back surface of the silicon wafer 100 by using the N + -type impurity ion beam in which the bombardment energy is alternately changed at the specific time interval is within a range of 0.17 seconds to 0.23 seconds, may also be understood as: bombarding the back surface of the silicon wafer 100 from one side to the other side of the silicon wafer 100 in a moving scanning mode by using an N + type impurity ion beam with first bombardment energy and an N + type impurity ion beam with second bombardment energy alternately and alternately at specific time intervals; it should be noted that the second bombardment energy is relatively low, so that the N + type impurity ion beam with the second bombardment energy cannot implant impurities into the surface of the silicon wafer 100 to form doped regions, and the first bombardment energy is relatively high, so that the N + type impurity ion beam with the first bombardment energy can implant impurities into the silicon wafer 100, so that the spaced N + type doped regions 200 are formed on the back surface of the silicon wafer 100.
Illustratively, the first conductive type impurity ion beam is caused to scan the back surface of the silicon wafer 100 at certain time intervals by an ion implanter; referring to fig. 5, the ion implanter includes: a working chamber 410, wherein a beam current generating device 420 for emitting ion beams and a wafer stage 430 for placing the silicon wafer 100 are arranged in the working chamber 410; the beam current generating means 420 includes: the ion beam generator 421 is used for generating impurity ions for bombarding the silicon wafer 100, and the electric field accelerator 422 is used for increasing bombardment energy when the impurity ions bombard the silicon wafer 100; when the ion beam generator 421 and the electric field accelerator 422 of the beam generator 420 work simultaneously, the generated impurity ions have a first bombardment energy, and can implant impurities into the silicon wafer 100 to form a doped region; when the electric field accelerating device 422 of the beam current generating device 420 stops working, the impurity ion beam generated by the ion beam generating device 421 has a second bombardment energy, so that the ion beam cannot implant impurities into the surface of the silicon wafer 100 to form a doped region; the control device controls the operation of the electric field acceleration device 422.
The method for performing mobile scanning bombardment on the back surface of the silicon wafer 100 by using the ion implanter and the N + type impurity ion beam with bombardment energy alternately changed at specific time intervals comprises the following steps:
turning off the electric field accelerating device 422 at specific time intervals, so that the beam current generating device 420 generates an N + type impurity ion beam with alternately changed bombardment energy;
the N + type doped region 200 is formed after annealing.
S24: the field stop region is scanned by P + type impurity ion beams, and P + type doping regions 300 alternately distributed with the N + type doping regions 200 are formed in the field stop region after annealing.
Among them, the annealing steps in S12, S13, and S14 may be subjected to one annealing after the end of S14, thereby forming the field stop region, the N + -type doped region 200, and the P + -type doped region 300, respectively.
S25: the back side structure of the silicon wafer 100 is metallized.
For the ion implanter used in the above embodiment, the movable stage 430 may be adopted to enable the silicon wafer 100 to move relative to the ion beam, so that the ion beam can move to scan bombard the back surface of the silicon wafer 100 from one side to the other side of the silicon wafer 100, and the driving device can drive the stage 430 to move. The ion beam generated can also be moved relative to the silicon wafer 100 by using a movable ion beam generating device, so that the ion beam can move to scan and bombard the back surface of the silicon wafer 100 from one side to the other side of the silicon wafer 100.
In addition, for the above embodiment, the dosage of N + type impurity ions for forming the N + type doping region 200 is 1E 11-1E 1/cm2(ii) a 6, the dosage of N-type impurity ions for forming the field stop region is 1E 11-1E 14 ions/cm2The dosage of the P + type impurity ions for forming the P + type doping region 300 is 1E 11-1E 14 ions/cm2。
As can be seen from the above embodiments, the reverse conducting IGBT device is manufactured by optimizing the implantation method, so that the process operation steps of the back surface of the silicon wafer 100, such as the steps of photolithography, photoresist removal, and bonding (bonding) and de-bonding (bonding) required for photolithography, can be saved, and thus the process difficulty and the cost can be reduced.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of this invention are intended to be covered by the scope of the invention as expressed herein.
Claims (10)
1. A manufacturing method of a reverse conducting IGBT device is characterized by at least comprising the following steps:
providing a silicon wafer;
scanning and bombarding the back surface of the silicon wafer at a specific time interval through first conductive type impurity ion beams, and forming a plurality of spaced first conductive type doping regions on the back surface of the silicon wafer after annealing;
performing first conductive type impurity ion implantation on the back surface of the silicon wafer, and annealing to form a field stop region, wherein the first conductive type doping regions are distributed in the stop region;
scanning and bombarding the cut-off region through second conductive type impurity ion beams, and forming a second conductive type doped region between two adjacent first conductive type doped regions after annealing;
and metalizing the back structure of the silicon wafer.
2. The method for manufacturing a reverse conducting IGBT device according to claim 1, wherein the step of scanning and bombarding the back surface of the silicon wafer with the first conductivity type impurity ion beam at specific time intervals comprises:
and at a specific time interval, blocking the first conductive type impurity ion beam from performing moving scanning bombardment on the back surface of the silicon wafer.
3. The method for manufacturing a reverse conducting IGBT device according to claim 2, wherein the step of blocking the first conductivity type impurity ion beam from moving scanning bombardment of the back surface of the silicon wafer at specific time intervals is performed by an ion implanter;
the ion implanter includes: the silicon wafer loading device comprises a working cavity, wherein a beam current generating device for emitting ion beams, a wafer loading platform for placing the silicon wafer and a Faraday cup dose controller which can periodically extend into a space between the beam current generating device and the wafer loading platform are arranged in the working cavity.
4. The method for manufacturing the reverse conducting type IGBT device according to claim 3, wherein the step of blocking the ion beam of the first conductivity type impurity from moving scanning bombardment on the back surface of the silicon wafer at specific time intervals comprises the following steps:
generating a first conductive type impurity ion beam by the beam current generating device, wherein the first conductive type impurity ion beam aims at a silicon wafer on the wafer carrying table to carry out mobile scanning bombardment;
periodically extending the Faraday cup dose controller between the beam current generation device and the wafer carrying platform to prevent the ion beam from bombarding the silicon wafer at specific time intervals.
5. The method for manufacturing a reverse conducting IGBT device according to claim 1, wherein the step of scanning and bombarding the back surface of the silicon wafer with the first conductivity type impurity ion beam at specific time intervals comprises:
and performing moving scanning bombardment on the back surface of the silicon wafer by using the first conductive type impurity ion beam with bombardment energy alternately changed at specific time intervals.
6. The method of manufacturing a reverse conducting IGBT device according to claim 5, characterized in that the step of performing the moving scanning bombardment of the back surface of the silicon wafer by the ion implanter with the N + -type impurity ion beam in which the bombardment energy is alternately changed at specific time intervals;
the ion implanter includes: the working chamber, be equipped with in the working chamber and be used for launching the beam current generating device of ion beam and be used for placing the slide holder of silicon chip, the beam current generating device includes: the ion beam generating device is used for generating impurity ions for bombarding the silicon wafer; and the electric field accelerating device is used for improving bombardment energy when the impurity ions bombard the silicon wafer.
7. The method of manufacturing a reverse conducting IGBT device according to claim 6, wherein the step of performing a moving scan bombardment on the back surface of the silicon wafer with the ion beam of the first conductivity type impurity whose bombardment energy is alternately changed at specific time intervals comprises:
closing the electric field accelerating device at a specific time interval to enable the beam current generating device to generate a first conductive type impurity ion beam with bombardment energy alternately changed;
and the first conductive type impurity ion beam aims at the silicon wafer on the wafer carrying table to carry out moving scanning bombardment.
8. The method for manufacturing a reverse conducting IGBT device according to any one of claims 5 to 7, characterized in that the first conductivity type impurity ion beam whose bombardment energy is alternately changed at specific time intervals comprises:
the first conductive type impurity ion beam with first bombardment energy can implant first conductive type impurities into a silicon wafer so as to form a first conductive type doping area in the silicon wafer;
the first conductive type impurity ion beam with the second bombardment energy can not implant the first conductive type impurities into the silicon wafer to form the first conductive type doping area.
9. The method for manufacturing a reverse conducting IGBT device according to any one of claims 1 to 7, wherein the first conductivity type is N-type and the second conductivity type is P-type.
10. The method for manufacturing a reverse conducting IGBT device according to any one of claims 1 to 7, wherein the first conductivity type is P type and the second conductivity type is N type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010424609.7A CN111540679B (en) | 2020-05-19 | 2020-05-19 | Manufacturing method of reverse-conduction IGBT device |
Applications Claiming Priority (1)
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