CN111540308B - Pixel driving circuit, driving method and display device - Google Patents
Pixel driving circuit, driving method and display device Download PDFInfo
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- CN111540308B CN111540308B CN202010404111.4A CN202010404111A CN111540308B CN 111540308 B CN111540308 B CN 111540308B CN 202010404111 A CN202010404111 A CN 202010404111A CN 111540308 B CN111540308 B CN 111540308B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
Abstract
The invention provides a pixel driving circuit, a driving method and a display device. The circuit includes: at least two driving units, each of which is provided with a light emitting element; the at least two driving units are connected with a power supply voltage, each driving unit of the at least two driving units is connected with a corresponding control signal, each display period of the control signal comprises N sub-fields, and each driving unit of the at least two driving units is used for controlling the bright and dark states of the light-emitting elements in the driving unit in each sub-field according to the control signal, so that the pixel driving circuit can realize gray scale display of each level under a target bit. The problem that 8-bit gray scale display is difficult to realize due to the limited reading speed of the IC in the prior art is solved.
Description
Technical Field
The invention relates to the technical field of LED display, in particular to a pixel driving circuit, a driving method and a display device.
Background
An Organic Light Emitting Diode (OLED) display device has many advantages of self-luminescence, low driving voltage, high light Emitting efficiency, short response time, and wide temperature range. Are recognized as the most promising display devices. OLEDs are classified into Passive Matrix OLEDs (PMOLEDs) and Active Matrix Organic Light Emitting Diodes (AMOLEDs) according to driving methods. The AMOLED display device is provided with a plurality of pixels arranged in an array mode, and each pixel is driven through a pixel driving circuit.
The gray levels represent gradation levels of different brightness from the darkest to the brightest. In order to realize 8-bit gray scale display, in the prior art, a light emitting element is designed in a pixel driving circuit, a display period of a frame image is divided by using an address selection period, and gray scale display of each level under 8-bit of the frame image is realized by controlling the bright and dark states of the light emitting element in each divided light emitting period.
However, in practical applications, the reading speed of an Integrated Circuit (IC) is limited due to the short address period, and it is difficult to realize 8-bit gray scale display.
Disclosure of Invention
The invention provides a pixel driving Circuit, a driving method and a display device, which are used for solving the problems that in the prior art, the reading speed of an Integrated Circuit (IC) is limited and 8-bit gray scale display is difficult to realize.
In a first aspect, the present invention provides a pixel driving circuit, including: at least two driving units, each of which is provided with a light emitting element; the at least two driving units are connected with a power supply voltage, each driving unit of the at least two driving units is connected with a corresponding control signal, each display period of the control signal comprises N sub-fields, each driving unit of the at least two driving units is used for controlling the bright and dark states of a light-emitting element in the driving unit in each sub-field according to the control signal, so that the pixel driving circuit can realize gray scale display of each level under a target bit, and N is more than or equal to 2.
The pixel driving circuit is provided with at least two driving units, each driving unit is provided with a light-emitting element, each driving unit can independently control the light-emitting time of the light-emitting element in the driving unit according to a control signal accessed by the driving unit, each display period in the control signal comprises a plurality of sub-fields, the control of the light-emitting time of each light-emitting element can be realized by controlling the light and dark states of each light-emitting element in each sub-field, and then the gray scale display of each level under a target bit position is realized. The problem that 8-bit gray scale display is difficult to realize due to the limited reading speed of the IC in the prior art is solved.
Optionally, the at least two drive units comprise: a first drive unit and a second drive unit; the first driving unit and the second driving unit are both connected with the power supply voltage, the first driving unit is connected with a first control signal, each display period of the first control signal comprises N subfields, the second driving unit is connected with a second control signal, and each display period of the second control signal comprises N subfields; the first driving unit is used for controlling the bright and dark states of the light-emitting elements in the first driving unit in each sub-field according to the first control signal, and the second driving unit is used for controlling the bright and dark states of the light-emitting elements in the second driving unit in each sub-field according to the second control signal, so that the pixel driving circuit can realize gray scale display of each level under the target bit.
Optionally, the first driving unit includes: a first switching transistor, a first driving transistor, and a first light emitting element; the second driving unit includes: a second switching transistor, a second driving transistor, and a second light emitting element; the first end and the control end of the first switch transistor are connected with the first control signal, the second end of the first switch transistor is connected with the control end of the first drive transistor, the first end of the first drive transistor is connected with a positive power supply voltage, the second end of the first drive transistor is connected with the anode of the first light-emitting element, and the cathode of the first light-emitting element is connected with a negative power supply voltage; the first end and the control end of the second switch transistor are connected with the second control signal, the second end of the second switch transistor is connected with the control end of the second drive transistor, the first end of the second drive transistor is connected with a positive power supply voltage, the second end of the second drive transistor is connected with the anode of the second light-emitting element, and the cathode of the second light-emitting element is connected with a negative power supply voltage.
The pixel driving circuit provides a design structure which can be realized by the first driving unit and the first driving unit, the first driving unit is provided with the first light-emitting element, the second driving unit is provided with the second light-emitting element, the display period of one frame of image is divided into seven sub-fields, and gray scale display of different levels under 8 bit can be realized by controlling the light-dark state of each light-emitting element in each sub-field. The problem that 8-bit gray scale display is difficult to realize due to the limited reading speed of the IC in the prior art is solved.
Optionally, each display period of the first control signal includes seven subfields, and the time lengths corresponding to the seven subfields included in each display period of the first control signal are distributed according to 1:2:4:8:16:32: 64; each display period of the second control signal includes seven subfields, and the time duration corresponding to the seven subfields included in each display period of the second control signal is distributed according to 1:2:4:8:16:32: 64.
Optionally, the first control signal includes: a scan signal and a first data signal; the second control signal includes: the scan signal and the second data signal.
Optionally, the first switching transistor is configured to control a bright-dark state of the first light emitting element in each subfield according to a write voltage of a first data signal in each subfield when the scanning signal is in an on state, and the second switching transistor is configured to control a bright-dark state of the second light emitting element in each subfield according to a write voltage of a second data signal in each subfield when the scanning signal is in an on state, so that the pixel driving circuit realizes gray scale display of each level in the target bit.
In a second aspect, the present invention provides a pixel driving method, applied to the pixel driving circuit, including: each driving unit of the at least two driving units receives a corresponding control signal, and each display period of the control signal comprises N subfields; and each of the at least two driving units controls the bright and dark states of the light-emitting elements in the driving unit in each subfield according to the control signal so that the pixel driving circuit realizes gray scale display of each level under a target bit, wherein N is more than or equal to 2.
Optionally, each display period of the first control signal includes seven subfields, and the time lengths corresponding to the seven subfields included in each display period of the first control signal are distributed according to 1:2:4:8:16:32: 64; each display period of the second control signal includes seven subfields, and the time duration corresponding to the seven subfields included in each display period of the second control signal is distributed according to 1:2:4:8:16:32: 64.
Optionally, the first control signal includes: a scan signal and a first data signal; the second control signal includes: the scan signal and the second data signal.
Optionally, each of the at least two driving units controls the light-emitting elements in the driving unit to be in a bright-dark state in each of the subfields according to the control signal, including: the first switching transistor in the at least two driving units controls the bright and dark states of the first light-emitting element in each subfield according to the writing voltage of the first data signal in the on state of the scanning signal in each subfield; the second switch transistor in the at least two driving units controls the bright and dark states of the second light-emitting element in each subfield according to the writing voltage of the second data signal in the on state of the scanning signal in each subfield, so that the pixel driving circuit realizes the gray scale display of each level under the target bit.
In a third aspect, the present invention provides a display device, including the pixel driving circuit, where the pixel driving circuit is configured with at least two driving units, each driving unit is provided with a light emitting element, each driving unit can individually control the light emitting time of the light emitting element in the driving unit according to a control signal accessed by the driving unit, each display period in the control signal includes a plurality of subfields, and the control of the light emitting time of each light emitting element can be realized by controlling the bright and dark state of each light emitting element in each subfield, so as to realize gray scale display of each level under a target bit. The problem that 8-bit gray scale display is difficult to realize due to the limited reading speed of the IC in the prior art is solved.
Drawings
FIG. 1 is a schematic diagram of a display period division provided in the prior art;
fig. 2 is a schematic structural diagram of a pixel driving circuit according to a first embodiment of the present invention;
FIG. 3 is a schematic diagram of a first control signal waveform provided by the present invention;
FIG. 4 is a waveform diagram illustrating a second control signal according to the present invention;
fig. 5 is a schematic structural diagram of a second embodiment of the pixel driving circuit according to the present invention.
Description of reference numerals:
10: a first drive unit;
11: a second driving unit;
101: a first switching transistor;
102: a first drive transistor;
103: a first light emitting element;
111: a second switching transistor;
112: a second drive transistor;
113: a second light emitting element;
104: a first storage capacitor;
114: a second storage capacitor.
Detailed Description
To make the purpose, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be clearly and completely described below with reference to the drawings in the present application, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Further, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. The character "is a relationship generally indicating that the former and latter associated objects are an" or ". "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a alone, b alone, c alone, a and b combination, a and c combination, b and c combination, or a, b and c combination, wherein a, b and c can be single or multiple.
The gray levels represent gradation levels of different brightness from the darkest to the brightest. Referring to fig. 1, in order to realize 8-bit gray scale display, in the prior art, an address selection period T1-T8 is used to divide a display period of a frame image to obtain eight light emitting periods T1-T8, each light emitting period may have two states of light and dark, and gray scale display of each level under 8-bit of a frame image can be realized by setting the light and dark states of each light emitting period. However, in practical applications, the reading speed of an Integrated Circuit (IC) is limited due to the short address period, and it is difficult to realize 8-bit gray scale display.
In view of the above technical problems in the prior art, the present invention provides a pixel driving circuit, in which at least two driving units are designed, each driving unit is provided with a light emitting element, each driving unit individually controls the light emitting element in the driving unit to emit light according to a control signal accessed by the driving unit, each display period in the control signal includes a plurality of subfields, and the control of the light emitting time of each light emitting element can be realized by controlling the bright and dark states of each light emitting element in each subfield, so as to realize gray scale display of each level under a target bit. The problem that 8-bit gray scale display is difficult to realize due to the limited reading speed of the IC in the prior art is solved.
The following describes the pixel driving circuit and the corresponding driving method of the present invention in detail by using specific embodiments. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments. Embodiments of the present invention will be described below with reference to the accompanying drawings.
Fig. 2 is a schematic structural diagram of a pixel driving circuit according to a first embodiment of the present invention. The pixel driving circuit provided by the embodiment comprises: each driving unit of the at least two driving units is provided with a light-emitting element, the at least two driving units are connected with a power supply voltage, each driving unit of the at least two driving units is connected with a corresponding control signal, each display period in the control signal comprises N sub-fields, and each driving unit of the at least two driving units is used for controlling the light and dark state of the light-emitting element in the driving unit in each sub-field according to the control signal so as to enable the pixel driving circuit to realize gray scale display of each level under a target bit.
The number of the driving units is required to be greater than or equal to 2. Each drive unit is designed with a light emitting element, such as an LED. Each driving unit individually controls the light emitting time of the light emitting elements in the driving unit.
Referring to fig. 2, the structure and driving principle of the pixel driving circuit provided in this embodiment will be described below by taking as an example that at least two driving units include a first driving unit 10 and a second driving unit 11:
the first driving unit 10 and the second driving unit 11 are both connected to a power supply voltage, the power supply voltage is represented by VDD and VSS in fig. 2, the first driving unit 10 is connected to a first control signal, the first control signal is represented by Scan and Data1 in fig. 2, the second driving unit 11 is connected to a second control signal, the second control signal is represented by Scan and Data2 in fig. 2, each display period of the first control signal includes N subfields, and the first driving unit 10 is configured to control the light and dark states of the light emitting elements in the first driving unit 10 within the respective subfields according to the first control signal; each display period of the second control signal includes N subfields, and the second driving unit 11 is configured to control the light-emitting elements in the second driving unit 11 to be in a bright-dark state in each subfield according to the second control signal, so that the pixel driving circuit realizes gray scale display of each level at the target bit.
The first control signal accessed by the first driving unit 10 may include a Scan signal and a first Data signal, the Scan signal is denoted by Scan in fig. 2, the first Data signal is denoted by Data1, the second control signal accessed by the second driving unit 11 may include the Scan signal and a second Data signal, and the second Data signal is denoted by Data2 in fig. 2.
Wherein the first control signal has a periodicity, one period of the first control signal corresponds to a display period of one frame of image, as shown in fig. 3, each display period of the first control signal may be divided into seven subfields, respectively, subfield 1-subfield 7, and the corresponding time lengths of the subfields 1-subfield 7 are t1, t2, t4, t8, t16, t32 and t64, respectively. The seven subfields may be allocated according to a duration of 1:2:4:8:16:32: 64. Like the first control signal, each display period of the second control signal may also be divided into seven subfields, which are allocated with time durations t1, t2, t4, t8, t16, t32, and t64 of 1:2:4:8:16:32:64, as shown in fig. 4. The first driving unit 10 may control the light-dark state of the light emitting elements in the first driving unit 10 in each subfield according to the writing voltage of the first Data signal Data1 in each subfield; similarly, the second driving unit 11 may control the light-dark state of the light emitting elements in the second driving unit 11 in each subfield according to the writing voltage of the second data signal in each subfield. Because two light-emitting elements are designed in one pixel circuit, the gray scale of the pixel drive circuit is multiplied, so that the pixel drive circuit can realize 8 bits (2)7×2＝28) And displaying gray scales of the next level.
In the pixel driving circuit provided by this embodiment, at least two driving units are designed, each driving unit is provided with a light emitting element, each driving unit can individually control the light emitting time of the light emitting element in the driving unit according to a control signal accessed by the driving unit, each display period in the control signal includes a plurality of subfields, and the control of the light emitting time of each light emitting element can be realized by controlling the bright and dark states of each light emitting element in each subfield, so as to realize gray scale display of each level under a target bit. The problem that 8-bit gray scale display is difficult to realize due to the limited reading speed of the IC in the prior art is solved.
Fig. 5 is a schematic structural diagram of a second embodiment of the pixel driving circuit according to the present invention. The present embodiment describes in detail possible design structures of the first drive unit 10 and the second drive unit 11 in the above-described embodiments. As shown in fig. 5, in the pixel driving circuit provided in this embodiment, the first driving unit 10 includes: a first switching transistor 101, a first driving transistor 102, and a first light emitting element 103; the second drive unit 11 includes: a second switching transistor 111, a second driving transistor 112, and a second light emitting element 113.
A first end and a control end of the first switch transistor 101 are connected to the first control signal, a second end of the first switch transistor 101 is connected to a control end of the first driving transistor 102, a first end of the first driving transistor 102 is connected to a positive power supply voltage VDD, a second end of the first driving transistor 102 is connected to an anode of the first light emitting element 103, and a cathode of the first light emitting element 103 is connected to a negative power supply voltage VSS; the first terminal and the control terminal of the second switching transistor 111 are connected to the second control signal, the second terminal of the second switching transistor 111 is connected to the control terminal of the second driving transistor 112, the first terminal of the second driving transistor 112 is connected to the positive power supply voltage VDD, the second terminal of the second driving transistor 112 is connected to the anode of the second light emitting element 113, and the cathode of the second light emitting element 113 is connected to the negative power supply voltage VSS.
Optionally, the types of the first switching transistor 101, the first driving transistor 102, the second switching transistor 111, and the second driving transistor 112 may be P-type thin film transistors. In this case, the control terminal is a gate of the transistor, the first terminal is a source of the transistor, and the second terminal is a drain of the transistor. Then, referring to fig. 2, the connection relationship between the above devices is: a source of the first switching transistor 101 is connected to the first Data signal Data1, a gate of the first switching transistor 101 is connected to the Scan signal Scan, a drain of the first switching transistor 101 is connected to a gate of the first driving transistor 102, a source of the first driving transistor 102 is connected to the positive power supply voltage VDD, a drain of the first driving transistor 102 is connected to an anode of the first light emitting element 103, and a cathode of the first light emitting element 103 is connected to the negative power supply voltage VSS; the source of the second switching transistor 111 is connected to the second Data signal Data2, the gate of the second switching transistor 111 is connected to the Scan signal Scan, the drain of the second switching transistor 111 is connected to the gate of the second driving transistor 112, the source of the second driving transistor 112 is connected to the positive power supply voltage VDD, the drain of the second driving transistor 112 is connected to the anode of the second light emitting element 113, and the cathode of the second light emitting element 113 is connected to the negative power supply voltage VSS.
Optionally, in order to keep the gate voltage of the first driving transistor 102 stable, the pixel driving circuit provided in this embodiment may further include a first storage capacitor 104, and similarly, in order to keep the gate voltage of the second driving transistor 112 stable, the pixel driving circuit provided in this embodiment may further include a second storage capacitor 114.
The first switching transistor 101 may control the bright and dark state of the first light emitting element 103 in each subfield according to the writing voltage of the first Data signal Data1 when each subfield Scan signal Scan is in the on state, and the second switching transistor 111 may control the bright and dark state of the second light emitting element 113 in each subfield according to the writing voltage of the second Data signal Data2 when each subfield Scan signal Scan is in the on state, so that the pixel driving circuit realizes the gray scale display of the target bit.
Specifically, in conjunction with the waveform diagrams shown in fig. 3 and 4, the Scan signal Scan is used to control the first switching transistor 101 and the second switching transistor 111 to be turned on or off. When the transistor type is the P type, the first switching transistor 101 and the second switching transistor 111 are turned on when the Scan signal Scan is at a low level.
For the first driving unit 10, taking subfield 1 of the first control signal shown in fig. 3 as an example, if the current gray scale requires the first light emitting element 103 to be in the "bright" state in the subfield 1, the writing voltage of the first Data signal Data1 in the subfield 1 can be set to be a low voltage to turn on the first driving transistor 102, so that the first light emitting element 103 can be driven to light by the positive power supply voltage VDD and the negative power supply voltage VSS; if the current gray scale requires that the first light emitting element 103 is in the "dark" state in the subfield 1, the writing voltage of the first Data signal Data1 in the subfield 1 can be set to a high voltage, and the first driving transistor 102 is turned off at this time, so that the first light emitting element 103 cannot emit light. Thereby, the light and dark control of the first light emitting element 103 in subfield 1 can be realized. The principle of the light and dark control of the first light emitting element 103 in the other sub-fields is similar, and the present invention is not described herein again.
Similarly, for the second driving unit 11, taking subfield 1 of the second control signal shown in fig. 4 as an example, if the current gray scale requires that the second light emitting element 113 is in a "bright" state in the subfield 1, the writing voltage of the first Data signal Data2 in the subfield 1 is set to be a low voltage, so as to turn on the second driving transistor 112, and further, the second light emitting element 113 is driven by the positive power supply voltage VDD and the negative power supply voltage VSS to be lighted; if the current gray scale display requires the second light emitting element 113 to be in the "dark" state in the subfield 1, the writing voltage of the second Data signal Data2 in the subfield 1 can be set to be a high voltage, and the second driving transistor 112 is turned off at this time, so that the second light emitting element 113 cannot emit light. Thereby, the light and dark control of the second light emitting element 113 in the subfield 1 can be realized. The principle of controlling the brightness of the second light emitting element 113 in the other sub-fields is similar, and the present invention is not described herein again.
The first driving unit 10 may control the light emitting time of the first light emitting element 103 in the display period of one frame image by controlling the light-dark state of the first light emitting element 103 in each subfield, the second driving unit 11 may control the light emitting time of the second light emitting element 113 in the display period of one frame image by controlling the light-dark state of the second light emitting element 113 in each subfield, and different gray scale display may be realized by controlling the light emitting time of the first light emitting element 103 and the second light emitting element 113.
In one possible implementation, the light emitting time corresponding to the 255 levels of gray scale at 8 bits may be (the first light emitting element 103 is represented by the LED1, and the second light emitting element 113 is represented by the LED 2):
g0: both LEDs are not bright;
G1：(LED1)t1；
G2：(LED2)t2；
G3：(LED1)t1+(LED2)t2；
G4：(LED1)t4；
G5：(LED2)t4+(LED1)t1；
G6：(LED1)t4+(LED2)t2；
G7：(LED2)t4+(LED1)t1+t2；
G8：(LED1)t8；
G9：(LED2)t8+(LED1)t1；
G10：(LED1)t8+(LED2)t2；
…
G16：(LED1)t16；
G17：(LED2)t16+(LED1)t1；
G18：(LED1)t16+(LED2)t2；
G32：(LED1)t32；
G33：(LED2)t32+(LED1)t1；
G34：(LED1)t32+(LED2)t2；
…
G64：(LED1)t64；
G65：(LED2)t64+(LED1)t1；
G66：(LED1)t64+(LED2)t2；
…
G128：(LED1)t64+(LED2)t64；
G129：(LED1)t64+(LED2)t64+t1；
G130：(LED1)t64+t2+(LED1)t64；
…
G254：(LED1)t1+t2+t4+t8+t16+t32+t64+(LED2)t1+t2+t4+t8+t16+t32+t64。
taking the example of G129, when the gray scale level is G129, the LED1 can be controlled to be "bright" only in subfield 7 (corresponding to a time period of t64) and "dark" in all of subfields 1 to 6, while the LED2 is controlled to be "bright" in both subfields 1 and 7 and "dark" in all of subfields 2 to 6. Taking G254 as an example, when the gray scale level is G254, LED1 can be controlled to be in a "bright" state for all subfields, while LED2 can be controlled to be in a "bright" state for all subfields. It can be seen that, on the basis of designing two light emitting elements in a pixel driving circuit and dividing a display period of one frame image into seven subfields, gray scale display of different levels at 8 bits can be realized by controlling the light and dark states of the respective light emitting elements in the respective subfields.
The pixel driving circuit provided by this embodiment provides an achievable design structure of the first driving unit and the second driving unit, the first driving unit is designed with the first light emitting element, the second driving unit is designed with the second light emitting element, the display period of one frame of image is divided into seven subfields, and gray scale display of different levels under 8 bits can be realized by controlling the light and dark states of each light emitting element in each subfield. The problem that 8-bit gray scale display is difficult to realize due to the limited reading speed of the IC in the prior art is solved.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (9)
1. A pixel driving circuit, comprising: at least two driving units, each of which is provided with a light emitting element;
the at least two driving units are connected with a power supply voltage, each driving unit of the at least two driving units is connected with a corresponding control signal, each display period of the control signal comprises N sub-fields, each driving unit of the at least two driving units is used for controlling the bright and dark states of a light-emitting element in the driving unit in each sub-field according to the control signal, so that the pixel driving circuit can realize gray scale display of each level under a target bit through controlling the light-emitting duration of the light-emitting element in the display period of one frame of image, and N is more than or equal to 2;
the control signal comprises a first control signal and a second control signal, wherein each display period of the first control signal comprises seven subfields, and the time lengths corresponding to the seven subfields in each display period of the first control signal are distributed according to the ratio of 1:2:4:8:16:32: 64;
each display period of the second control signal comprises seven subfields, and the duration corresponding to the seven subfields of each display period of the second control signal is distributed according to 1:2:4:8:16:32: 64.
2. The pixel driving circuit according to claim 1, wherein the at least two driving units comprise: a first drive unit and a second drive unit;
the first driving unit includes: a first switching transistor, a first driving transistor, and a first light emitting element; the second driving unit includes: a second switching transistor, a second driving transistor, and a second light emitting element;
a first end and a control end of the first switch transistor are connected with a first control signal, a second end of the first switch transistor is connected with the control end of the first drive transistor, the first end of the first drive transistor is connected with a positive power supply voltage, the second end of the first drive transistor is connected with an anode of the first light-emitting element, and a cathode of the first light-emitting element is connected with a negative power supply voltage;
the first end and the control end of the second switch transistor are connected with a second control signal, the second end of the second switch transistor is connected with the control end of the second driving transistor, the first end of the second driving transistor is connected with a positive voltage of a power supply, the second end of the second driving transistor is connected with the anode of the second light-emitting element, and the cathode of the second light-emitting element is connected with a negative voltage of the power supply.
3. The pixel driving circuit according to claim 2,
the first control signal includes: a scan signal and a first data signal; the second control signal includes: the scan signal and a second data signal.
4. The pixel driving circuit according to claim 3, wherein the first switching transistor is configured to control a bright-dark state of the first light emitting element in each subfield according to a writing voltage of a first data signal in a conducting state of the scan signal in each subfield, and the second switching transistor is configured to control a bright-dark state of the second light emitting element in each subfield according to a writing voltage of a second data signal in a conducting state of the scan signal in each subfield, so that the pixel driving circuit realizes gray scale display at each level of the target bit.
5. A pixel driving method applied to the pixel driving circuit according to any one of claims 1 to 4, the method comprising:
each driving unit in the at least two driving units receives a corresponding control signal, and each display period of the control signal comprises N subfields;
and each of the at least two driving units controls the bright and dark states of the light-emitting elements in the driving unit in each sub-field according to the control signal, so that the pixel driving circuit realizes gray scale display of each level under a target bit, and N is greater than or equal to 2.
6. The method of claim 5,
each display period of the first control signal comprises seven subfields, and the corresponding time length of the seven subfields in each display period of the first control signal is distributed according to 1:2:4:8:16:32: 64;
each display period of the second control signal comprises seven subfields, and the duration corresponding to the seven subfields of each display period of the second control signal is distributed according to 1:2:4:8:16:32: 64.
7. The method of claim 6,
the first control signal includes: a scan signal and a first data signal; the second control signal includes: a second data signal.
8. The method according to any one of claims 5-7, wherein each of the at least two driving units controls a bright-dark state of a light emitting element in the driving unit within the respective subfield according to the control signal, comprising:
the first switching transistors in the at least two driving units control the bright and dark states of the first light-emitting elements in each subfield according to the writing voltage of the first data signal when the scanning signal in each subfield is in a conducting state; and the second switching transistors in the at least two driving units control the bright and dark states of the second light-emitting elements in each subfield according to the writing voltage of the second data signal when the scanning signal in each subfield is in a conducting state, so that the pixel driving circuit realizes gray scale display of each level under the target bit.
9. A display device comprising the pixel drive circuit according to any one of claims 1 to 4.
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