CN210627871U - Pixel circuit, display panel and display device - Google Patents
Pixel circuit, display panel and display device Download PDFInfo
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- CN210627871U CN210627871U CN201922047035.1U CN201922047035U CN210627871U CN 210627871 U CN210627871 U CN 210627871U CN 201922047035 U CN201922047035 U CN 201922047035U CN 210627871 U CN210627871 U CN 210627871U
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Abstract
The utility model discloses a pixel circuit, display panel and display device. The pixel circuit comprises at least two pixel sub-circuits; the pixel sub-circuit comprises a first power supply input end, a second power supply input end, a data signal input end, a scanning signal input end, a data voltage writing module, a storage module, a driving module and a light-emitting module. By arranging that the pixel circuit comprises at least two pixel sub-circuits, each pixel sub-circuit can independently control the light emission. When the display panel is used for high gray scale display, the driving time can be a fraction of the original driving time when the same gray scale brightness is achieved, so that the time for the control end of the driving module to maintain the potential can be shortened, and the display uniformity of the display panel consisting of a plurality of pixel circuits is improved. In addition, the driving time corresponding to the low-order gray scale can be increased, so that the risk that the light-emitting module cannot respond to the too-narrow pulse width is reduced during low-order gray scale display, and the service life of the light-emitting module is prolonged.
Description
Technical Field
The embodiment of the utility model provides a relate to and show technical field, especially relate to a pixel circuit, display panel and display device.
Background
Micro Light Emitting Diode (Micro-LED) display devices have been receiving wide attention because of the advantages of being able to miniaturize the size of the Light Emitting Diode (LED) and having higher Light Emitting brightness, higher Light Emitting efficiency and lower operation power consumption than Organic Light Emitting Diode (OLED) display devices.
When the Micro-LED display device displays, the Micro-LED display device can be driven to emit light in a digital driving mode. In the digital driving process, the display time of one frame needs to be divided into a plurality of sub-frames according to the gray scale. The larger the gray scale number is, the shorter the sub-frame time corresponding to the low gray scale is, which may result in that the Micro-LED cannot be driven to emit light at the low gray scale. The sub-frame time corresponding to the high gray scale is longer, so that the uniformity of light emission of the Micro-LED is poor.
SUMMERY OF THE UTILITY MODEL
The utility model provides a pixel circuit, display panel and display device to improve the homogeneity that display panel shows, drive Micro-LED's stability when having improved low grey level simultaneously.
In a first aspect, an embodiment of the present invention provides a pixel circuit, including at least two pixel sub-circuits; the pixel sub-circuit comprises a first power supply input end, a second power supply input end, a data signal input end, a scanning signal input end, a data voltage writing module, a storage module, a driving module and a light-emitting module;
the data voltage writing module comprises a control end, a first end and a second end; the control end of the data voltage writing module is electrically connected with the scanning signal input end, the first end of the data voltage writing module is electrically connected with the data signal input end, the second end of the data voltage writing module is electrically connected with the control end of the driving module, and the data voltage writing module is used for writing data voltage into the driving module;
the memory module comprises a first end and a second end; the first end of the storage module is electrically connected with the control end of the driving module, the second end of the storage module is electrically connected with the first power supply input end, and the storage module is used for storing the data voltage;
the drive module further comprises a first end and a second end; the first end of the driving module is electrically connected with the first power supply input end, the second end of the driving module is electrically connected with the first end of the light-emitting module, and the driving module is used for outputting a driving signal according to the data voltage;
the light emitting module further comprises a second end, the second end of the light emitting module is electrically connected with the second power input end, and the light emitting module is used for emitting light according to the driving signal.
Optionally, the second power signal input by the second power input terminal is a pulse width modulation signal.
Optionally, the pixel sub-circuit further comprises a reference signal input terminal and a reset module;
the reset module comprises a control end, a first end and a second end; the control end of the reset module is electrically connected with the scanning signal input end, the first end of the reset module is electrically connected with the reference signal input end, and the second end of the reset module is electrically connected with the first end of the light-emitting module; the reset module is used for resetting the light emitting module.
Optionally, the pixel sub-circuit further includes a sensing control signal input terminal, a sensing signal output terminal, and a sensing module;
the induction module comprises a control end, a first end and a second end; the control end is electrically connected with the induction control signal input end, the first end of the induction module is electrically connected with the first end of the light-emitting module, and the second end of the induction module is electrically connected with the induction signal output end; the sensing module is used for sensing the electric potential of the light emitting module.
Optionally, the data voltage writing module includes a first transistor, the storage module includes a storage capacitor, the driving module includes a driving transistor, and the light emitting module includes a light emitting diode;
a gate of the first transistor is used as a control terminal of the data voltage writing module, a first pole of the first transistor is used as a first terminal of the data voltage writing module, and a second pole of the first transistor is used as a second terminal of the data voltage writing module;
a first pole of the storage capacitor is used as a first end of the storage module, and a second pole of the storage capacitor is used as a second end of the storage module;
the grid electrode of the driving transistor is used as the control end of the driving module, the first pole of the driving transistor is used as the first end of the driving module, and the second pole of the driving transistor is used as the second end of the driving module;
the anode of the light emitting diode is used as the first end of the light emitting module, and the cathode of the light emitting diode is used as the second end of the light emitting module.
Optionally, the reset module includes a second transistor, and the sensing module includes a third transistor;
a gate of the second transistor is used as a control end of the reset module, a first pole of the second transistor is used as a first end of the reset module, and a second pole of the second transistor is used as a second end of the reset module;
the grid electrode of the third transistor is used as the control end of the sensing module, the first pole of the third transistor is used as the first end of the sensing module, and the second pole of the third transistor is used as the second end of the sensing module.
Optionally, the number of pixel sub-circuits is less than or equal to three.
In a second aspect, the embodiment of the present invention further provides a display panel, including the pixel circuit provided by any embodiment of the present invention.
Optionally, the display panel further comprises a gate driving circuit;
the pixel circuit comprises at least two pixel sub-circuits, and each pixel sub-circuit comprises an induction control signal input end;
the grid driving circuit comprises a first output end and a second output end; the first output end is electrically connected with the scanning signal input end of the pixel sub-circuit, and the second output end is electrically connected with the induction control signal input end of the pixel sub-circuit.
The third aspect, the embodiment of the present invention further provides a display device, including the present invention provides a display panel according to any embodiment.
The utility model discloses a set up pixel circuit and include two at least pixel sub-circuit, every pixel sub-circuit can the independent control luminous. When the display panel is used for displaying high gray scale, the pixel sub-circuits in the pixel circuits control the light-emitting modules to emit light, compared with the pixel circuits in the prior art, the driving time can be a fraction of the original time when the same gray scale brightness is achieved, so that the time for the control end of the driving module to maintain the potential can be shortened, the change of the driving current formed by the driving module is reduced, and the display uniformity of the display panel formed by a plurality of pixel circuits is improved. Moreover, after the driving time corresponding to the high-order gray scale is reduced to be a fraction of the original driving time, the driving time corresponding to the corresponding low-order gray scale can be increased, so that the risk that the light-emitting module cannot respond to the too-narrow pulse width during low-order gray scale display is reduced, and the service life of the light-emitting module device is prolonged.
Drawings
FIG. 1 is a schematic diagram of a pixel circuit in the prior art;
fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 4 is a timing diagram of a low gray scale display shown in FIG. 3;
FIG. 5 is a timing diagram of the driving of the high gray scale display shown in FIG. 3;
fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 7 is a timing diagram illustrating the operation of the pixel circuit in the high gray scale display shown in FIG. 6;
fig. 8 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 9 is a display panel according to an embodiment of the present invention;
FIG. 10 is a timing diagram illustrating the driving of the display panel of FIG. 9 during high gray scale display;
fig. 11 is a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic structural diagram of a pixel circuit in the prior art. As shown in fig. 1, the pixel circuit includes a switching transistor M1, a driving transistor M2, a storage capacitor c1, and a light emitting diode D1. A gate of the switching transistor M1 is electrically connected to the scan signal line scan, a first pole of the switching transistor M1 is electrically connected to the data line data, a second pole of the switching transistor M1 is electrically connected to the gate of the driving transistor M2 and the first pole of the storage capacitor c1, and a first pole of the driving transistor M2 and the second pole of the storage capacitor c1A pole is electrically connected to the first power supply signal line Vdd, a second pole of the driving transistor M2 is electrically connected to the anode of the light emitting diode D1, and the cathode of the light emitting diode D1 is electrically connected to the second power supply signal line Vss. Due to the visual pause effect of the human eye, the integral of the brightness sensed by the human eye in one frame time (including 12 sub-frames) is the actual gray-scale brightness of the pixel. In the process of driving the light emitting diode D1 to emit light by adopting a digital driving method, one frame needs to be divided into a plurality of sub-frames according to gray scale, and the light emitting brightness of the low-order gray scale is relatively small, the time of the corresponding sub-frame is relatively short, the light emitting brightness of the high-order gray scale is relatively large, and the time of the corresponding sub-frame is relatively long. The larger the number of gray scales, the shorter the time corresponding to the sub-frame of the lower gray scale. In the data writing phase, the scan signal line scan controls the switching transistor M1 to write the data voltage of the data line data into the driving transistor M2 for a short time, and the data voltage may not be completely written into the driving transistor M2, so that in the light emitting phase, the driving current of the driving transistor M2 driving the light emitting diode D1 is relatively small, and the light emitting diode D1 cannot be normally driven to emit light. Meanwhile, the longer the time corresponding to the sub-frame of the high-order gray scale. In the light emission period, the gate potential of the driving transistor M2 is lowered during the holding. The gate potential of different pixel circuits decreases to different degrees, so that the driving currents corresponding to different pixel circuits are different, that is, the light emitting luminance of the light emitting diode D1 in different pixel circuits is different, and the uniformity of the display panel is poor. Illustratively, when 12 bits are used to represent the display data, one frame is divided into 12 sub-frames, and the data displayed by each sub-frame corresponds to the gray scale 20、21、22、23、24、25、26、27、28、29、210、211. For example, a certain pixel needs to display 3 gray levels, where 3 is 1+2, that is, Data is written at a high level of 1 in each of the first sub-frame and the second sub-frame, and Data is written at a low level of 0 in the other sub-frames. The time of the first sub-frame is the shortest, and the phenomenon that the light emitting diode D1 cannot be normally driven to emit light is easily caused. The longest time corresponding to the twelfth sub-frame is easy to cause the display panel to display due to different driving currents corresponding to different pixel circuitsPoor uniformity.
To address the above technical problems, an embodiment of the present invention provides a pixel circuit. Fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention. As shown in fig. 2, the pixel circuit includes at least two pixel sub-circuits 110; the pixel sub-circuit 110 includes a first power input terminal VDD, a second power input terminal VSS, a data signal input terminal Vdata, a scan signal input terminal, a data voltage writing module 111, a memory module 112, a driving module 113, and a light emitting module 114. The data voltage writing module 111 includes a control terminal, a first terminal and a second terminal; the control end of the data voltage writing module 111 is electrically connected to the scan signal input end, the first end of the data voltage writing module 111 is electrically connected to the data signal input end Vdata, the second end of the data voltage writing module 111 is electrically connected to the control end of the driving module 113, and the data voltage writing module 111 is configured to write a data voltage into the driving module 113. The memory module 112 includes a first end and a second end; the first end of the memory module 112 is electrically connected to the control end of the driving module 113, the second end of the memory module 112 is electrically connected to the first power input end VDD, and the memory module 112 is configured to store a data voltage. The drive module 113 further comprises a first end and a second end; a first end of the driving module 113 is electrically connected to the first power input terminal VDD, a second end of the driving module 113 is electrically connected to a first end of the light emitting module 114, and the driving module 114 is configured to output a driving signal according to a data voltage. The light emitting module 114 further includes a second end, the second end of the light emitting module 114 is electrically connected to the second power input terminal VSS, and the light emitting module 114 is configured to emit light according to the driving signal.
In particular, the pixel circuit is exemplarily shown in fig. 2 to include two pixel sub-circuits. The scanning signal input end of each pixel sub-circuit is different scanning signal input ends, and data voltage writing of the corresponding pixel sub-circuit is controlled respectively. As shown in fig. 2, the Scan signal input terminal of one pixel sub-circuit is a first Scan signal input terminal Scan1, and the Scan signal input terminal of the other pixel sub-circuit is a second Scan signal input terminal Scan 2. The light emitting modules 114 of each pixel sub-circuit can be controlled to emit light simultaneously or not by the scan signal input terminal of each pixel sub-circuit. When the light emitting modules 114 of both pixel sub-circuits emit light, each pixel circuit includes two light emitting modules 114. In the digital driving process, the light emitting brightness is positively correlated with the number of the light emitting modules 114, the driving time, and the driving current. When the driving current and the driving time are the same, the luminance of light emitted by the two light emitting modules 114 is twice the luminance of light emitted by one light emitting module 114. Under the same driving current, the driving time of the two light emitting modules 114 can be reduced to half of the original driving time, i.e. the light emitting brightness of one light emitting module 114 can be ensured to be consistent. Therefore, when a frame is divided into a plurality of subframes, the time of the subframe corresponding to the high-order gray scale can be reduced to half of the original time, so that when the high-order gray scale is displayed, the two light emitting modules 114 are controlled to emit light simultaneously, the time for the control end of the driving module 113 to maintain the electric potential is shortened, the change of the driving current formed by the driving module 113 is reduced, and the display uniformity of the display panel formed by a plurality of pixel circuits is improved. Also, when the frame rate is determined, the time of one frame is determined. The sub-frame time corresponding to the high-order gray scale is reduced to half of the original time, and the sub-frame time corresponding to the corresponding low-order gray scale can be increased, so that the risk that the light-emitting module 114 cannot respond to the too-narrow pulse width during low-order gray scale display is reduced, and the service life of the light-emitting module 114 is prolonged. . In addition, when displaying in low gray scale, one light emitting module 114 can be controlled to emit light, which can meet the brightness requirement of low gray scale display.
It should be noted that the high gray level and the low gray level can be defined as required. For example, the division of the high gray scale and the low gray scale may be an intermediate position of the total gray scale number. Illustratively, the display data is represented by 12 bits, and thus there is a total of 212A gray scale. Wherein the high gray level can be G>212/2The low gray scale can be G less than or equal to 212/2. In other embodiments, the high and low gray levels may be defined as desired.
Exemplarily, fig. 3 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present invention. As shown in fig. 3, the data voltage writing module 111 includes a first transistor T1, the memory module 112 includes a storage capacitor C1, the driving module 113 includes a driving transistor Tdr, and the light emitting module 114 includes a light emitting diode E1; a gate of the first transistor T1 is used as a control terminal of the data voltage writing block 111, a first pole of the first transistor T1 is used as a first terminal of the data voltage writing block 111, and a second pole of the first transistor T1 is used as a second terminal of the data voltage writing block 111; a first pole of the storage capacitor C1 is used as a first terminal of the memory module 112, and a second pole of the storage capacitor C1 is used as a second terminal of the memory module 112; a gate of the driving transistor Tdr is used as a control terminal of the driving module 113, a first pole of the driving transistor Tdr is used as a first terminal of the driving module 113, and a second pole of the driving transistor Tdr is used as a second terminal of the driving module 113; the anode of the light emitting diode E1 serves as the first terminal of the light emitting module 114, and the cathode of the light emitting diode E1 serves as the second terminal of the light emitting module 114.
Specifically, fig. 4 is a driving timing diagram of a low gray scale display corresponding to fig. 3. FIG. 5 is a timing diagram of the driving in the high gray scale display shown in FIG. 3. The timing in fig. 4 and 5 is described by taking the case where the transistors in the pixel circuit are N-type transistors. Wherein Scan1 is the Scan signal timing sequence of the first Scan signal input terminal Scan1, Scan2 is the Scan signal timing sequence of the first Scan signal input terminal Scan2, VDD is the first power signal timing sequence of the first power input terminal VDD, and VSS is the second power signal timing sequence of the second power input terminal VSS.
As can be seen from fig. 4 and 3, the specific operation process in the low gray scale display is as follows:
in the data writing phase T1, the Scan signal Scan1 at the first Scan signal input terminal Scan1 is at a high level, the corresponding first transistor T1 is controlled to be turned on, the data voltage is written to the gate of the driving transistor Tdr, and the data voltage is held by the storage capacitor C1. The driving transistor Tdr is turned on by the data voltage.
In the light-emitting period t2, the second power signal vss is at a low level, and forms a driving current according to the first power signal VDD input from the first power input terminal VDD and the data voltage, so as to drive the light-emitting diode E1 to emit light. On the other hand, the Scan signal Scan2 at the second Scan signal input terminal Scan2 is low, the corresponding first transistor T1 is turned off, the data voltage cannot be written into the gate of the driving transistor Tdr, the driving transistor Tdr is turned off, and the driving current cannot be generated, so that the corresponding light emitting diode E1 does not emit light.
In summary, during the low gray scale display, one of the pixel sub-circuits in the pixel circuit can be controlled to operate, so that one of the light emitting diodes E1 emits light.
As can be seen from fig. 5 and fig. 3, the specific operation process in the high gray scale display is as follows:
similarly, in the data writing phase T1, the Scan signal Scan1 at the first Scan signal input terminal Scan1 and the Scan signal Scan2 at the second Scan signal input terminal Scan2 are at high level, so that the first transistors T1 in the two pixel sub-circuits are both controlled to be turned on, the data voltage is written to the gates of the two driving transistors Tdr, and the data voltage is held by the two storage capacitors C1. The two driving transistors Tdr are turned on by the data voltage.
During the light-emitting period t2, the second power signal vss is at a low level, and forms a driving current according to the first power signal VDD and the data voltage inputted from the first power input terminal VDD, and at this time, the light-emitting diodes E1 in both pixel sub-circuits emit light. Therefore, compared to the pixel circuit in fig. 1, when the required luminance of the same gray scale is achieved, the driving time of the two leds E1 can be reduced to half, and the corresponding sub-frame time can be reduced to half. Therefore, the time for maintaining the data voltage by the gate of the driving transistor Tdr can be shortened, the gate voltage of the driving transistor Tdr is closer to the data voltage, and the uniformity of the gate voltage of the driving transistor Tdr in different pixel circuits is improved, namely, the driving current formed by the driving transistor Tdr is relatively consistent, so that the display uniformity of a display panel formed by a plurality of pixel circuits is improved.
On the basis of the technical solutions, the number of the pixel sub-circuits is less than or equal to three.
Specifically, when the number of the pixel sub-circuits is large, the number of transistors required in the pixel circuit is greatly increased, so that the occupied area of the pixel circuit in the display panel is increased, the pixel arrangement of the display panel is not facilitated, and the process is not facilitated to be realized. The number of the pixel sub-circuits can be smaller than or equal to the above, so that the time for maintaining the potential of the gate of the driving transistor can be shortened, the display uniformity of a display panel consisting of a plurality of pixel circuits is improved, and the light emitting stability of the light emitting diode during low gray scale display is improved. In addition, the number of transistors in the pixel circuit cannot be greatly increased, the pixel arrangement density of the display panel is ensured, and the difficulty in process realization is prevented from being greatly increased.
On the basis of the above technical solutions, the second power signal input by the second power input terminal is a pulse width modulation signal.
Specifically, the first power signal input by the first power input terminal may be at a high level, and when the second power signal input by the second power input terminal is at a low level, a voltage difference may be generated between two ends of the light emitting diode, so as to form a driving current to drive the light emitting diode to emit light. When the second power signal input by the second power input terminal is at a high level and equal to the first power signal input by the first power input terminal, the voltage difference between the two ends of the light emitting diode is zero, and a driving current cannot be formed to drive the light emitting diode to emit light. Therefore, by setting the second power signal input by the second power input terminal to be a Pulse Width Modulation (PWM) signal, the light emitting time of the light emitting diode can be adjusted by adjusting the duty ratio of the PWM signal, and further, the gray scale corresponding to the light emitting brightness of the pixel circuit can be adjusted. For example, when the duty ratio of the PWM signal is relatively large, the light emitting time of the light emitting diode is relatively long, and the brightness sensed by human eyes in one frame time is relatively large, and the corresponding actual gray scale brightness is relatively large, that is, the gray scale display is relatively high. When the duty ratio of the PWM signal is smaller, the light emitting time of the light emitting diode is shorter, the brightness sensed by human eyes in one frame time is smaller, and the brightness of the corresponding actual gray scale is smaller, namely the brightness of the corresponding actual gray scale is displayed correspondingly to the low gray scale. Therefore, the gray scale display can be adjusted by adjusting the duty ratio of the second power supply signal input by the second power supply input end. On the basis of adjusting the gray scale through the number of the light emitting diodes, the brightness of the gray scale is further adjusted, so that the brightness corresponding to the gray scale can be better controlled.
Fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention. As shown in fig. 6, the pixel sub-circuit further includes a reference signal input terminal VREF and a reset module 115; the reset module 115 includes a control terminal, a first terminal, and a second terminal; the control end of the reset module 115 is electrically connected with the scanning signal input end, the first end of the reset module 115 is electrically connected with the reference signal input end VREF, and the second end of the reset module 115 is electrically connected with the first end of the light emitting module 114; the reset module 115 is used to reset the light emitting module 114.
Specifically, the control terminal of the reset module 115 in each pixel sub-circuit is electrically connected to the corresponding scan signal input terminal. FIG. 7 is a timing diagram illustrating the operation of the pixel circuit in the high gray scale display shown in FIG. 6. As shown in fig. 7, VREF is the timing of the reset signal provided at reference signal input VREF. The specific working process is as follows:
in the reset and data write phase t3, the scan signals (including the first scan signal scan1 and the second scan signal scan2) inputted from the scan signal input terminal are at a high level, the reset module 115 is controlled to be turned on, and the reset signal VREF inputted from the reference signal input terminal VREF is written into the first terminal of the light emitting module 114, so that the light emitting module 114 is reset. Meanwhile, the scan signal controls the data voltage to be written into the control terminal of the driving module 113, and the data voltage is maintained through the memory module 112.
In the light-emitting period t4, the second power signal vss is at a low level, and forms a driving current according to the first power signal VDD input from the first power input terminal VDD and the data voltage, so as to drive the light-emitting module 114 to emit light.
With continued reference to fig. 6, the pixel sub-circuit further includes a SENSE control signal input terminal SENSE, a SENSE signal output terminal ISENSE, and a SENSE module 116; the sensing module 116 includes a control terminal, a first terminal and a second terminal; the control end is electrically connected with a sensing control signal input end SENSE, the first end of the sensing module 116 is electrically connected with the first end of the light-emitting module 114, and the second end of the sensing module 116 is electrically connected with a sensing signal output end ISENSE; the sensing module 116 is used for sensing the electric potential of the light emitting module 114.
Specifically, before the light emitting stage, the sensing control signal input terminal SENSE inputs a sensing control signal to control the sensing module 116 to be turned on, and outputs the current of the driving module 113 to the sensing signal output terminal ISENSE, and outputs the current to the external sensing circuit through the sensing signal output terminal ISENSE, and the external sensing circuit compensates the pixel circuit according to the current flowing through the driving module 113.
Exemplarily, fig. 8 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present invention. As shown in fig. 8, the reset module 115 includes a second transistor T2, and the sensing module 116 includes a third transistor T3; the gate of the second transistor T2 is used as the control terminal of the reset module 115, the first pole of the second transistor T2 is used as the first terminal of the reset module 115, and the second pole of the second transistor T2 is used as the second terminal of the reset module 115; the gate of the third transistor T3 is used as the control terminal of the sensing module 116, the first pole of the third transistor T3 is used as the first terminal of the sensing module 116, and the second pole of the third transistor T3 is used as the second terminal of the sensing module 116.
Specifically, in the reset and data write phases, the scan signal input at the scan signal input terminal is at a high level, the second transistor T2 is turned on, and the reset signal vref is transmitted to the anode of the light emitting diode E1 through the second transistor T2 to reset the anode of the light emitting diode E1. In the sensing stage, the sensing control signal SENSE output from the sensing control signal input terminal SENSE is at a high level to control the third transistor T3 to be turned on, the current of the driving transistor Tdr is output to the external sensing circuit through the third transistor T3, and the external sensing circuit adds a compensation signal to the data voltage through data processing, thereby improving the light emitting uniformity of the whole display panel.
The embodiment of the utility model provides a still provide a display panel. Fig. 9 is a display panel according to an embodiment of the present invention. As shown in fig. 9, the display panel includes a pixel circuit 10 according to any embodiment of the present invention.
With continued reference to fig. 9, the display panel further includes a gate driving circuit 20; the pixel circuit 10 includes at least two pixel sub-circuits, the pixel sub-circuits include an input terminal for sensing control signals; the gate driving circuit 20 includes a first output terminal 210 and a second output terminal 220; the first output end 210 is electrically connected to a scan signal input end of the pixel sub-circuit, and the second output end 220 is electrically connected to a sensing control signal input end of the pixel sub-circuit.
Specifically, fig. 10 is a timing diagram of driving the display panel shown in fig. 9 for displaying high gray scale. scan1i is the scan signal output by the gate driving circuit 20 and corresponding to the first row of pixel circuits, scan2i is the scan signal output by the gate driving circuit 20 and corresponding to the second row of pixel circuits, and … … scanni is the scan signal output by the gate driving circuit 20 and corresponding to the nth row of pixel circuits (where i is an integer and is less than or equal to the number of sub-pixels in a pixel circuit). sense is the sensing control signal outputted by the gate driving circuit 20.
In the data writing phase t1i, the scan signal controls the data voltage to be written into the control terminal of the driving module, and the data voltage is maintained by the memory module. Wherein i is an integer of 1, … …, n, which represents the data writing stage of the 1 st, … …, n rows, respectively.
In the light-emitting period t22, the second power signal vss is at a low level, and forms a driving current according to the first power signal vdd input by the first power input terminal and the data voltage, so as to drive the light-emitting module 114 to emit light.
In the above process, the gate driving circuit 20 outputs the scanning signal to control the light emitting diodes in the corresponding pixel circuits to emit light line by line, so as to realize the display of the display panel. In addition, the sensing control signal outputted from the gate driving circuit 20 controls the current of the third transistor sensing driving transistor in each pixel sub-circuit and is outputted to the external sensing circuit through the third transistor, and the external sensing circuit adds a compensation signal to the data voltage through data processing, thereby improving the light emitting uniformity of the whole display panel.
The embodiment of the utility model provides a still provide a display device. Fig. 11 is a display device according to an embodiment of the present invention. As shown in fig. 11, the display device 100 includes a display panel 101 according to any embodiment of the present invention. The display device 100 may be any product with a display function, such as an electronic book, a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.
Claims (10)
1. A pixel circuit comprising at least two pixel sub-circuits; the pixel sub-circuit comprises a first power supply input end, a second power supply input end, a data signal input end, a scanning signal input end, a data voltage writing module, a storage module, a driving module and a light-emitting module;
the data voltage writing module comprises a control end, a first end and a second end; the control end of the data voltage writing module is electrically connected with the scanning signal input end, the first end of the data voltage writing module is electrically connected with the data signal input end, the second end of the data voltage writing module is electrically connected with the control end of the driving module, and the data voltage writing module is used for writing data voltage into the driving module;
the memory module comprises a first end and a second end; the first end of the storage module is electrically connected with the control end of the driving module, the second end of the storage module is electrically connected with the first power supply input end, and the storage module is used for storing the data voltage;
the drive module further comprises a first end and a second end; the first end of the driving module is electrically connected with the first power supply input end, the second end of the driving module is electrically connected with the first end of the light-emitting module, and the driving module is used for outputting a driving signal according to the data voltage;
the light emitting module further comprises a second end, the second end of the light emitting module is electrically connected with the second power input end, and the light emitting module is used for emitting light according to the driving signal.
2. The pixel circuit according to claim 1, wherein the second power signal inputted from the second power input terminal is a pulse width modulation signal.
3. The pixel circuit of claim 1, wherein the pixel sub-circuit further comprises a reference signal input and a reset module;
the reset module comprises a control end, a first end and a second end; the control end of the reset module is electrically connected with the scanning signal input end, the first end of the reset module is electrically connected with the reference signal input end, and the second end of the reset module is electrically connected with the first end of the light-emitting module; the reset module is used for resetting the light emitting module.
4. The pixel circuit of claim 3, wherein the pixel sub-circuit further comprises a sensing control signal input, a sensing signal output, and a sensing module;
the induction module comprises a control end, a first end and a second end; the control end is electrically connected with the induction control signal input end, the first end of the induction module is electrically connected with the first end of the light-emitting module, and the second end of the induction module is electrically connected with the induction signal output end; the sensing module is used for sensing the electric potential of the light emitting module.
5. The pixel circuit according to claim 4, wherein the data voltage writing module comprises a first transistor, the storage module comprises a storage capacitor, the driving module comprises a driving transistor, and the light emitting module comprises a light emitting diode;
a gate of the first transistor is used as a control terminal of the data voltage writing module, a first pole of the first transistor is used as a first terminal of the data voltage writing module, and a second pole of the first transistor is used as a second terminal of the data voltage writing module;
a first pole of the storage capacitor is used as a first end of the storage module, and a second pole of the storage capacitor is used as a second end of the storage module;
the grid electrode of the driving transistor is used as the control end of the driving module, the first pole of the driving transistor is used as the first end of the driving module, and the second pole of the driving transistor is used as the second end of the driving module;
the anode of the light emitting diode is used as the first end of the light emitting module, and the cathode of the light emitting diode is used as the second end of the light emitting module.
6. The pixel circuit of claim 5, wherein the reset module comprises a second transistor and the sensing module comprises a third transistor;
a gate of the second transistor is used as a control end of the reset module, a first pole of the second transistor is used as a first end of the reset module, and a second pole of the second transistor is used as a second end of the reset module;
the grid electrode of the third transistor is used as the control end of the sensing module, the first pole of the third transistor is used as the first end of the sensing module, and the second pole of the third transistor is used as the second end of the sensing module.
7. The pixel circuit of claim 1, wherein the number of pixel sub-circuits is less than or equal to three.
8. A display panel comprising the pixel circuit according to any one of claims 1 to 7.
9. The display panel according to claim 8, further comprising a gate driver circuit;
the pixel circuit comprises at least two pixel sub-circuits, and each pixel sub-circuit comprises an induction control signal input end;
the grid driving circuit comprises a first output end and a second output end; the first output end is electrically connected with the scanning signal input end of the pixel sub-circuit, and the second output end is electrically connected with the induction control signal input end of the pixel sub-circuit.
10. A display device comprising the display panel according to any one of claims 8 to 9.
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| CN201922047035.1U CN210627871U (en) | 2019-11-21 | 2019-11-21 | Pixel circuit, display panel and display device |
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| CN201922047035.1U CN210627871U (en) | 2019-11-21 | 2019-11-21 | Pixel circuit, display panel and display device |
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| CN210627871U true CN210627871U (en) | 2020-05-26 |
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| CN112735343A (en) * | 2021-01-04 | 2021-04-30 | 成都中电熊猫显示科技有限公司 | Light-emitting component dimming control method and device and display device |
| CN112967658A (en) * | 2021-02-26 | 2021-06-15 | 厦门天马微电子有限公司 | Pixel circuit, light-emitting panel and display device |
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