CN111521272A - Application specific integrated circuit and ASIC chip for thermopile sensor - Google Patents
Application specific integrated circuit and ASIC chip for thermopile sensor Download PDFInfo
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- G—PHYSICS
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- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
- G01J5/12—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using thermoelectric elements, e.g. thermocouples
- G01J5/14—Electrical features thereof
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
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- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
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- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/48—Thermography; Techniques using wholly visual means
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Abstract
The invention discloses a special integrated circuit and an ASIC chip for a thermopile sensor, which comprise a plurality of analog switches, a programmable gain amplifier, an analog-to-digital converter, a digital filter, a random access memory, an erasable programmable read-only memory, a state machine and a power management module which are sequentially connected, wherein the analog switches switch a plurality of analog signals between the thermopile sensor and a reference resistor; the programmable gain amplifier conditions and amplifies the analog signal; the digital filter filters high-frequency signal noise; the random access memory stores and exchanges the filtered real-time measurement data; the power management module controls the whole integrated circuit to be in a low power consumption state. The invention supports multi-path thermopile sensor signal input, and has the functions of amplifying and filtering analog signals, storing parameters and self-calibrating. The ASIC chip is made into millimeter level, so that the pin wiring is greatly reduced, and the integration level of the thermopile sensor is improved.
Description
Technical Field
The invention belongs to the technology of a Micro-Electro-Mechanical System (MEMS) sensor, and particularly relates to a special integrated circuit for a thermopile sensor and an ASIC chip.
Background
Currently, the global sensor market is showing a high growth trend, and Micro-Electro-Mechanical systems (Micro-Electro-Mechanical systems) are manufactured by using semiconductor materials and microelectronic processing technology. Micro-electro-mechanical systems are favored for their optical, mechanical, and electrical integration, small size, light weight, and low power consumption. The infrared thermopile temperature sensor is a novel sensor, can perform non-contact temperature measurement, is widely applied to scenes such as environment monitoring, security systems, smart homes, medical treatment, process control and the like, and realizes automatic detection and control of temperature.
The MEMS sensor is an integrated micro device consisting of a micro sensor, a signal processing circuit, a communication interface and the like. Most of the existing infrared thermopile sensors are centimeter-level devices packaged by to (transistor outer package), and then signal conditioning and amplification are realized through peripheral circuits. The external circuits of the thermopile temperature sensors are mostly analog circuits which are independently built, or the single module design comprises an amplifying and conditioning circuit, a filtering design or a power management module and the like; moreover, these solutions are different, or focus on the data signal readout circuit (e.g. 201920740835.9), or on the temperature self-calibration module (e.g. zl201710278540.x), and there are few dedicated integrated circuit chip designs, and they are far from the level of the MEMS device.
Disclosure of Invention
The purpose of the invention is as follows: the first purpose of the invention is to provide a special integrated circuit for a thermopile sensor, which supports multi-path thermopile sensor signal input, amplifies and filters an analog signal, and realizes the functions of parameter storage and self calibration; a second object of the present invention is to provide an ASIC chip for a thermopile sensor, which can be made in millimeter-scale dimensions, greatly reduce pin connections, and improve the level of integration of the thermopile sensor.
The technical scheme is as follows: the invention comprises a multi-channel analog switch MUX, a programmable gain amplifier PGA, an analog-to-digital converter ADC, a digital filter DF, a random access memory RAM, an erasable programmable read-only memory EEPROM, a state machine and a power management module POR which are connected in sequence, wherein the multi-channel analog switch MUX switches multi-channel analog signals between a thermopile sensor and a reference resistor; the programmable gain amplifier PGA is used for conditioning and amplifying analog signals; the analog-to-digital converter ADC is used for converting an analog signal into a digital signal; the digital filter DF is used for filtering the high-frequency signal noise; the random access memory RAM is used for storing and exchanging the filtered real-time measurement data; the EEPROM is used for storing various parameters; the state machine is used for realizing a digital circuit module for internal logic control and operation; and the power management module POR is connected with the ground and is used for controlling the whole integrated circuit to be in a low power consumption state and managing a power supply.
A serial data bus I2C is arranged between the RAM and the EEPROM and is communicated with the outside through a serial data bus I2C, so that the connection and the data communication between the ASIC and an external device are realized.
The multi-channel analog switch MUX is an alternative data selector.
The multi-channel analog switch MUX carries out sampling in turn in the form of a multi-channel common analog-to-digital converter ADC.
The amplification factor range of the programmable gain amplifier PGA is 160-10240 optional gain so as to meet the range coverage of the temperature of the thermopile sensor from microvolts to millivolts.
The resolution range of the analog-to-digital converter ADC is 10-16 bits.
The analog-to-digital converter ADC operates using an integrated approach.
The digital filter DF is a programmable FIR or IIR low-pass filter, and the bandwidth of the input signal is further reduced by adjusting the parameters of the digital filter DF to achieve the desired noise performance and refresh rate.
The state machine is a Moore type finite state machine which is composed of a secondary state combinational logic circuit, a sequential circuit and output logic.
The power supply gating unit controls the power supply of each module to be switched on and off; the special integrated circuit is arranged on the ASIC chip, the special integrated circuit is manufactured by adopting a TMSC28nm process, and the size of the ASIC chip is controlled within 1.0mm multiplied by 1.0 mm; the ASIC chip adopts 8-pin packaging design
Has the advantages that: compared with the prior art, the invention has the beneficial effects that: (1) supporting multi-path thermopile sensor signal input; (2) the device has the functions of amplifying and filtering analog signals, storing parameters, self-calibrating and the like; (3) the size of the ASIC chip can be made into millimeter level, so that the pin wiring is greatly reduced, and the integration level of the thermopile sensor is improved.
Drawings
FIG. 1 is a system block diagram of an application specific integrated circuit for a thermopile sensor in accordance with the present invention;
FIG. 2 is a schematic diagram of a programmable gain amplifier according to the present invention;
FIG. 3 is a schematic diagram of the serial data bus interface and the external communication circuit connection according to the present invention;
FIG. 4 is a block diagram of a Moore type state machine according to the present invention;
FIG. 5 is a block layout diagram of an ASIC chip of the present invention;
FIG. 6 is a pin definition diagram of an ASIC chip of the present invention;
FIG. 7 is a flow chart of the design of an ASIC chip according to the present invention;
FIG. 8 is a process flow diagram of an ASIC according to the present invention.
Detailed Description
The invention is described in further detail below with reference to specific embodiments and the attached drawing figures.
As shown in fig. 1, the asic of the present invention includes a multi-channel analog switch MUX, a programmable gain amplifier PGA, an analog-to-digital converter ADC, a digital filter DF, a random access memory RAM, an erasable programmable read only memory EEPROM, a state machine, and a power management module POR, which are connected in sequence, where the multi-channel analog switch MUX switches multi-channel analog signals between the thermopile sensor and the reference resistor, and in this embodiment, the multi-channel analog switch MUX is an alternative data selector, performs data switching between the thermopile sensor and the reference resistor, and performs sampling in turn in the form of a multi-channel common analog-to-digital converter ADC; the programmable gain amplifier PGA is used for conditioning and amplifying analog signals, in the embodiment, the amplification factor range of the programmable gain amplifier PGA is 160-10240 of selectable gain, so as to meet the range coverage of the temperature of the thermopile sensor from microvolts to millivolts; the analog-to-digital converter ADC is used for converting the analog signal into a digital signal; in this embodiment, the resolution range of the ADC is 10-16 bits, and the ADC operates by an integrated method, such as "charge balance method" or "delta-sigma method"; the digital filter DF is used for filtering high-frequency signal noise, in this embodiment, the digital filter DF is a programmable FIR or IIR low-pass filter, and the bandwidth of the input signal is further reduced by adjusting the parameter of the digital filter DF, so as to achieve the desired noise performance and refresh rate; the state machine is a Moore type finite state machine consisting of a secondary state combinational logic circuit, a sequential circuit and an output logic, and is a digital circuit module for realizing the internal logic control and operation of an ASIC chip; and the power management module POR is connected with the ground and is used for controlling the whole integrated circuit to be in a low power consumption state and managing a power supply.
The random access memory RAM is used for storing and exchanging the filtered real-time measurement data, in the embodiment, the random access memory is a memory with the capacity of 1KB adopting an 8-bit parallel bus, and can meet the real-time access requirement of multi-mode data; a serial data bus I2C is arranged between the RAM and the EEPROM and is communicated with the outside through a serial data bus I2C.
The EEPROM is used for storing various parameters, and in the embodiment, the EEPROM has the capacity of 256KB, so that the requirements of calibration coefficients of the thermopile sensor, filter orders and gain multiple storage of the amplifier can be met; the EEPROM can be internally assigned with addresses, so that a debugging person can adjust and set the parameters through an I2C interface conveniently to realize the precision calibration of the sensor.
The multi-path analog switch MUX rapidly switches the multi-path analog signals of the table received from the thermopile Sensor (IR Sensor) and the reference resistance (TC) module and sends the multi-path analog signals to the programmable gain amplifier PGA to condition and amplify the multi-path analog signals; then, the digital signal is converted into a digital signal through an analog-to-digital converter (ADC), and the high-frequency noise of the signal is filtered through a customizable Digital Filter (DF); then, the data is sent into a random access memory RAM, and communication with the outside is realized through a clock end pin SCL and a data end pin SDA of a serial data bus I2C; the operation in the whole special integrated circuit is controlled by a state machine, and the calculation and the output of temperature measurement data can be realized by a system according to correct logic through calling and controlling parameters of a programmable gain amplifier PGA, a digital filter DF and an erasable programmable read-only memory EEPROM; these parameters stored in the EEPROM are also connected to the serial data bus I2C module, allowing the user to access and adjust the parameters to achieve accurate calibration of the temperature measurement data.
As shown in FIG. 2, in the hardware circuit design of the programmable gain amplifier PGA, in order to achieve the selectable gain in the range of 160 ~ 10240, and thus satisfy the weak current signal of the sensor to achieve the amplification from microvolts to millivolts, the PGA circuit design case of the target gain effect can be achieved by combining a plurality of amplifiers, wherein GA1 and GA2 are low voltage, differential input, differential output, chopper drift compensation programmable gain amplifiers, which serve as input amplifier stages, and drive one instrumentation amplifier INA114 with higher voltage as an output stage. Amplifiers of optional GA1 and GA2, such as Cirrus LogicCS3301, can provide 7 programmable gains in the range of 1-64, while INA114 provides fixed gain 160, and the combination achieves gains of 160-10240; if other gain values are selected, this can be accomplished by changing the value of the gain setting resistor of INA 114. The whole PGA module can provide 5mV typical offset voltage, 20 nV/DEG C offset drift, and 9nV equivalent input noise voltage at 0.1 Hz.
As shown in fig. 3, in order to meet the communication requirement between the ASCI chip and the outside, a serial data bus I2C powered by 3.3V is connected by two bidirectional open-drain lines in cooperation with pull-up resistors R1 and R2, and only two lines are needed to support one master-multiple slave or multiple master connection; meanwhile, addresses are distributed in the EEPROM, and the incremental addressing allows the serial data bus I2C to access relevant address blocks, thereby facilitating the functions of the serial data bus I2C, such as reading/writing access of commands to the internal memory and the register, and the like. Communication with the ASCI chip may be accomplished in a fast mode by serial data bus I2C, which requires operating frequencies up to 1 MHz. The user/debugger can access the control registers of the internal state machine through a unit external to serial data bus I2C to obtain the measurement data for the pyroelectric sensor and the reference resistance.
As shown in fig. 4, the output of the selected Moore type finite state machine is only related to the current state, but not to the input at this time, and the input only determines the state change of the state machine, and does not affect the final output of the circuit. The first part of the Moore type State machine is a combinational logic circuit, which decides the Next State (Next logic) by feeding back the State output (State) to the combinational logic circuit, together with the Input signal (Input); the second part is a sequential circuit, which triggers the circuit by using a clock pulse (CLK) as a control signal and changes the output State according to the input signal in order to send the value of the next State to the current State (Present State); the third part is Output logic, and the Output (Output) is obtained by judging the current state. The final output signal is directly obtained by decoding the state register, and the state machine circuit is designed in a hardware programmable mode.
The FIR digital filter adopted by the invention can filter the high-frequency noise measured by most thermopile sensors, and the design formula of the filter is
Wherein a (k) representsThe FIR filter, x (N) and y (N) are respectively expressed as input and output time sequence signals, N is the point number of time sequence data, k is the kth sequence point, and N is the order number of the filter, and simulation tests show that a 40-order FIR filter can basically meet the data processing requirements of most of the schemes of the invention on the thermopile sensor.
As shown in fig. 2 and 3, the present invention further includes an ASIC chip for a thermopile sensor, the ASIC chip including a Power Gating Cell (Power Gating Cell) that controls Power on and off of each module; the special integrated circuit is arranged on the ASIC chip, the special integrated circuit is manufactured by adopting a TMSC28nm process, and the size of the ASIC chip is controlled within 1.0mm multiplied by 1.0 mm; the working voltage of the ASIC chip is 3.3V, the integral static power consumption is less than 100 mu a, and the working temperature is minus 45 ℃ to 125 ℃; the ASIC chip adopts an 8-pin package design, and main pins are defined as follows: the thermopile sensor connection pin IR, the reference resistor pin TC, the power pin VDD, the ground pin GND, the data terminal pin SDA of the I2C bus, the clock terminal pin SCL of the I2C bus, and the low address terminal pin ADDR of the I2C bus.
As shown in fig. 7, the ASCI chip employs a Top-Down (Top-Down) chip design process: the functional module division defines an initial architecture of an ASIC chip design, the function of a circuit is described into RTL codes by using HDL (Verilog HDL or VHDL) in the logic design, and after the logic design is completed, whether the logic design meets the design requirements or not is verified through two forms of FPGA prototype and software simulation so as to carry out logic verification. In the FPGA prototype verification, an RTL code is burned into an FPGA, a test program is developed according to the function and time sequence definition of an ASIC chip of the thermopile infrared sensor, and the verification of the RTL code is completed; in the software simulation, a Modelsim and NC-Verilog simulation tool is adopted, and simulation is carried out according to the function and time sequence definition development test vector (Testbench) of an ASIC chip to complete RTL code verification; the physical implementation is that after the logic verification of all design functions is completed, RTL codes irrelevant to the process are mapped to a specific process library to form layout data for wafer delivery production.
As shown in fig. 8, an example of a process flow for an ASIC chip of the present invention is given: firstly, in the preparation of a WAFER, a single crystal silicon rod with a stretched quartz rod is sliced to form a WAFER; polishing each piece of WAFER into a mirror surface, then placing the WAFER in an oxidation furnace at 900-1100 ℃, and introducing pure oxygen to form silicon oxide on the surface of the WAFER; then, uniformly coating a layer of photoresist on the WAFER surface by a rotary centrifugal force in the photoresist coating exposure, and forming a pattern on the WAFER surface by an optical mask plate and an exposure technology; then removing the corresponding oxide layer by using acid liquor or alkali liquor; injecting ions (phosphorus and boron) into the WAFER, then performing high-temperature diffusion to form various integrated devices, and then grinding the surface of the WAFER; cutting the ASIC chip from the WAFER to form a DIE (one-chip DIE); detecting the electrical characteristics and reliability to remove unqualified chips; finally, the contacts on the chip are connected to the pins of the package housing by wires, and the chip is packaged by using ceramic or resin as the package housing, wherein the final size of the chip is about 1mm × 1mm, and the chip module layout and the related pin definitions are given in fig. 5 and 6.
Claims (10)
1. An application specific integrated circuit for a thermopile sensor, comprising: the multi-channel analog switch device comprises a multi-channel analog switch MUX, a programmable gain amplifier PGA, an analog-to-digital converter ADC, a digital filter DF, a random access memory RAM, an erasable programmable read-only memory EEPROM, a state machine and a power management module POR which are sequentially connected, wherein the multi-channel analog switch MUX switches multi-channel analog signals between a thermopile sensor and a reference resistor; the programmable gain amplifier PGA is used for conditioning and amplifying analog signals; the analog-to-digital converter ADC is used for converting an analog signal into a digital signal; the digital filter DF is used for filtering the high-frequency signal noise; the random access memory RAM is used for storing and exchanging the filtered real-time measurement data; the EEPROM is used for storing various parameters; the state machine is used for realizing a digital circuit module for internal logic control and operation; and the power management module POR is connected with the ground and is used for controlling the whole integrated circuit to be in a low power consumption state and managing a power supply.
2. The application specific integrated circuit for a thermopile sensor of claim 1, wherein: a serial data bus I2C is arranged between the RAM and the EEPROM and is communicated with the outside through a serial data bus I2C.
3. The application specific integrated circuit for a thermopile sensor of claim 1, wherein: the multi-channel analog switch MUX is an alternative data selector.
4. The application specific integrated circuit for a thermopile sensor of claim 3, wherein: the multi-channel analog switch MUX carries out sampling in turn in the form of a multi-channel common analog-to-digital converter ADC.
5. The application specific integrated circuit for a thermopile sensor of claim 1, wherein: the amplification factor range of the programmable gain amplifier PGA is 160-10240 of selectable gain.
6. The application specific integrated circuit for a thermopile sensor of claim 1, wherein: the resolution range of the analog-to-digital converter ADC is 10-16 bits.
7. The application specific integrated circuit for a thermopile sensor of claim 6, wherein: the analog-to-digital converter ADC operates using an integrated approach.
8. The application specific integrated circuit for a thermopile sensor of claim 1, wherein: the digital filter DF is a programmable FIR or IIR low-pass filter, and the bandwidth of the input signal is further reduced by adjusting the parameters of the digital filter DF.
9. The application specific integrated circuit for a thermopile sensor of claim 1, wherein: the state machine is a Moore type finite state machine which is composed of a secondary state combinational logic circuit, a sequential circuit and output logic.
10. An ASIC chip using the application specific integrated circuit of any of claims 1 to 9, wherein: the power supply gating unit controls the power supply of each module to be switched on and off; the special integrated circuit is arranged on the ASIC chip, the special integrated circuit is manufactured by adopting a TMSC28nm process, and the size of the ASIC chip is controlled within 1.0mm multiplied by 1.0 mm; the ASIC chip is designed by adopting 8-pin packaging.
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