CN105137855A - Realization method for synchronously reading capacitance sensors by multiple board cards - Google Patents
Realization method for synchronously reading capacitance sensors by multiple board cards Download PDFInfo
- Publication number
- CN105137855A CN105137855A CN201510454666.9A CN201510454666A CN105137855A CN 105137855 A CN105137855 A CN 105137855A CN 201510454666 A CN201510454666 A CN 201510454666A CN 105137855 A CN105137855 A CN 105137855A
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- Prior art keywords
- motion control
- module
- control card
- data
- capacitive transducer
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0421—Multiprocessor system
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/12—Plc mp multi processor system
- G05B2219/1208—Communication, exchange of control, I-O data between different plc
Abstract
The invention discloses a realization method for synchronously reading capacitance sensors by multiple board cards, which belongs to the technical field of signal acquisition and data communication in a high-precision motion control system and aims at solving the problem that synchronization can not be ensured and a micropositioner thus has poor control precision when multiple paths of capacitor data are read in the prior art. The method comprises the following steps: 1, when a motion control card receives a rising edge of a synchronous trigger signal, three capacitance sensors send currently-measured data to board cards, the data arrive at pins of an FPGA module via a serial port level conversion circuit and are stored in a two-port RAM, and after data receiving is completed, a receiving completion signal is outputted; and 2, the generated receiving completion signal triggers a DSP module to be interrupted externally, the data stored in the two-port RAM are read to the DSP module in a DSP module interruption program, and the process of reading signals of the multiple paths of capacitance sensors synchronously is completed.
Description
Technical field
The present invention relates to the implementation method that many boards synchronously read capacitive transducer, belong to signals collecting and the data communication technology field of high-precise motion control system.
Background technology
Nowadays electronic equipment has entered into huge numbers of families, and more and more trend towards miniaturization, microminiaturization, this just require manufacture electronic chip machine---litho machine reaches higher precision, nano-precision has become the common standards that development litho machine needs to reach, reach so high control accuracy, the sensor of superhigh precision and the control algolithm of better effects if essential, meanwhile, the synchronism of whole system image data and real-time also seem particularly important.Such as carry the mask stage micropositioner of silicon chip, it carries out the motion of nano-precision together by carry silicon chip, make photoetching be formed on silicon chip, finally obtain qualified chip, and its motion control index directly affects the quality of chip.
Because this micropositioner is a motion stage body having six degree of freedom, at least need six road sensing datas could obtain position and the attitude of whole stage body, and what obtain must be the measured value of synchronization all the sensors, the information such as the position and speed of this moment micropositioner could be determined, to reduce the actual motion situation of testee, therefore the synchronism of data must be protected.And prior art reading Multi-path electricity container data cannot ensure its synchronism, cause control accuracy poor.
Summary of the invention
The present invention seeks to cannot ensure its synchronism to solve prior art reading Multi-path electricity container data, causing the problem of micropositioner control accuracy difference, providing the implementation method that a kind of many boards synchronously read capacitive transducer.
Many boards of the present invention synchronously read the implementation method of capacitive transducer, the reading device that the method relates to is: in VME bus, mounting is synchronous triggers card and n block motion control card, synchronous triggering cartoon is crossed VME bus and is sent synchronous triggering signal to n block motion control card, and every block motion control card gathers the signal of three capacitive transducers simultaneously and stores; Synchronous triggering card is identical with the structure of motion control card;
Motion control card is using DSP module as algorithm processing module, with the signal processing module that FPGA module is main, CPLD chip is level switch module, and based on RS422 serial communication protocol, be provided with three serial ports and serial port level chance-over circuit, and in FPGA, devise the signal processing module of serial ports transmitting-receiving and the dual port RAM for storing data, DSP module is communicated with FPGA module by the exterior storage expansion interface EMIF interface carried, motion control card is also provided with VME interface, make to carry out data interaction by VME bus between n block motion control card,
Capacitive transducer carries out data transmission by serial ports and motion control card;
The method comprises the following steps:
Step one: n block motion control card receives the synchronous synchronous triggering signal triggering card; When motion control card receives the rising edge of synchronous triggering signal, three capacitive transducers sending the control of this board of command triggers send the data working as pre-test to board, arrive on FPGA module pin through serial port level chance-over circuit, then data are stored in dual port RAM by byte reception by inner signal processing module by FPGA module, and export receipt completion signal after reception data complete;
Step 2: the receipt completion signal of generation is connected with DSP module external interrupt pin, this receipt completion signal rising edge can trigger DSP module external interrupt, by the digital independent that is stored in dual port RAM in DSP module, the synchronous process reading multichannel electric capacity sensor signal can be completed in DSP module interrupt routine.
Advantage of the present invention: the digital independent that the inventive method is applied to the mask stage micropositioner of carrying silicon chip controls, this micropositioner is a motion stage body having six degree of freedom, two pieces of motion control cards (n=2) and six capacitive transducers are set in the inventive method, because the motion control card used in the present invention can only read 3 road rs 232 serial interface signals, and micropositioner will return altogether 6 tunnel positional informations, so 2 pieces of boards at least will be adopted could to obtain complete positional information, the problem of the synchronism of this many cards reading discussed before just having related to, notice that in the present invention, motion control card obtains capacitive transducer data by sending trigger pip, as long as so accomplish synchronously to trigger, the present invention is provided with an external sync trigger pip, the clock of this synchronous triggering signal actual employing 5kHz, produced by the phaselocked loop in FPGA by one piece of independent board, passed on the motion control card of two pieces of reception capacitive transducer data by VME bus, this outside synchronous triggering signal of motion control card carries out triggering reading to capacitive transducer, just can ensure the synchronism of two pieces of motion control card readings.
Accompanying drawing explanation
Fig. 1 is the general principles figure that many boards of the present invention synchronously read the implementation method of capacitive transducer;
Fig. 2 is the theory diagram that every block motion control card reads data;
Fig. 3 is the working timing figure synchronously reading capacitive transducer data;
Fig. 4 is the physical circuit figure of serial port level chance-over circuit in motion control card;
Fig. 5 is the physical circuit figure of serial ports.
Embodiment
Embodiment one: present embodiment is described below in conjunction with Fig. 1 to Fig. 5, described in present embodiment, many boards synchronously read the implementation method of capacitive transducer, the reading device that the method relates to is: in VME bus 2, mounting is synchronous triggers card 3 and n block motion control card 1, synchronous triggering card 3 sends synchronous triggering signal by VME bus 2 to n block motion control card 1, and every block motion control card 1 gathers the signal of three capacitive transducers 4 simultaneously and stores; Synchronous triggering card 3 is identical with the structure of motion control card 1;
Motion control card 1 is using DSP module 1-1 as algorithm processing module, with the signal processing module that FPGA module 1-2 is main, CPLD chip 1-3 is level switch module, and based on RS422 serial communication protocol, be provided with three serial ports 1-7 and serial port level chance-over circuit 1-6, and in FPGA, devise the signal processing module of serial ports transmitting-receiving and the dual port RAM for storing data, DSP module 1-1 is communicated with FPGA module 1-2 by the exterior storage expansion interface EMIF interface 1-5 carried, motion control card 1 is also provided with VME interface 1-4, make to carry out data interaction by VME bus 2 between n block motion control card 1,
Capacitive transducer 4 carries out data transmission by serial ports 1-7 and motion control card 1;
The method comprises the following steps:
Step one: n block motion control card 1 receives the synchronous synchronous triggering signal triggering card 3; When motion control card 1 receives the rising edge of synchronous triggering signal, three capacitive transducers 4 sending the control of this board of command triggers send the data working as pre-test to board, arrive on FPGA module 1-2 pin through serial port level chance-over circuit 1-6, then data are stored in dual port RAM by byte reception by inner signal processing module by FPGA module 1-2, and export receipt completion signal after reception data complete;
Step 2: the receipt completion signal of generation is connected with DSP module 1-1 external interrupt pin, this receipt completion signal rising edge can trigger DSP module 1-1 external interrupt, by the digital independent that is stored in dual port RAM in DSP module 1-1, the synchronous process reading multichannel capacitive transducer 4 signal can be completed in DSP module 1-1 interrupt routine.
Synchronous triggering card 3 generates 5kHz clock by the phase-locked loop module of FPGA inside, is exported, hang in VME bus 2 by the F2E14 pin in VME bus 2.
In the FPGA module 1-2 and CPLD chip 1-3 of every block motion control card 1, F2E14 pin is connected on the RS422TX4 pin on serial port level chance-over circuit 1-6 through level conversion, then exported by CLKP and the CLKN differential clocks pin of three road serial ports 1-7, receive on capacitive transducer 4 and send data for triggering capacitive transducer 4.
Serial port level chance-over circuit 1-6 adopts SP3490 chip to realize.
DSP module 1-1 employing model is that the dsp chip of TMS320C6414 realizes.
FPGA module 1-2 employing model is that the fpga chip of EP2S60F102014N realizes.
The digital independent that this implementation method is applied to the mask stage micropositioner of carrying silicon chip controls, this micropositioner is a motion stage body having six degree of freedom, at least need six road sensing datas could obtain position and the attitude of whole stage body, two pieces of motion control cards and six capacitive transducers are set in present embodiment
Software comprises based on the software CCStudio of DSP exploitation and the software QuartusII based on FPGA exploitation.
VME cabinet provides the cabinet of the 21 groove backboards being suitable for 6UVME card, can hold the board grafting that 21 pieces have VME interface, and the VME pin corresponding to each groove wherein except first is interconnected, for the intercommunication mutually of VME bus between each card;
Capacitive transducer 4 is used for measuring displacement, and because two pieces of charged parallel metal sheets form the plate condenser that a capacitance can survey, the computing formula of this capacitance is:
C=ε*ε0*S/d
Electric capacity C, unit F;
ε relative dielectric constant;
ε 0 permittivity of vacuum 8.86 × 10
-12, unit F/m;
Area S, unit square rice;
Polar plate spacing d, unit rice;
Distance change between two pieces of sheet metals, keep its dependent variable constant and known, we just can calculate the distance between sheet metal, the metal probe carried by capacitive transducer during actual use is fixed, and it is parallel with the metal covering of motion, so just can obtain the displacement of motion metal covering, capacitive transducer utilizes this principle to carry out displacement measurement just.
The process that monolithic motion control card reads capacitive transducer measurement data is as follows:
When the trigger pip sent by the serial ports 1-7 of motion control card 1 received by capacitive transducer 4, the current displacement signal recorded can be passed to serial ports 1-7, FPGA module 1-2 is entered after the level conversion of serial port level chance-over circuit 1-6, resolved by the signal processing module of the serial ports of indoor design and be stored in dual port RAM, and after signal processing module completes reception data, can trigger the external interrupt of DSP module 1-1, now DSP module 1-1 can read the positional information that just stored for control algolithm from dual port RAM.
The operating process of specific embodiment is as follows:
Steps A: will synchronously trigger card 3 and two motion control cards 1 are inserted in VME cabinet, the series transmission lines of Bing Jiang No. six capacitive transducer 4 is connected with the serial ports 1-7 of two motion control cards 1;
Step B: by program burn writing corresponding for three pieces of boards in DSP module 1-1, FPGA module 1-2 and CPLD chip 1-3, open cabinet and probe power, the program of board inside will be run, and detailed process is as described in step below;
Step C: the synchronous card 3 that triggers generates 5kHz clock by the phase-locked loop module of FPGA inside, is exported, hang in VME bus 2 by the F2E14 pin in VME bus 2;
Step D: in the FPGA module 1-2 and CPLD module 1-3 of two motion control cards, F2E14 pin is connected on the RS422TX4 pin on Fig. 4 through level conversion, then exported by CLKP and the CLKN differential clocks pin of three road serial ports 1-7, receive on capacitive transducer 4 and send data for triggering capacitive transducer 4;
Step e: as shown in Figure 3, when the rising edge of synchronous triggering signal arrives, the data working as pre-test be sent to board by triggering capacitive transducer 4, arrive on FPGA module 1-2 pin through serial port level chance-over circuit 1-6, then data are stored in dual port RAM by byte reception by the signal processing module of indoor design by FPGA module 1-2, and export settling signal after reception data complete;
Step F: the receipt completion signal of generation is connected with DSP module 1-1 external interrupt pin, rising edge can trigger DSP module 1-1 external interrupt, can by the digital independent that is stored in dual port RAM in DSP module 1-1 in DSP module 1-1 interrupt routine, in follow-up control algolithm.
Claims (6)
1. board more than synchronously reads the implementation method of capacitive transducer, it is characterized in that, the reading device that the method relates to is: synchronously trigger card (3) and n block motion control card (1) in the upper mounting of VME bus (2), synchronous triggering card (3) sends synchronous triggering signal by VME bus (2) to n block motion control card (1), and every block motion control card (1) gathers the signal of three capacitive transducers (4) simultaneously and stores; Synchronous triggering card (3) is identical with the structure of motion control card (1);
Motion control card (1) is using DSP module (1-1) as algorithm processing module, with FPGA module (1-2) for main signal processing module, CPLD chip (1-3) is level switch module, and based on RS422 serial communication protocol, be provided with three serial ports (1-7) and serial port level chance-over circuit (1-6), and in FPGA, devise the signal processing module of serial ports transmitting-receiving and the dual port RAM for storing data, DSP module (1-1) is communicated with FPGA module (1-2) by exterior storage expansion interface EMIF interface (1-5) carried, motion control card (1) is also provided with VME interface (1-4), make to carry out data interaction by VME bus (2) between n block motion control card (1),
Capacitive transducer (4) carries out data transmission by serial ports (1-7) and motion control card (1);
The method comprises the following steps:
Step one: n block motion control card (1) receives the synchronous triggering signal synchronously triggering card (3); When motion control card (1) receives the rising edge of synchronous triggering signal, three capacitive transducers (4) sending the control of this board of command triggers send the data working as pre-test to board, arrive on FPGA module (1-2) pin through serial port level chance-over circuit (1-6), then data are stored in dual port RAM by byte reception by inner signal processing module by FPGA module (1-2), and export receipt completion signal after reception data complete;
Step 2: the receipt completion signal of generation is connected with an external interrupt pin of DSP module (1-1), this receipt completion signal rising edge can trigger DSP module (1-1) external interrupt, by the digital independent that is stored in dual port RAM in DSP module (1-1), the process of synchronous reading multichannel capacitive transducer (4) signal can be completed in DSP module (1-1) interrupt routine.
2. many boards synchronously read the implementation method of capacitive transducer according to claim 1, it is characterized in that, the synchronous card (3) that triggers generates 5kHz clock by the phase-locked loop module of FPGA inside, exported by the F2E14 pin in VME bus (2), hang in VME bus (2).
3. many boards synchronously read the implementation method of capacitive transducer according to claim 1, it is characterized in that, in the FPGA module (1-2) and CPLD chip (1-3) of every block motion control card (1), F2E14 pin is connected on the RS422TX4 pin on serial port level chance-over circuit (1-6) through level conversion, then exported by CLKP and the CLKN differential clocks pin of three road serial ports (1-7), receive on capacitive transducer (4) and send data for triggering capacitive transducer (4).
4. many boards synchronously read the implementation method of capacitive transducer according to claim 3, it is characterized in that, serial port level chance-over circuit (1-6) adopts SP3490 chip to realize.
5. many boards synchronously read the implementation method of capacitive transducer according to claim 1, it is characterized in that, DSP module (1-1) adopts model to be that the dsp chip of TMS320C6414 realizes.
6. many boards synchronously read the implementation method of capacitive transducer according to claim 1, it is characterized in that, FPGA module (1-2) adopts model to be that the fpga chip of EP2S60F102014N realizes.
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Cited By (3)
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CN108595357A (en) * | 2018-05-10 | 2018-09-28 | 西安电子科技大学 | DM365 data transmission interface circuits based on FPGA |
CN112310995A (en) * | 2019-07-23 | 2021-02-02 | 许继集团有限公司 | Sampling delay control device and converter resonance suppression control system |
CN113983924A (en) * | 2021-10-27 | 2022-01-28 | 北京航天巨恒系统集成技术有限公司 | Coordinate calculation system, method and device of multi-axis laser interferometer |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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Application publication date: 20151209 |