CN111510150A - A Novel Sigma-Delta Modulator - Google Patents

Abstract

The invention discloses a novel Sigma-Delta modulator, comprising: an integrator, a quantizer, a selector and a feedback digital-to-analog converter; the analog-to-digital conversion working mode or Digital-to-analog conversion working mode, the Sigma-Delta modulator in the present invention can be applied to the transmitter and receiver, select the analog-to-digital conversion working mode at the receiver end, select the digital-to-analog conversion working mode at the transmitter end, through the Sigma-Delta The multiplexing of digital-to-analog converters in the delta modulator can save chip area and reduce power consumption.

Description

A Novel Sigma-Delta Modulator

technical field

The invention relates to the technical field of communication, in particular to a novel Sigma-Delta modulator.

Background technique

In 2G/3G/4G/5G, or WiFi and other communication systems, the sigma-delta modulator is usually used in the receiver RX for analog-to-digital conversion, and the current steering digital-to-analog converter is used in the transmitter TX for digital-to-analog conversion. convert. As shown in Figure 1, it includes: Antenna ANT (Antenna), Low Noise Amplifier LNA (Low Noise Amplifier), Mixer MIXER, Low Pass Filter LPF (Low Pass Filter), Programmable Gain Amplifier PGA (Programmable Gain Amplifier) .

Since the transmitter TX and the receiver RX belong to two relatively independent paths, in a common design, the digital-to-analog converter DAC in the transmitter TX and the analog-to-digital converter ADC in the receiver RX are generally designed separately. However, in a half-duplex communication system such as WiFi, the digital-to-analog converter DAC and the analog-to-digital converter ADC do not work at the same time, and most of the analog-to-digital converter ADCs use sigma-delta modulators. Figure 2 shows the existing The structure diagram of the first-order single-loop N-bit sigma delta modulator in the technology. It can be seen in Figure 2 that the digital-to-analog converter DAC is included in the traditional sigma-delta modulator.

SUMMARY OF THE INVENTION

In view of this, the present invention provides a new type of Sigma-Delta modulator, which has an analog-to-digital conversion working mode and a digital-to-analog conversion working mode, which can be applied to the transmitter TX and the receiver RX, and selects the analog-digital at the receiver RX end. To convert the working mode, select the digital-to-analog conversion working mode at the TX end of the transmitter. Through the multiplexing of the digital-to-analog converter in the Sigma-Delta modulator, the chip area can be saved and power consumption can be reduced.

The new Sigma-Delta modulator includes: an integrator, a quantizer, a selector, and a feedback digital-to-analog converter;

The input end of the integrator is connected to the first input signal line port, and the output end of the integrator is connected to the input end of the quantizer; the first input end of the selector is connected to the output end of the quantizer, the second input end is connected to the second input signal line port, and the selection The output end of the feedback digital-to-analog converter is connected to the input end of the feedback digital-to-analog converter; the output end of the feedback digital-to-analog converter is connected to the input end of the operational amplifier of the integrator;

The integrator includes a first switch S1 connected to the first resistor R1 and the positive input end of the operational amplifier, a second switch S2, a third switch S3, and a fourth switch S4 connected to the second resistor R2 and the negative input end of the operational amplifier , the first feedback resistor R3 and the second feedback resistor R4; the third switch S3 is connected in series with the first feedback resistor R3 and then connected in parallel with the first feedback capacitor C1; the fourth switch S4 is connected in series with the second feedback resistor R4 and then connected with the second feedback capacitor C2 in parallel;

The first switch S1 and the second switch S2 are used to control the on-off between the integrator and the first input signal;

The first switch S1 and the second switch S2 are closed, the third switch S3 and the fourth switch S4 are open, the control terminal of the selector selects the first input terminal, and the Sigma-Delta modulator works in the analog-to-digital conversion working mode;

The first switch S1 and the second switch S2 are open, the third switch S3 and the fourth switch S4 are closed, the control terminal of the selector selects the second input terminal, and the Sigma-Delta modulator works in the digital-to-analog conversion mode.

Wherein, the first input signal is an analog differential input signal in an analog-to-digital conversion working mode;

The second input signal is an input digital signal in a digital-to-analog conversion working mode.

further,

The positive input end of the operational amplifier of the integrator is connected to the first input signal line port through the first resistor R1 connected in series with the first switch S1, and the negative input end is connected to the first input signal line port through the second resistor R2 connected in series with the second switch S2;

The input end of the operational amplifier is connected with the output end of the feedback digital-to-analog converter;

The output end of the operational amplifier is connected to the input end of the quantizer, and the analog differential voltage signal output by the integrator is configured to the quantizer.

The quantizer is configured to perform quantization processing on the analog differential voltage signal output by the integrator, output an N-bit digital signal, and configure the N-bit digital signal to the selector;

The selector is configured to selectively input the N-bit digital signal output by the quantizer or the second input signal to the input end of the feedback digital-to-analog converter;

The feedback digital-to-analog converter is configured to perform digital-to-analog conversion on the N-bit digital signal input by the selector or the second input signal, and feed back the output analog signal to the integrator.

The integrator, configured as:

In the analog-to-digital conversion working mode, the first input signal is input to the operational amplifier through the first switch S1, the second switch S2, the first resistor R1, and the second resistor R2. The operational amplifier, the first feedback capacitor C1, and the second feedback capacitor C2 Integrate the first input signal according to the feedback analog signal output by the feedback digital-to-analog converter;

In the digital-to-analog conversion working mode, the first feedback resistor R3 and the second feedback resistor R4 are connected to the input and output ends of the operational amplifier; the first feedback resistor R3, the second feedback resistor R4, the first feedback capacitor C1, the second The feedback capacitor C2 and the operational amplifier form an integrator, which integrates the output signal of the feedback digital-to-analog converter.

When the quantizer is in the digital-to-analog conversion working mode, the sampling switch of the quantizer is turned off, and the quantizer does not work.

In the analog-to-digital conversion working mode: the integrator integrates the first input signal, the quantizer quantizes the output signal of the integrator, and outputs an N-bit digital signal; the selector selects to input the N-bit digital signal output by the quantizer To the input end of the feedback digital-to-analog converter, the feedback digital-to-analog converter performs digital-to-analog conversion on the N-bit digital signal input by the selector, and feeds back the output analog signal to the integrator; the output signal of the Sigma-Delta modulator is the quantizer The output N-bit digital signal;

In the digital-to-analog conversion working mode: the sampling switch of the quantizer is turned off, and the quantizer does not work; the selector selects the second input terminal through the control terminal, and inputs the second input signal to the input terminal of the feedback digital-to-analog converter, and the feedback digital-to-analog converter The converter performs digital-to-analog conversion on the second input signal input by the selector, and inputs the output analog signal to the integrator; the integrator integrates the analog signal output by the feedback digital-to-analog converter and outputs an analog differential voltage signal, so The analog differential voltage signal is the output signal of the Sigma-Delta modulator.

The beneficial effects obtained by the present invention are:

1. Easy to implement, the new Sigma-Delta modulator proposed by the present invention can be implemented only by adding four switches and one selector on the basis of the traditional Sigma-Delta modulator;

2. Through the new Sigma-Delta modulator proposed in the present invention, the multiplexing of the digital-to-analog conversion module DAC included in the traditional Sigma-Delta modulator is realized, which can save chip area and reduce power consumption;

3. The new Sigma-Delta modulator proposed in the present invention can be applied to the transmitter and the receiver at the same time. By switching different working modes, the digital-to-analog conversion in the transmitter and the analog-to-digital conversion in the receiver can be realized in the communication system. convert;

4. The asynchronous SAR ADC is used for the quantizer in the present invention, which can greatly save power consumption and area, and can easily realize migration between different processes.

For the above and related purposes, one or more embodiments comprise the features hereinafter described in detail and particularly pointed out in the claims. The following description and accompanying drawings illustrate certain exemplary aspects in detail and are indicative of but a few of the various ways in which the principles of various embodiments may be employed. Other benefits and novel features will become apparent from the following detailed description considered in conjunction with the accompanying drawings, and the disclosed embodiments are intended to include all such aspects and their equivalents.

Description of drawings

1 is a schematic diagram of the structure of a transmitter and a receiver in the prior art;

Fig. 2 is a structure diagram of a traditional first-order single-loop N-bit Sigma-Delta modulator in the prior art;

3 is a structural diagram of a novel Sigma-Delta modulator provided by the present invention;

Fig. 4 is a 10-bit asynchronous SAR ADC internal structure diagram of a quantizer provided by the present invention;

5 is a schematic structural diagram of a continuous-time analog-to-digital conversion working mode provided by the present invention;

6 is a schematic structural diagram of a digital-to-analog conversion working mode provided by the present invention;

FIG. 7 is an array diagram of the adjustable capacitors C1 and C2 in the present invention.

Detailed ways

The following description and drawings sufficiently illustrate specific embodiments of the invention to enable those skilled in the art to practice them. Other embodiments may include structural, logical, electrical, process, and other changes. The examples represent only possible variations. Unless explicitly required, individual components and functions are optional and the order of operations may vary. Portions and features of some embodiments may be included in or substituted for those of other embodiments. The scope of embodiments of the invention includes the full scope of the claims, along with all available equivalents of the claims. These embodiments of the invention may be referred to herein by the term "invention," individually or collectively, for convenience only and not to automatically limit the application if more than one invention is in fact disclosed. The scope is any single invention or inventive concept.

The invention provides a new type of Sigma-Delta modulator, which has an analog-to-digital conversion working mode and a digital-to-analog conversion working mode. By switching different working modes, the digital-to-analog conversion in the transmitter and the digital-to-analog conversion in the receiver in the communication system can be realized. The analog-to-digital conversion, shown in Figure 3, consists of:

Wherein, the analog-to-digital conversion working mode in the present invention is a continuous-time analog-to-digital conversion working mode;

Integrator U1, quantizer U2, selector U3 and feedback digital-to-analog converter U4;

The input end of the integrator U1 is connected to the first input signal line port, and the output end is connected to the input end of the quantizer U2; the output end of the quantizer U2 is connected to the input end of the selector U3; the first input end of the selector U3 is connected to the output end of the quantizer, The second input terminal is connected to the second input signal line port, and the output terminal is connected to the input terminal of the feedback digital-to-analog converter U4; the output terminal of the feedback digital-to-analog converter U4 is connected to the input terminal of the operational amplifier of the integrator U1;

Specifically, the integrator U1 includes: a first switch S1, a second switch S2, a first resistor R1, a second resistor R2, a third switch S3, a fourth switch S4, a first feedback resistor R3, a second feedback resistor R4 and operational amplifier AMP;

Wherein, the first switch S1 is connected to the first resistor R1 and the positive input terminal of the operational amplifier, and the second switch is connected to the second resistor R2 and the negative input terminal of the operational amplifier;

The third switch S3 is connected in series with the first feedback resistor R3 and then connected in parallel with the first feedback capacitor C1; the fourth switch S4 is connected in series with the second feedback resistor R4 and connected in parallel with the second feedback capacitor C2;

The first adjustable capacitor C1 and the second adjustable capacitor C2 are used to adjust the signal bandwidth of the integrator;

The positive input terminal of the operational amplifier is connected to the first input signal line port through a first resistor R1 connected in series with the first switch S1, and the negative input terminal is connected to the first input signal line port through a second resistor R2 connected in series with the second switch S2.

The positive output end of the integrator U1 is connected to the positive input end of the quantizer U2, and the negative output end of the integrator U1 is connected to the negative input end of the quantizer U2; the positive output end of the feedback digital-to-analog converter U4 is connected to the negative input end of the operational amplifier; the feedback The negative output terminal of the digital-to-analog converter U4 is connected to the positive input terminal of the operational amplifier;

The first input signal is an analog differential input signal in a continuous-time analog-to-digital conversion working mode;

The second input signal is an input digital signal in a digital-to-analog conversion working mode.

The quantizer U2 is configured to perform quantization processing on the output signal of the integrator, output an N-bit digital signal, and configure the N-bit digital signal to the selector;

When the quantizer is in the digital-to-analog conversion working mode, the sampling switch of the quantizer is turned off, and the quantizer does not work.

The selector U3 is configured to selectively input the N-bit digital signal output by the quantizer or the second input signal to the input end of the feedback digital-to-analog converter;

Specifically, in the continuous-time analog-to-digital conversion working mode, the first input terminal is selected through the control terminal, and the N-bit digital signal output by the quantizer is input to the input terminal of the feedback digital-to-analog converter; in the digital-to-analog conversion working mode , select the second input terminal to connect to the second input signal through the control terminal, and input the second input signal to the input terminal of the feedback digital-to-analog converter.

The feedback digital-to-analog converter U4 is configured to perform digital-to-analog conversion on the N-bit digital signal input by the selector or the second input signal, and input the output analog signal to the integrator:

Specifically, in the continuous-time analog-to-digital conversion working mode, it is used to feedback the integrator, perform digital-to-analog conversion on the N-bit digital signal input by the selector, and feed back the output analog signal to the integrator; When converting the working mode, it is used to perform digital-to-analog conversion on the second input signal, and input the output analog signal to the integrator.

The integrator, configured as:

In the continuous-time analog-to-digital conversion working mode, the first switch S1 and the second switch S2 are closed, the third switch S3 and the fourth switch S4 are open, and the first input signal passes through the first switch S1, the second switch S2, the first switch The resistor R1 and the second resistor R2 are input to the operational amplifier; the operational amplifier, the first feedback capacitor C1, and the second feedback capacitor C2 integrate the first input signal according to the feedback analog signal output by the feedback digital-to-analog converter;

In the digital-to-analog conversion working mode, the first switch S1 and the second switch S2 are turned off, the third switch S3 and the fourth switch S4 are turned on, and the first feedback resistor R3 and the second feedback resistor R4 are connected to the input terminal of the operational amplifier and the Output end; the first feedback resistor R3, the second feedback resistor R4, the first feedback capacitor C1, the second feedback capacitor C2, and the operational amplifier form an integrator, which integrates the output signal of the feedback digital-to-analog converter.

Specifically, the N-bit quantizer U2 is implemented by an asynchronous SAR ADC. Figure 4 shows the structure diagram of a 10-bit asynchronous SAR ADC. Using an asynchronous SAR ADC to design a high-speed ADC on a low-node process can greatly save area and reduce power consumption. , and it is also easy to realize the migration between different processes, so as to realize the optimization of power consumption and area.

The output end of the integrator U1 is connected to an N-bit quantizer, and the N-bit quantizer performs quantization processing on the analog differential voltage signal output by the integrator;

The N-bit binary digital code DOUT_ADC is output through the quantizer, and the N-bit digital code DOUT_ADC is input to the selector together with the digital input code DIN_DAC of the digital-to-analog conversion working mode;

The selector is a two-to-one switch U3, and the selector U3 selects the quantizer to output the N-bit binary digital code DOUT_ADC under different working modes, or the digital input code DIN_DAC of the digital-to-analog conversion working mode, and outputs it to the feedback digital-to-analog converter. ;

The Sigma-Delta modulator in the present invention has a continuous-time analog-to-digital conversion working mode and a digital-to-analog conversion working mode, hereinafter referred to as the continuous-time ADC working mode and the DAC working mode:

The specific connection method of the circuit is as follows:

The first input signal, that is, the analog differential input signal VIP_ADC is connected to the first resistor R1, VIN_ADC is connected to the second resistor R2, the other end of R1 is connected to the first switch S1, the other end of R2 is connected to the second switch S2, and the other end of S1 is connected to The positive input end of the operational amplifier AMP, and the other end of S2 is connected to the negative input end of the operational amplifier AMP;

The first feedback resistor R3 and the third switch S3 are connected in series with the first feedback capacitor C1: R3 and S3 form a first series circuit, one end of the first series circuit is connected to the positive input end of the operational amplifier AMP, and the other end is connected to the AMP negative output terminal; one end of the first adjustable capacitor C1 is connected to the positive input terminal of the operational amplifier AMP, and the other end is connected to the negative output terminal of the AMP;

The second feedback resistor R4 and the fourth switch S4 are connected in series with the second feedback capacitor C2: R4 and S4 form a second series circuit, one end of the second series circuit is connected to the negative input end of the operational amplifier AMP, and the other end is connected to the negative input end of the AMP. Positive output terminal; one end of the second adjustable capacitor C2 is connected to the negative input terminal of the operational amplifier AMP, and the other end is connected to the positive output terminal of the AMP;

The positive output end of the operational amplifier is connected to the positive input end of the quantizer U2, and the negative output end of the operational amplifier is connected to the negative input end of the quantizer;

The selector U3 includes: a control end, a first input end, and a second input end; the first input end of the selector U3 is connected to the output end of the quantizer U2, and the second input end is connected to the second output signal line port, that is, in the DAC working mode The input signal DIN_DAC;

The output end of the selector U3 is connected to the input end of the feedback digital-to-analog converter U4;

The positive output terminal of the feedback digital-to-analog converter is connected to the negative input terminal of the operational amplifier AMP, and the negative output terminal of the feedback digital-to-analog converter is connected to the positive input terminal of the operational amplifier AMP.

The specific working mechanisms of the two working modes are as follows:

1) In the continuous time ADC working mode: the new Sigma-Delta modulator is applied in the receiver RX, and realizes the analog-to-digital conversion function, which converts the analog differential input signal into an N-bit binary digital code. Specifically, As shown in Figure 5:

The first switch S1 and the second switch S2 are closed, the analog differential input signals VIP_ADC and VIN_ADC are connected to the operational amplifier through the resistors R1 and R2, the third switch S3 and the fourth switch S4 are disconnected, and the working part of the integrator includes: S1, S2, R1, R2, C1, C2, operational amplifier; the third switch S3, the fourth switch S4, the first feedback resistor R3, the second feedback resistor R4 do not work;

The sampling switch of the quantizer is switched or closed according to the sampling clock CLK1. In Figure 4, when the sampling clock CLK1 is 1, the sampling switch is closed, the switches S1 and S2 are connected to Vip and Vin, and the quantizer U2 works normally; the output after the integrator After the signal is quantized, the N-bit binary digital code DOUT_ADC is output;

The N-bit binary digital code DOUT_ADC and the digital input code DIN_DAC input selector in the DAC working mode, the selector is a two-to-one switch U3, and the second input terminal is selected through the control terminal in the selector, that is, the quantizer output is selected signal, that is, select channel 1 in Figure 5, and output N-bit binary digital code DOUT_ADC;

The N-bit binary digital code DOUT_ADC is input to the feedback digital-to-analog converter, and the feedback digital-to-analog converter performs digital-to-analog conversion on the N-bit binary digital code DOUT_ADC, outputs an analog differential signal, and feeds back the analog differential signal to the analog input of the operational amplifier U1. Input the differential terminal to feedback the integrator;

In continuous-time ADC working mode, the input signal is the analog signal input from the input end of the integrator, and the output signal is the N-bit digital signal DOUT_ADC output by the quantizer. The new Sigma-Delta modulator realizes the first-order N-bit continuous-time Sigma -Delta modulator function.

2) The new Sigma-Delta modulator in the DAC working mode is applied in the transmitter TX, and realizes the digital-to-analog conversion function. The input signal of the DAC working mode, that is, the digital input code DIN_DAC, is converted into an analog differential voltage signal. The specific ,As shown in Figure 6:

The first switch S1 and the second switch S2 are open, the third switch S3 and the fourth switch S4 are closed, and the working part of the integrator includes: S3, S4, R3, R4, C1, C2, operational amplifier; the first switch S1 , the second switch S2, the first resistor R1, and the second resistor R2 do not work;

The sampling switch of the quantizer U2 is turned on, that is, the input switch in Figure 4 is connected to Vref, and the quantizer U2 is in a power-off state, that is, PD1 is set to 1, and the power-off working mode is activated, and the quantizer U2 does not work;

The input of the selector is the digital input code DIN_DAC of the DAC working mode, and the second input terminal in the selector is selected to select the digital input code DIN_DAC, that is, channel 0 in Figure 6 is selected, and the selector outputs the N-bit binary digital code DIN_DAC;

The N-bit binary digital code DIN_DAC is input to the feedback digital-to-analog converter, and the feedback digital-to-analog converter performs digital-to-analog conversion on the N-bit binary digital code DIN_DAC, outputs an analog differential signal, and inputs the analog differential signal to the analog input differential terminal of the operational amplifier U1 ;

The operational amplifier U1 and its feedback elements S3, S4, C1, C2, R3 and R4 form an integrator in the form of a transconductance amplifier (OTA), which converts the output analog differential signal of the feedback digital-to-analog converter into an analog differential voltage signal VON_DAC and VOP_DAC;

In the DAC working mode, the input signal is the digital signal DIN_DAC input by the second selection terminal of the selector, and the output is the analog differential voltage signals VON_DAC and VOP_DAC output by the integrator. The new Sigma-Delta modulator realizes the digital-to-analog converter DAC function ;

It should be noted that the first adjustable capacitor C1 and the second adjustable capacitor C2 are used to adjust the signal bandwidth of the integrator, and are adjustable in both modes, and both C1 and C2 are adjusted using a binary capacitor array. , in order to cover the process angle, the capacitance changes greatly and the signal bandwidth of the integrator changes too much. The capacitance array is shown in Figure 7.

Those skilled in the art can understand that various exemplary method steps and device units described herein in conjunction with the disclosed embodiments can be implemented by electronic hardware, software or a combination of the two. To clearly illustrate the interchangeability between hardware and software, various exemplary steps and elements have been described above generally in terms of their functionality. Whether this functionality is implemented in hardware or software depends on the particular application and design constraints implemented by the overall system. Skilled artisans can implement the described functionality in various ways for each particular application, but the results of such implementations should not be interpreted as departing from the scope of the present invention.

The steps of the methods described in conjunction with the above disclosed embodiments may be directly embodied in hardware, software modules executed by a processor, or a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In an alternative example, the storage medium is an integral part of the processor. The processor and storage medium may exist in an ASIC. The ASIC may exist in a subscriber station. In an alternative example, the processor and storage medium may exist as separate components in the subscriber station.

Based on the disclosed embodiments, those skilled in the art may be enabled to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the scope and spirit of the invention. The above-mentioned embodiments are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the within the protection scope of the present invention.

Claims (7)

1. A novel Sigma-Delta modulator is characterized by comprising an integrator, a quantizer, a selector and a feedback digital-to-analog converter;

the output end of the integrator is connected with the input end of the quantizer; the first input end of the selector is connected with the output end of the quantizer, the second input end of the selector is connected with the port of the second input signal line, and the output end of the selector is connected with the input end of the feedback digital-to-analog converter; the output end of the feedback digital-to-analog converter is connected with the input end of an operational amplifier of the integrator;

the integrator includes: a first switch (S1) connected to the first resistor (R1) and the positive input end of the operational amplifier, a second switch (S2) connected to the second resistor (R2) and the negative input end of the operational amplifier, a third switch (S3), a fourth switch (S4), a first feedback resistor (R3) and a second feedback resistor (R4); the third switch (S3) is connected in series with the first feedback resistor (R3) and then connected in parallel with the first feedback capacitor (C1), and the fourth switch (S4) is connected in series with the second feedback resistor (R4) and then connected in parallel with the second feedback capacitor (C2);

the first switch (S1) and the second switch (S2) are closed, the third switch (S3) and the fourth switch (S4) are opened, the control end of the selector selects the first input end, and the Sigma-Delta modulator works in an analog-to-digital conversion working mode;

the first switch (S1) and the second switch (S2) are opened, the third switch (S3) and the fourth switch (S4) are closed, the control end of the selector selects the second input end, and the Sigma-Delta modulator works in a digital-to-analog conversion working mode.

2. The novel Sigma-Delta modulator of claim 1 wherein,

the input end of the integrator is connected with a first input signal line port;

the first switch (S1) and the second switch (S2) are used for controlling the connection and disconnection between the integrator and the first input signal.

3. The novel Sigma-Delta modulator of claim 1 wherein,

the first input signal is an analog differential input signal in an analog-to-digital conversion working mode;

the second input signal is an input digital signal in a digital-to-analog conversion working mode.

4. The novel Sigma-Delta modulator of claim 1 wherein,

the quantizer is configured to quantize the analog differential voltage signal output by the integrator, output an N-bit digital signal, and configure the N-bit digital signal to the selector;

the selector is configured to selectively input the N-bit digital signal output by the quantizer or the second input signal to the input end of the feedback digital-to-analog converter;

and the feedback digital-to-analog converter is configured to perform digital-to-analog conversion on the N-bit digital signal input by the selector or the second input signal and feed back the output analog signal to the integrator.

5. The novel Sigma-Delta modulator of claim 4, wherein the integrator is configured to:

in the analog-to-digital conversion operation mode, a first input signal is input to the operational amplifier through the first switch (S1), the second switch (S2), the first resistor (R1) and the second resistor (R2); the operational amplifier, the first feedback capacitor (C1) and the second feedback capacitor (C2) integrate the first input signal according to the feedback analog signal output by the feedback digital-to-analog converter;

in the digital-to-analog conversion working mode, the first feedback resistor (R3) and the second feedback resistor (R4) are connected to the operational amplifier through the third switch (S3) and the fourth switch (S4), and form an integrator with the first feedback capacitor (C1), the second feedback capacitor (C2) and the operational amplifier to integrate the output signal of the feedback digital-to-analog converter.

6. The novel Sigma-Delta modulator of claim 4 wherein the selector,

when the analog-digital conversion is in a working mode, the control end selects the first input end, and the N-bit digital signal output by the quantizer is input to the input end of the feedback digital-analog converter;

and when the digital-to-analog conversion work mode is adopted, the second input end is selected by the control end to access the second input signal, and the second input signal is input to the input end of the feedback digital-to-analog converter.

7. The novel Sigma-Delta modulator of claim 4 wherein the feedback digital-to-analog converter,

when in the analog-to-digital conversion working mode, the digital-to-analog conversion device is used for feeding back the integrator, performing digital-to-analog conversion on the N-bit digital signal input by the selector, and feeding back the output analog signal to the integrator;

and when the digital-to-analog conversion work mode is adopted, the digital-to-analog conversion work mode is used for carrying out digital-to-analog conversion on the second input signal and inputting the output analog signal to the integrator.

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