CN111479034A

CN111479034A - FPGA-based video processing system

Info

Publication number: CN111479034A
Application number: CN201910067789.5A
Authority: CN
Inventors: 焦健
Original assignee: Shanghai Jiaoyang Culture Communication Co ltd
Current assignee: Shanghai Jiaoyang Culture Communication Co ltd
Priority date: 2019-01-24
Filing date: 2019-01-24
Publication date: 2020-07-31

Abstract

The invention relates to the technical field of video processing, in particular to a video processing system based on an FPGA (field programmable gate array), which comprises an FPGA mainboard, wherein the FPGA mainboard is respectively and electrically connected with an image preprocessing module and a bus control module, the image preprocessing module is respectively and electrically connected with a display module and a video image algorithm module, the bus control module is respectively and electrically connected with a memory and an acquisition card, the acquisition card, an access memory and the bus control module form a video image acquisition module, and the acquisition card is electrically connected with a camera. The FPGA mainboard disclosed by the invention not only distinguishes the high price of the traditional concept, but also obviously improves the performance, meanwhile, new hardware resources are continuously integrated, the FPGA mainboard is very suitable for high-performance video and image technologies, the FPGA mainboard is used for real-time image processing, and due to the large capacity and flexibility of programmable logic, the FPGA mainboard can realize the extremely large parallel processing capacity of images, shortens the product research and development and update period, and quickly makes the FPGA mainboard with own characteristics.

Description

FPGA-based video processing system

Technical Field

The invention relates to the technical field of video processing, in particular to a video processing system based on an FPGA (field programmable gate array).

Background

Video technology was first developed from the creation of cathode ray tube television systems, but new display technologies were then invented to extend the scope encompassed by video technology. Television-based standards and computer-based standards have attempted to develop video technology from two different aspects. Thanks to the improvement of computer performance, and along with the broadcasting and recording of digital television, the two fields have new intersection and convergence.

Video generally refers to various storage formats of moving images, such as: digital video formats including DVD, QuickTime, and MPEG-4; and analog video tapes, including VHS and Betamax. Video may be recorded and transmitted via different physical media: an electrical signal when the video is photographed or transmitted by radio, and a magnetic signal when the video is recorded on a magnetic tape; the video quality actually varies with the way of capture and the way of storage.

In the prior art, a processing chip used for video processing is expensive, a video image processing technology mainly uses a PC (personal computer) for real-time image processing, and the PC is a complex instruction computer based on von Neumann, essentially executes instructions sequentially, cannot realize parallel processing, and has poor real-time performance.

Disclosure of Invention

The invention aims to solve the defects in the prior art and provides a video processing system based on an FPGA.

In order to achieve the purpose, the invention adopts the following technical scheme:

the utility model provides a video processing system based on FPGA, includes the FPGA mainboard, the FPGA mainboard is electric connection respectively has image preprocessing module and bus control module, image preprocessing module is electric connection respectively has display module and video image algorithm module, bus control module is electric connection respectively has memory and collection card, access memory and bus control module constitute video image acquisition module, collection card electric connection has the camera.

Preferably, the FPGA motherboard is composed of a configurable logic module (C L B), a user programmable I/o (iob), a blockadram, a digital clock management module (DCM) power I hardware multiplier, and the like.

Preferably, the memory includes distributed memory implemented by lookup tables (L UT) in C L B, 8 UJT per C L B, and can constitute 8 memories of 16X1 or 128X 1, 64 × 2, which are commonly used to constitute small on-chip memories, such memories have fast access speeds, up to 0.5as, and thus are often used for data caching for digital signal processing, etc. the Virtex.II Pro family of devices can provide up to 1.5Mb of distributed memory, and dual port RAM, which provides a large number of rapidly dispersed memory blocks within the device, the total amount of which increases with the size of the Virtex.II Pro device, and which can be configured as single port BlockRAM or fully dual port BlockRAM.

Preferably, the FPGA motherboard is SAA7113, and the output video image data is transmitted to the FPGA motherboard through an 8-bit bus VPO.

Preferably, the video image algorithm module includes image smoothing filtering and image sharpening filtering, the smoothing filtering is used for blurring processing and reducing noise and is implemented by a low-pass filter, and the sharpening filtering is implemented by a high-pass filter for enhancing blurred detail edges.

Compared with the prior art, the invention provides a video processing system based on FPGA, which has the following beneficial effects:

the FPGA mainboard is quite suitable for high-performance video and image technologies, uses the FPGA mainboard for real-time image processing, can realize the extremely large parallel processing capability of images due to the large capacity and the flexibility of programmable logic, has higher speed than a PC and a digital signal processing chip, can realize SOPC, helps users customize systems, shortens the period of product research and development and update, and quickly makes own characteristics.

Drawings

Fig. 1 is a schematic structural diagram of an entire FPGA-based video processing system according to the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention.

Referring to fig. 1, a video processing system based on an FPGA includes an FPGA motherboard electrically connected to an image preprocessing module and a bus control module, the image preprocessing module electrically connected to a display module and a video image algorithm module, the bus control module electrically connected to a memory and an acquisition card, the acquisition card, an access memory and the bus control module forming a video image acquisition module, and the acquisition card electrically connected to a camera.

The FPGA mainboard comprises a configurable logic module (C L B), a user programmable I/O (IOB), a Block RAM, a digital clock management module (DCM) power I hardware multiplier and the like.

The memory comprises distributed memory and block memory, wherein the distributed memory is realized by a lookup table (L UT) in C L B, each C L B has 8 UJT memories which can form 8 memories of 16X1 or 128X 1 and 64 × 2 and are usually used for forming on-chip memory with small capacity, the memory has the characteristic of high access speed and can reach 0.5as, so that the memory is often used for data caching of digital signal processing and the like.

And the FPGA mainboard is used for transmitting video image data output by the SAA7113 to the FPGA mainboard through an 8-bit bus VPO.

The video image algorithm module comprises image smoothing filtering and image sharpening filtering, wherein the smoothing filtering is used for blurring processing and reducing noise and is realized by a low-pass filter, and the sharpening filtering is realized by enhancing blurred detail edges and is realized by a high-pass filter.

When the invention is used, the FPGA mainboard not only distinguishes the high price of the traditional concept, but also obviously improves the performance, simultaneously continuously integrates some new hardware resources, embeds a DSP block, an embedded RAM block, a phase-locked loop (P LL) and a high-speed external memory interface I (DDR), the FPGA mainboard is very suitable for high-performance video and image technology, and uses the FPGA mainboard for real-time image processing.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. The utility model provides a video processing system based on FPGA, including the FPGA mainboard, its characterized in that, FPGA mainboard electric connection has image preprocessing module and bus control module respectively, image preprocessing module electric connection has display module and video image algorithm module respectively, bus control module electric connection has memory and collection card respectively, collection card, access memory and bus control module constitute video image acquisition module, collection card electric connection has the camera.

2. An FPGA-based video processing system according to claim 1, wherein said FPGA motherboard is comprised of configurable logic modules (C L B), user programmable I/o (iob), blockackram, digital clock management module (DCM) power I hardware multipliers, and the like.

3. An FPGA-based video processing system according to claim 1 wherein said memory comprises distributed memory implemented as lookup tables (L UT) in C L B, 8 UJT per C L B, and 8 memories of 16X1 or 128X 1, 64 × 2, typically used to form small capacity on-chip memories, such memories having fast access speeds up to 0.5as, and therefore often used for data caching for digital signal processing, virtex.ii Pro family devices provide up to 1.5Mb of distributed memory, and block memory dual port RAM providing a large number of rapidly dispersed memory blocks within the device, the total amount increasing with virtex.ii Pro devices, which can be configured as single port or fully dual port block RAM.

4. The FPGA-based video processing system of claim 1, wherein said FPGA motherboard is configured to transmit video image data output from SAA7113 to said FPGA motherboard via 8-bit bus VPO.

5. The FPGA-based video processing system of claim 1, wherein the video image algorithm module comprises an image smoothing filter and an image sharpening filter, the smoothing filter is used for blurring and noise reduction and is implemented as a low-pass filter, and the sharpening filter is implemented as a high-pass filter for enhancing blurred detail edges.