CN111478694A - Isolation circuit - Google Patents

Isolation circuit Download PDF

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Publication number
CN111478694A
CN111478694A CN202010312941.4A CN202010312941A CN111478694A CN 111478694 A CN111478694 A CN 111478694A CN 202010312941 A CN202010312941 A CN 202010312941A CN 111478694 A CN111478694 A CN 111478694A
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China
Prior art keywords
signal
input
carrier signal
output
isolator
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Pending
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CN202010312941.4A
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Chinese (zh)
Inventor
王燕晖
左事君
秦海怡
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Xiamen Xindamao Microelectronics Co ltd
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Xiamen Xindamao Microelectronics Co ltd
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Priority to CN202010312941.4A priority Critical patent/CN111478694A/en
Publication of CN111478694A publication Critical patent/CN111478694A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/14Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

The present invention provides an isolation circuit comprising: an input line, an isolator and an output line; the isolator isolates the power supply and the ground of the output circuit from the power supply and the ground of the output circuit; the input line outputs a carrier signal and N modulation signals generated by the carrier signal and the input signal, N > 1; the isolator comprises a carrier signal isolator and N modulation signal isolators which correspond to modulation signals one by one; and the carrier signal and each path of modulation signal are respectively input into an output line to generate N paths of output signals corresponding to the input signals one by one. The isolating circuit is used on a multi-channel chip, can save area, and can maintain good signal transmission without distortion.

Description

Isolation circuit
Technical Field
The invention relates to a power switch tube, in particular to an isolation circuit.
Background
The primary role of isolation is to separate one line from interference by another, for example by using an insulator (dielectric) to separate the two lines. It can also be said that 2 different voltage domains are isolated, for example, in a control system, a processor power supply is usually a low voltage 5V, a load power supply is usually a high voltage 220V, if these 2 voltage domains are not isolated, the operation of the high voltage domain may cause serious interference to the low voltage domain, and even cause the device damage of the low voltage domain, so that an insulator is needed to separate the high voltage domain from the low voltage domain, but the isolation cannot affect the transmission of digital signals, and the transmission of the digital signals is usually through a high frequency carrier wave, and the high frequency carrier wave can pass through the insulator. The medium which can not only isolate different voltage domains, but also can transmit signals is an inductor, a transformer, an optical coupler, a capacitor, an NVE magnetic switch, a GMR giant magnetoresistance and the like.
Isolation is applicable to IGBT gate drive of drive motors, which would be a floating-ground architecture, the power supply of the two lines is not consistent with ground, and its non-uniformity also varies with transients, thus yielding a so-called Common Mode Transient Immunity (CMTI) performance index, which better represents the higher tolerance to Common Mode Transient Interference (CMTI), since this high frequency Transient Common Mode interference would disrupt information transfer between the isolation dielectrics. It is therefore desirable to develop isolation techniques that are resistant to CMTI interference.
In the conventional method, as shown in fig. 1, a high-voltage capacitor is used as an insulating dielectric, each input corresponds to 2 isolation capacitors, the 2 isolation capacitors are used to isolate 2 differential signals of each input, as shown in fig. 1, 2 inputs require 4 isolation capacitors, and the number of the isolation capacitors required in multi-channel isolation driving is 2 × N (N is the number of channels). In a multi-channel application, area is consumed more and noise is greater.
Disclosure of Invention
The invention aims to solve the main technical problem of an isolation circuit which is used on a multi-channel chip and can save area and maintain good signal transmission without distortion.
In order to solve the above technical problem, the present invention provides an isolation circuit, including: an input line, an isolator and an output line; the isolator isolates the power supply and the ground of the input line from the power supply and the ground of the output line;
the input line is connected between a first power supply VDD1 and a first ground end GND1 and used for receiving an input signal and outputting a carrier signal and N paths of modulation signals, wherein the N paths of modulation signals are generated by modulating the carrier signal and the input signal, and N > 1;
the isolator comprises a carrier signal isolator and N modulation signal isolators which correspond to modulation signals one by one and are used for connecting and isolating an input line and an output line;
the output circuit is connected between a second power supply VDD2 and a second ground GND2, and is also connected to the isolator for receiving the modulated signal and the carrier signal processed by the isolator, and demodulating the processed modulated signal and the carrier signal to provide N output signals corresponding to the N input signals one to one.
In a preferred embodiment: the waveform of the output signal is the same as that of the input signal and has a certain time delay.
In a preferred embodiment: the modulation signal is a continuous carrier signal.
In a preferred embodiment: the demodulation of the modulated signal by the output circuit takes the rising and/or falling edges of a single line to lock the data content.
The present invention also provides an isolation circuit comprising: an input line, an isolator and an output line; the power supply and the ground of the input line are isolated from the power supply and the ground of the output line;
the input line comprises a carrier signal generating part and N modulation signal generating parts; the carrier signal generation section generates a first carrier signal and a second carrier signal; the first carrier signal, the second carrier signal and the N input signals are respectively input to N modulation signal generating parts to generate N modulation signals;
the isolator comprises a carrier signal isolator and N modulation signal isolators which correspond to modulation signals one by one; the input end of the carrier signal isolator is connected with a first carrier signal, and the input ends of the N modulation signal isolators are correspondingly connected with the N modulation signals;
the output circuit comprises N comparators, and the negative input end of each comparator is respectively connected with the output end of the carrier signal isolator; the positive input end of each comparator is correspondingly connected with the output ends of the N modulation signal isolators one by one; and the output ends of the comparators form N output signals through level conversion circuits respectively.
In a preferred embodiment: the waveform of the output signal is the same as that of the input signal and has a certain time delay.
In a preferred embodiment: the modulation signal is a continuous carrier signal.
In a preferred embodiment: the demodulation of the modulated signal by the output circuit takes the rising and/or falling edges of a single line to lock the data content.
In a preferred embodiment: the modulation signal generating part is a multiplexer
In a preferred embodiment: compared with the prior art, the carrier signal generating part is an oscillator, and the technical scheme of the invention has the following beneficial effects:
the invention provides an isolation circuit, which only needs N +1 isolators for an input line of an N-channel input signal, and a traditional N-channel isolation driving structure needs 2N isolators. Therefore, the purpose of saving the isolator can be achieved, the cost is saved, and the advantages of the invention are more obvious along with the increase of the number of the driving channels.
Drawings
FIG. 1 is a block diagram of an isolation circuit in the prior art;
FIG. 2 is a block diagram of an isolated circuit in accordance with a preferred embodiment of the present invention;
FIG. 3 is a block diagram of the input circuitry in the preferred embodiment of the present invention;
FIG. 4 is a waveform diagram of the node of the input line in the preferred embodiment of the present invention;
FIG. 5 is a block diagram of the output circuitry in the preferred embodiment of the present invention;
fig. 6 is a waveform diagram of an isolated line node in a preferred embodiment of the invention.
Detailed Description
The technical solution of the present invention is further explained by the accompanying drawings and the specific embodiments.
Referring to fig. 1 to 6, the present embodiment provides an isolation circuit including: an input line, an isolator and an output line; the isolator isolates the power supply VDD1 and the ground GND1 of the output line from the power supply VDD2 and the ground GND2 of the output circuit;
the input line includes a carrier signal generating portion and N modulation signal generating portions, where N is 2 in this embodiment, and N may also be any other integer, which belongs to a simple replacement of this embodiment. The modulation signal generation section is a multiplexer. The carrier signal generation section is an oscillator.
The oscillator generates a first carrier signal and a second carrier signal; the carrier signal A, the carrier signal B, 2 INPUT signals INPUT1 and INPUT2 are respectively INPUT to a multiplexer 1 and a multiplexer 2 to generate a modulation signal 1 and a modulation signal 2;
the isolator comprises an isolator 1, an isolator 2 and an isolator 3, wherein the isolator 2 and the isolator 3 correspond to the modulation signal 1 and the modulation signal 2 one to one; the input end of the isolator 1 is connected with the carrier signal A, and the input ends of the isolator 2 and the isolator 3 are correspondingly connected with the modulation signal 1 and the modulation signal 2;
the output circuit comprises 2 comparators, and negative input ends of the comparator 1 and the comparator 2 are respectively connected with an output end of the isolator 1; the positive input ends of the comparator 1 and the comparator 2 are correspondingly connected with the output ends of the isolator 2 and the isolator 3 one by one respectively; the OUTPUT end of the comparator forms OUTPUT signals OUTPUT1 and OUTPUT2 through a level conversion circuit 1 and a level conversion circuit 2 respectively.
In the isolation circuit, each input signal only needs to be isolated by 1 isolator, and the isolator 1 for isolating the carrier signal A only needs to use N +1 isolators, while the traditional N-channel isolation driving structure needs 2N isolators. Therefore, the purpose of saving the isolator can be achieved, the cost is saved, and the advantages of the embodiment are more obvious along with the increase of the number of the driven channels.
In this embodiment, the waveform of the output signal is the same as the input signal and has a certain delay. The modulation signal 1 and the modulation signal 2 are continuous carrier signals. The demodulation of the modulated signal by the output circuit takes the rising and/or falling edges of a single line to lock the data content.
The modulation and demodulation process for each signal is described in detail below:
as shown in fig. 4, which is a waveform diagram of the node of the input line, the modulation signal 1(1) is characterized by: when the input signal is 1, the multiplexer selects the carrier signal A to output; when the input signal is 0, the multi-path selector selects the carrier signal B to output; modulation signal 1(2) is characterized by: when the input signal is 1, the multiplexer selects the carrier signal B to output; when the input signal is 0, the multi-path selector selects the carrier signal B to output; the specific application may select modulation signal 1(1) or 1(2) as the specific output, and the size of the carrier signal is also determined according to the actual application. The characterization modes of the modulation signals 2(1) and 2(2) are similar to those of the modulation signals 1(1) and 1(2), in this embodiment, the modulation signals 1(1) and 2(1) are selected for description, and the generated modulation signals enter the isolator after being processed by other methods.
The output circuitry is shown in fig. 5, and includes a comparator and other basic modules. The output line processes the modulated signal and the carrier signal A which pass through the isolator, and the modulated signal and the carrier signal A which pass through the isolator are restored by utilizing a comparator and other modules, such as a level conversion module and the like, so that a demodulation signal consistent with the input signal is obtained. The comparator 1 compares the modulation signal 1 passing through the isolator 2 with the carrier signal a passing through the isolator 1, the comparator 2 compares the modulation signal 2 passing through the isolator 3 with the carrier signal a passing through the isolator 1, and the signals after the comparator 1 and the comparator 2 are processed by other modules and restored into OUTPUT signals OUTPUT1 and OUTPUT2 with certain time delay with the input signals. Specific output line structures and output line node waveforms are shown in fig. 5 and 6.
The above description is only a preferred embodiment of the present invention, and therefore should not be taken as limiting the scope of the invention, which is defined by the appended claims and their equivalents.

Claims (10)

1. An isolation circuit, comprising: an input line, an isolator and an output line; the isolator isolates the power supply and the ground of the input line from the power supply and the ground of the output line;
the input line is connected between a first power supply VDD1 and a first ground end GND1 and used for receiving an input signal and outputting a carrier signal and N paths of modulation signals, wherein the N paths of modulation signals are generated by modulating the carrier signal and the input signal, and N > 1;
the isolator comprises a carrier signal isolator and N modulation signal isolators which correspond to modulation signals one by one and are used for connecting and isolating an input line and an output line;
the output circuit is connected between a second power supply VDD2 and a second ground GND2, and is also connected to the isolator for receiving the modulated signal and the carrier signal processed by the isolator, and demodulating the processed modulated signal and the carrier signal to provide N output signals corresponding to the N input signals one to one.
2. An isolation circuit as claimed in claim 1, wherein: the waveform of the output signal is the same as that of the input signal and has a certain time delay.
3. An isolation circuit as claimed in claim 1, wherein: the modulation signal is a continuous carrier signal.
4. An isolation circuit as claimed in claim 1, wherein: the demodulation of the modulated signal by the output circuit takes the rising and/or falling edges of a single line to lock the data content.
5. An isolation circuit, comprising: an input line, an isolator and an output line; the power supply and the ground of the input line are isolated from the power supply and the ground of the output line;
the input line comprises a carrier signal generating part and N modulation signal generating parts; the carrier signal generation section generates a first carrier signal and a second carrier signal; the first carrier signal, the second carrier signal and the N input signals are respectively input to N modulation signal generating parts to generate N modulation signals;
the isolator comprises a carrier signal isolator and N modulation signal isolators which correspond to modulation signals one by one; the input end of the carrier signal isolator is connected with a first carrier signal, and the input ends of the N modulation signal isolators are correspondingly connected with the N modulation signals;
the output circuit comprises N comparators, and the negative input end of each comparator is respectively connected with the output end of the carrier signal isolator; the positive input end of each comparator is correspondingly connected with the output ends of the N modulation signal isolators one by one; and the output ends of the comparators form N output signals through level conversion circuits respectively.
6. An isolation circuit as claimed in claim 5, wherein: the waveform of the output signal is the same as that of the input signal and has a certain time delay.
7. An isolation circuit as claimed in claim 5, wherein: the modulation signal is a continuous carrier signal.
8. An isolation circuit as claimed in claim 5, wherein: the demodulation of the modulated signal by the output circuit takes the rising and/or falling edges of a single line to lock the data content.
9. An isolation circuit as claimed in claim 5, wherein: the modulation signal generation section is a multiplexer.
10. An isolation circuit as claimed in claim 5, wherein: the carrier signal generation section is an oscillator.
CN202010312941.4A 2020-04-20 2020-04-20 Isolation circuit Pending CN111478694A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010312941.4A CN111478694A (en) 2020-04-20 2020-04-20 Isolation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010312941.4A CN111478694A (en) 2020-04-20 2020-04-20 Isolation circuit

Publications (1)

Publication Number Publication Date
CN111478694A true CN111478694A (en) 2020-07-31

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ID=71754311

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010312941.4A Pending CN111478694A (en) 2020-04-20 2020-04-20 Isolation circuit

Country Status (1)

Country Link
CN (1) CN111478694A (en)

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