CN111477174A

CN111477174A - Pixel circuit, driving method thereof and display substrate

Info

Publication number: CN111477174A
Application number: CN202010327211.1A
Authority: CN
Inventors: 杨波; 羊振中; 何祥飞; 曾科文; 刘珂
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2020-04-23
Filing date: 2020-04-23
Publication date: 2020-07-31

Abstract

The pixel circuit comprises an input sub-circuit and a light-emitting control sub-circuit, wherein the input sub-circuit is respectively electrically connected with a data signal end and the light-emitting control sub-circuit and is configured to reset a light-emitting device through the light-emitting control sub-circuit in a reset stage, store a first data signal, store a light-emitting driving voltage in a data writing stage and assist in turning on the light-emitting control sub-circuit in the light-emitting stage, wherein the data signal provided by the data signal end is an alternating voltage signal, the first data signal and a second data signal have different potentials, the light-emitting control sub-circuit is configured to transmit the reset signal to the light-emitting device in the reset stage, assist in turning on the input sub-circuit in the data writing stage and drive the light-emitting device to emit light in the light-emitting stage.

Description

Pixel circuit, driving method thereof and display substrate

Technical Field

The present disclosure relates to the field of display, and in particular, to a pixel circuit, a driving method thereof, and a display substrate.

Background

An Active-matrix organic light emitting diode (AMO L ED) display technology has the characteristics of self-luminescence, wide viewing angle, high contrast, fast response speed, ultra-light and thinness, and is widely applied in the industry.

Accordingly, each sub-circuit comprises at least one Thin Film Transistor (TFT), so that the number of the TFTs in the pixel circuit is larger, and the power consumption of the AMO L ED display substrate is also larger.

Disclosure of Invention

An object of the embodiments of the present disclosure is to provide a pixel circuit, a driving method thereof, and a display substrate, which are used to reduce the number of thin film transistors in the pixel circuit and reduce display power consumption.

In order to achieve the above purpose, some embodiments of the present disclosure provide the following technical solutions:

in one aspect, a pixel circuit is provided. The pixel circuit includes an input sub-circuit and a light emission control sub-circuit. The input sub-circuit is electrically connected with the data signal terminal and the light-emitting control sub-circuit respectively. The input sub-circuit is configured to: in a reset stage, responding to a second scanning signal and a third scanning signal, transmitting a first data signal provided by a data signal end to the light-emitting device through the light-emitting control sub-circuit so as to reset the light-emitting device and store the first data signal; in the data writing phase, responding to a second scanning signal and a fourth scanning signal, and storing a light-emitting driving voltage according to a second data signal provided by a data signal end with the assistance of the light-emitting control sub-circuit; and in the light-emitting stage, the light-emitting control sub-circuit is controlled to be conducted in an auxiliary mode according to the light-emitting driving voltage. The data signal provided by the data signal terminal is an alternating voltage signal, and the potentials of the first data signal and the second data signal are different. The light emitting control sub-circuit is also electrically connected with the light emitting device and configured to: transmitting a first data signal to the light emitting device in response to a first scan signal in a reset phase; in the data writing phase, responding to a first data signal, and enabling the auxiliary input sub-circuit; in the light emitting stage, the light emitting device is driven to emit light in response to the first scan signal, the fifth scan signal, and the light emission driving voltage.

The input sub-circuit and the light emission control sub-circuit in the pixel circuit of the embodiment of the disclosure can reset the light emitting device through the first data signal provided by the data signal terminal in the reset phase. And the input sub-circuit is capable of storing the light emission driving voltage according to a second data signal provided from the data signal terminal in the data writing stage. In this way, the light emission driving sub-circuit can drive the light emitting device to emit light with the aid of the light emission driving voltage. The first data signal and the second data signal are two data signals with different electric potentials in alternating voltage signals provided by the data signal end. That is, the pixel circuit of the embodiment of the present disclosure may provide different data signals at different time periods according to the data signal terminal, and may complete all functions within one light emission driving period (including the reset phase, the data writing phase, and the light emission phase), such as the reset function, the data writing (i.e., storing the light emission driving voltage), and the light emission control function, by the mutual cooperation of the input sub-circuit and the light emission control sub-circuit.

Compared with the pixel circuit in the related art that the light emitting device is reset through the independent reset sub-circuit, the pixel circuit in the embodiment of the disclosure can realize the reset function by using the input sub-circuit and the light emitting control sub-circuit, so that the independent reset sub-circuit is not required to be arranged, the number of the thin film transistors corresponding to the reset sub-circuit can be reduced, and the display power consumption of the display substrate is reduced.

In addition, the data signal provided by the data signal terminal in the pixel circuit in the embodiment of the present disclosure is an alternating voltage signal. In this way, the same data signal terminal can provide two data signals with different potentials, the first data signal is used for resetting, and the second data signal is used for data writing to realize the storage of the light-emitting driving voltage. Compared with the prior art that the pixel circuit resets the light-emitting device according to the voltage signal provided by the independent reset voltage signal terminal, the pixel circuit in the embodiment of the disclosure can simplify the independent reset voltage signal terminal under the condition of ensuring the realization of the reset function, thereby reducing a plurality of signal lines electrically connected with the reset voltage signal terminal and a corresponding reset driving integrated circuit, and further reducing the display power consumption of the display substrate.

In some embodiments, the light emission control sub-circuit includes a first transistor and a driving transistor. The input sub-circuit includes a second transistor, a third transistor, a fourth transistor, and a storage capacitor.

The control electrode of the first transistor is electrically connected with the first scanning signal line, the second electrode of the first transistor is electrically connected with the light-emitting device, and the first electrode of the first transistor is electrically connected with the second electrode of the driving transistor. The control electrode of the second transistor is electrically connected with the second scanning signal line, the first electrode of the second transistor is electrically connected with the data signal end, and the second electrode of the second transistor is electrically connected with the first electrode of the first transistor, the first electrode of the third transistor and the second electrode of the driving transistor respectively. A control electrode of the third transistor is electrically connected to the third scanning signal line, and a second electrode of the third transistor is electrically connected to the first electrode of the storage capacitor, the control electrode of the driving transistor, and the second electrode of the fourth transistor, respectively. A control electrode of the fourth transistor is electrically connected with the fourth scanning signal line; a first pole of the fourth transistor is electrically connected to the first pole of the driving transistor. The second pole of the storage capacitor is electrically connected with the first power signal end.

In some embodiments, the light emission control sub-circuit further includes a fifth transistor. A control electrode of the fifth transistor is electrically connected to the fifth scanning signal line, a first electrode of the fifth transistor is electrically connected to the first power supply signal terminal, and a second electrode of the fifth transistor is electrically connected to the first electrode of the driving transistor.

In some embodiments, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the driving transistor are all P-type thin film transistors.

In some embodiments, the second transistor and the fourth transistor are N-type thin film transistors, and the first transistor, the third transistor, the driving transistor, and the fifth transistor are P-type thin film transistors.

The first scanning signal line and the fourth scanning signal line are the same scanning signal line, and the second scanning signal line and the fifth scanning signal line are the same scanning signal line.

In some embodiments, the second transistor, the third transistor, the driving transistor, and the fourth transistor are P-type thin film transistors, and the first transistor and the fifth transistor are N-type thin film transistors.

In some embodiments, the second transistor, the third transistor, and the fourth transistor are N-type thin film transistors, and the first transistor, the driving transistor, and the fifth transistor are P-type thin film transistors.

In another aspect, a driving method of a pixel circuit is provided, which is applied to the pixel circuit according to some embodiments described above. One light emission driving period includes a reset phase, a data write phase, and a light emission phase.

The driving method comprises the following steps: in the reset phase, the input sub-circuit resets the light emitting device in response to the first scan signal, the second scan signal, and the third scan signal in accordance with the first data signal supplied from the data signal terminal, and stores the first data signal. In the data writing phase, the input sub-circuit responds to the second scanning signal, the fourth scanning signal and the first data signal and stores the light-emitting driving voltage according to the second data signal provided by the data signal terminal. The data signal provided by the data signal terminal is an alternating voltage signal. The first data signal and the second data signal have different potentials. In the light emission phase, the light emission control sub-circuit drives the light emitting device to emit light in response to the first scan signal, the fifth scan signal, and the light emission driving voltage input into the sub-circuit.

The advantageous effects that can be achieved by the driving method of the pixel circuit in the embodiments of the present disclosure are the same as those that can be achieved by the pixel circuit in some embodiments described above, and are not described here again.

In some embodiments, the light emission control sub-circuit includes a first transistor, a driving transistor, and a fifth transistor. The input sub-circuit includes a second transistor, a third transistor, a fourth transistor, and a storage capacitor.

The above driving method further includes:

in a reset stage, a first scanning signal controls the conduction of a first transistor, a second scanning signal controls the conduction of a second transistor, and a third scanning signal controls the conduction of a third transistor; the data signal terminal provides a first data signal; the first data signal is transmitted to the light emitting device through the second transistor and the first transistor to reset the light emitting device; the first data signal is transmitted to the storage capacitor through the second transistor and the third transistor; the storage capacitor stores a first data signal.

In a data writing stage, the second scanning signal controls the second transistor to be conducted, the first data signal stored in the storage capacitor controls the driving transistor to be conducted, and the fourth scanning signal controls the fourth transistor to be conducted; the data signal terminal provides a second data signal; the input sub-circuit stores the light emission driving voltage to the storage capacitor according to the second data signal.

In the light emitting stage, a fifth scanning signal controls the fifth transistor to be conducted, the light emitting driving voltage stored in the storage capacitor controls the driving transistor to be conducted, and the first scanning signal controls the first transistor to be conducted; and a first power supply voltage signal provided by the first power supply signal end is transmitted to the light-emitting device through the fifth transistor, the driving transistor and the first transistor to drive the light-emitting device to emit light.

In yet another aspect, a display substrate is provided. The display substrate includes pixel circuits as described in some embodiments above.

The advantageous effects that can be achieved by the display substrate in the embodiments of the present disclosure are the same as those that can be achieved by the pixel circuits in some embodiments described above, and are not described herein again.

Drawings

The accompanying drawings, which are included to provide a further understanding of some embodiments of the disclosure and are incorporated in and constitute a part of this disclosure, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure and not to limit the disclosure. In the drawings:

fig. 1 is a schematic structural diagram of a pixel circuit according to some embodiments of the present disclosure;

fig. 2 is a schematic flow chart of a driving method of a pixel circuit according to some embodiments of the present disclosure;

fig. 3 is a schematic structural diagram of another pixel circuit according to some embodiments of the present disclosure;

FIG. 4 is a timing diagram of the pixel circuit shown in FIG. 3;

fig. 5 is a schematic flow chart of another driving method of a pixel circuit according to some embodiments of the present disclosure;

FIG. 6 is a schematic diagram of the signal transmission direction of the pixel circuit shown in FIG. 3 during a reset phase;

FIG. 7 is a diagram illustrating a signal transmission direction of the pixel circuit shown in FIG. 3 during a data writing phase;

FIG. 8 is a diagram illustrating a signal transmission direction of the pixel circuit shown in FIG. 3 during a light-emitting period;

fig. 9 is a schematic structural diagram of another pixel circuit according to some embodiments of the present disclosure;

FIG. 10 is a timing diagram of the pixel circuit of FIG. 9;

fig. 11 is a schematic structural diagram of another pixel circuit according to some embodiments of the present disclosure;

FIG. 12 is a timing diagram of the pixel circuit of FIG. 11;

fig. 13 is a schematic structural diagram of another pixel circuit according to some embodiments of the present disclosure;

FIG. 14 is a timing diagram of the pixel circuit of FIG. 13;

fig. 15 is a schematic layout design diagram of the pixel circuit shown in fig. 13;

FIG. 16 is a schematic diagram of a fabrication process of the pixel circuit shown in FIG. 13;

FIG. 17 is a graph showing the effect of signal output in an analog simulation test of the pixel circuit shown in FIG. 13;

fig. 18 is a plot of the current-voltage characteristic of O L ED in the pixel circuit shown in fig. 13;

fig. 19 is a schematic diagram showing an error analysis of the emission current I (O L ED) of O L ED in the pixel circuit shown in fig. 13;

fig. 20 is a graph showing a relationship between the emission current I (O L ED) of O L ED and the threshold voltage vth (DT) of the driving transistor DT in the pixel circuit shown in fig. 13;

fig. 21 is a schematic structural diagram of a display substrate according to some embodiments of the present disclosure.

Detailed Description

For the convenience of understanding, the technical solutions provided by some embodiments of the present disclosure are described in detail below with reference to the accompanying drawings. It is to be understood that the described embodiments are merely a subset of the disclosed embodiments and not all embodiments. All other embodiments that can be derived by one skilled in the art from some of the embodiments of the disclosure are intended to be within the scope of the disclosure.

Some embodiments of the present disclosure provide a pixel circuit. Referring to fig. 1, the pixel circuit includes an input sub-circuit 1 and a light-emitting control sub-circuit 2. The input sub-circuit 1 is electrically connected to the data signal terminal Vdata and the light emission control sub-circuit 2, respectively. The input sub-circuit 1 is configured to: in the reset phase, the first data signal provided from the data signal terminal Vdata is transmitted to the light emitting device 3 through the light emission control sub-circuit 2 in response to the second scan signal and the third scan signal to reset the light emitting device 3 and store the first data signal; in the data writing phase, the light emission driving voltage is stored in response to the second scanning signal and the fourth scanning signal with the aid of the light emission control sub-circuit 2 according to the second data signal provided from the data signal terminal Vdata; and, in the light-emitting stage, the light-emitting control sub-circuit 2 is controlled to be turned on in an auxiliary manner according to the light-emitting driving voltage. The data signal provided by the data signal terminal is an alternating voltage signal. The first data signal and the second data signal have different potentials.

Illustratively, the first data signal is at a low potential and the second data signal is at a high potential. Or, the first data signal is at a high potential, and the second data signal is at a low potential. In this way, the first data signal and the second data signal can be respectively configured to perform different functions.

For example, the first data signal is low. The input sub-circuit 1 and the light emission driving sub-circuit 2 can reset the light emitting device 3 according to the first data signal. The input sub-circuit 1 stores the first data signal, and is also capable of self-reset according to the first data signal.

The second data signal is high. The input sub-circuit 1 is capable of storing a light emission driving voltage with the aid of the light emission control sub-circuit 2 in accordance with the second data signal. Here, the light emission driving voltage may be represented as the second data signal, or as a new data signal after being changed on the basis of the second data signal. The method is specifically set according to actual needs, and the embodiment of the disclosure does not limit the method.

The above-mentioned light emission control sub-circuit 2 is also electrically connected to the light emitting device 3, and is configured to: in the reset phase, a first data signal input into the sub-circuit 1 is transmitted to the light emitting device 3 in response to a first scan signal; in the data writing phase, responding to a first data signal, and enabling the auxiliary input sub-circuit; in the light emission phase, the light emitting device 3 is driven to emit light in response to the first scan signal, the fifth scan signal, and the light emission driving voltage.

Here, the light Emitting device 3 is an electronic device having a self-light Emitting function, such as an Organic light Emitting Diode (Organic L light-Emitting Diode, abbreviated as O L ED), an active matrix Quantum Dot light Emitting Diode (Quantum Dot L light-Emitting Diodes, abbreviated as Q L ED), or a light Emitting Diode (L light-Emitting Diodes, abbreviated as L ED).

In the pixel circuit of the embodiment of the present disclosure, the input sub-circuit 1 is electrically connected to the data signal terminal Vdata and the light emission control sub-circuit 2, and the light emission control sub-circuit 2 is electrically connected to the light emitting device 3. In this way, the input sub-circuit 1 can transmit the first data signal supplied from the data signal terminal Vdata to the light emission control sub-circuit 2 while storing the first data signal under the control of the second scan signal and the third scan signal. The light control sub-circuit 2 turns on the input sub-circuit 1 and the light emitting device 3 in response to a first scan signal. Thus, the first data signal is transmitted to the light emitting device 3 through the light emission control sub-circuit 2 to reset the light emitting device 3. In the data writing phase, the light emission control sub-circuit 2 can assist in turning on the input sub-circuit 1 under the control of the first data signal in the input sub-circuit. The input sub-circuit 1 is turned on by the light emission control sub-circuit 2 under the control of the second scanning signal and the fourth scanning signal. In this way, the input sub-circuit 1 can store the light emission driving voltage in accordance with the second data signal supplied from the data signal terminal Vdata with the aid of the light emission control sub-circuit 2. In the light emission phase, the light emission control sub-circuit 2 can drive the light emitting device 3 to emit light in response to the first scan signal, the fifth scan signal, and the light emission drive voltage input into the sub-circuit.

As can be seen, the input sub-circuit 1 and the emission control sub-circuit 2 in the pixel circuit of the embodiment of the present disclosure can reset the light emitting device 3 through the first data signal provided by the data signal terminal Vdata in the reset phase. And the input sub-circuit 1 can store the light emission driving voltage according to the second data signal provided from the data signal terminal Vdata in the data writing stage. In this way, the light emission driving sub-circuit 2 can drive the light emitting device 3 to emit light under the auxiliary control of the light emission driving voltage. The first data signal and the second data signal are two data signals with different potentials in an alternating voltage signal provided by a data signal terminal Vdata. That is, the pixel circuit of the embodiment of the present disclosure may provide different data signals at different time periods according to the data signal terminal Vdata, and may complete all functions within one light emission driving period (including the reset phase, the data writing phase, and the light emission phase), such as the reset function, the data writing (i.e., storing the light emission driving voltage), and the light emission control function, by the cooperation of the input sub-circuit 1 and the light emission control sub-circuit 2.

Compared with the pixel circuit in the related art that the light emitting device 3 is reset through the independent reset sub-circuit, the pixel circuit in the embodiment of the present disclosure can implement the reset function by using the input sub-circuit 1 and the light emitting control sub-circuit 2, so that the independent reset sub-circuit is not required to be provided, that is, the number of the thin film transistors corresponding to the reset sub-circuit can be reduced, thereby reducing the display power consumption of the display substrate.

In addition, the data signal provided by the data signal terminal Vdata in the pixel circuit in the embodiment of the present disclosure is an ac voltage signal. In this way, the same data signal terminal Vdata can supply two data signals having different potentials, and the first data signal is used for resetting and the second data signal is used for data writing to realize storage of the light-emitting driving voltage. Compared with the pixel circuit in the related art that the light emitting device 3 is reset according to the voltage signal provided by the independent reset voltage signal terminal, the pixel circuit in the embodiment of the disclosure can simplify the independent reset voltage signal terminal under the condition of ensuring the realization of the reset function, thereby reducing a plurality of signal lines electrically connected with the reset voltage signal terminal and a corresponding reset driving integrated circuit, and further reducing the display power consumption of the display substrate.

The structure and function of the pixel circuit in the embodiment of the present disclosure are as described above. It can be seen that, in the process of driving the light emitting device 3 to emit light by the pixel circuit, one light emission driving period includes at least a reset phase, a data writing phase, and a light emission phase. The driving method of the pixel circuit includes S100 to S300, please refer to fig. 2.

S100, in the reset stage, the input sub-circuit 1 transmits the first data signal provided from the data signal terminal to the light emitting device 3 through the light emission control sub-circuit 2 in response to the second scan signal and the third scan signal to reset the light emitting device 3 and store the first data signal.

S200, in the data writing phase, the light-emitting control sub-circuit 2 responds to the first data signal, and the auxiliary input sub-circuit 1 is turned on. The input sub-circuit 1 stores the light emission driving voltage in response to the second scan signal and the fourth scan signal with the aid of the light emission control sub-circuit 2 in accordance with the second data signal supplied from the data signal terminal Vdata. The data signal provided by the data signal terminal Vdata is an ac voltage signal. The first data signal and the second data signal have different potentials.

In the light emission stage, the light emission control sub-circuit 2 drives the light emitting device 3 to emit light in response to the first scan signal, the fifth scan signal, and the light emission driving voltage input into the sub-circuit 1S 300.

The functions of the light emission control sub-circuit 2 and the input sub-circuit 1 in the embodiment of the present disclosure are as described above, and the specific structures thereof may be selected and determined according to actual situations, which is not limited in the embodiment of the present disclosure.

In some embodiments, referring to fig. 3, the light emission control sub-circuit 2 includes a first transistor T1 and a driving transistor DT. A control electrode of the first transistor T1 is electrically connected to the first scan signal line S1, a second electrode of the first transistor T1 is electrically connected to the light emitting device 3, and a first electrode of the first transistor T1 is electrically connected to the second electrode of the driving transistor DT.

With reference to fig. 3, the light-emitting control sub-circuit 2 further includes a fifth transistor T5. A control electrode of the fifth transistor T5 is electrically connected to the fifth scan signal line S5, a first electrode of the fifth transistor T5 is electrically connected to the first power signal terminal VDD, and a second electrode of the fifth transistor T5 is electrically connected to the first electrode of the driving transistor DT.

With reference to fig. 3, the input sub-circuit 1 includes a second transistor T2, a third transistor T3, a fourth transistor T4, and a storage capacitor C. A control electrode of the second transistor T2 is electrically connected to the second scan signal line S2, a first electrode of the second transistor T2 is electrically connected to the data signal terminal Vdata, and a second electrode of the second transistor T2 is electrically connected to a first electrode of the first transistor T1, a first electrode of the third transistor T3, and a second electrode of the driving transistor DT, respectively. A control electrode of the third transistor T3 is electrically connected to the third scan signal line S3, and a second electrode of the third transistor T3 is electrically connected to the first electrode of the storage capacitor C, the control electrode of the driving transistor DT, and the second electrode of the fourth transistor T4, respectively. A gate of the fourth transistor T4 is electrically connected to the fourth scan signal line S4; a first pole of the fourth transistor T4 is electrically connected to the first pole of the driving transistor DT. The second pole of the storage capacitor C is electrically connected to the first power signal terminal VDD.

For convenience of description, the following embodiment will be described with the light emitting device 3 being an O L ED, wherein a first pole of the O L ED is electrically connected to the pixel circuit in the embodiment of the disclosure, and a second pole thereof is electrically connected to the second power signal terminal VSS.

In order to more clearly illustrate the driving process of the pixel circuit according to the embodiment of the present disclosure, the following description will take the pixel circuit shown in fig. 3 as an example.

Referring to fig. 5, the driving method of the pixel circuit includes S100 'to S300'.

S100', as shown in fig. 6, in the reset phase, the first scan signal controls the first transistor T1 to be turned on, the second scan signal controls the second transistor T2 to be turned on, and the third scan signal controls the third transistor T3 to be turned on. The data signal terminal Vdata provides a first data signal. The first data signal is transmitted to the light emitting device 3 through the second transistor T2 and the first transistor T1, resetting the light emitting device 3. The first data signal is transmitted to the storage capacitor C through the second transistor T2 and the third transistor T3. The storage capacitor C stores the first data signal.

Here, the first data signal stored in the storage capacitor C is configured to provide a control potential signal to the control electrode of the driving transistor DT to control the driving transistor to be turned on in the data writing phase.

S200', as shown in fig. 7, in the data writing phase, the second scan signal controls the second transistor T2 to be turned on, the fourth scan signal controls the fourth transistor T4 to be turned on, and the first data signal stored in the storage capacitor C controls the driving transistor DT to be turned on. The data signal terminal Vdata provides a second data signal. The input sub-circuit 1 stores the light emission driving voltage to the storage capacitor C according to the second data signal.

As can be seen from the above, the first electrode and the control electrode of the driving transistor DT are turned on through the fourth transistor T4 at this stage. The second data signal is denoted by vdata (h).

The input sub-circuit 1 stores the light emission driving voltage to the storage capacitor C according to the second data signal vdata (h), and is represented as: the second data signal vdata (h) is transmitted to the first pole of the storage capacitor C through the second transistor T2, the driving transistor DT and the fourth transistor T4, and pulls the initial potential of the first pole of the storage capacitor C, i.e., the first data signal, low or high. The difference between the potential up to the first pole of the storage capacitor C, i.e. the potential of the control pole of the driving transistor DT, and the potential of the second pole of the driving transistor DT is equal to the threshold voltage vth (DT) of the driving transistor DT. In this way, the threshold voltage vth (DT) of the driving transistor DT is written in the first electrode of the storage capacitor. The final potential of the first pole of the storage capacitor is stabilized at Vdata (H) + Vth (DT). This potential is also the above-mentioned light emission driving voltage.

S300', as shown in fig. 8, in the light emitting period T3, the fifth scan signal controls the fifth transistor T5 to be turned on, the light emission driving voltage stored in the storage capacitor C controls the driving transistor DT to be turned on, and the first scan signal controls the first transistor T1 to be turned on. The first power voltage signal supplied from the first power signal terminal VDD is transmitted to the light emitting device 3 through the fifth transistor T5, the driving transistor DT and the first transistor T1, and drives the light emitting device 3 to emit light.

In some embodiments, the control electrode of each transistor employed in the pixel circuit is a gate electrode of the transistor, the first electrode is one of a source electrode and a drain electrode of the transistor, and the second electrode is the other of the source electrode and the drain electrode of the transistor. Since the source and the drain of the transistor may be symmetrical in structure, the source and the drain thereof may not be different in structure, that is, the first and the second poles of the transistor in the embodiment of the present disclosure may not be different in structure.

In an example, the control electrode of each of the thin film transistors is a gate electrode, the first electrode is a source electrode, and the second electrode is a drain electrode. In addition, in the transistors other than the driving transistor DT, the control electrodes of the different transistors may be electrically connected to the different scanning signal lines, or may be electrically connected to the same scanning signal line.

It should be noted that the transistors (for example, the first transistor T1, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4, or the fifth transistor T5) included in the pixel circuit in some embodiments of the present disclosure may be N-type thin film transistors or P-type thin film transistors. The method can be selected and determined according to actual needs, and the embodiment of the disclosure does not limit the method.

In addition, in the transistors other than the driving transistor DT, the control electrodes of the different transistors may be electrically connected to the different scanning signal lines, or may be electrically connected to the same scanning signal line.

It will be readily appreciated that in the case of the pixel circuit described above, in which different types of transistors are used to perform the same function, the on or off state of the transistor corresponding to the connection location, and the transmission process of the relevant signal in the pixel circuit, can be kept unchanged. Only the timing of the scanning signal line corresponding to each transistor is adaptively adjusted. In some examples, in other transistors than the driving transistor DT, the control electrodes of different transistors are electrically connected to different scanning signal lines, i.e., each transistor is controlled by its independent scanning signal, for example, as shown in fig. 3.

For example, in the pixel circuit shown in fig. 3, the first transistor T1, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are all P-type thin film transistors.

The first transistor T1 is controlled by a first scan signal supplied from a first scan signal line S1, the second transistor T2 is controlled by a second scan signal supplied from a second scan signal line S2, the third transistor T3 is controlled by a third scan signal supplied from a third scan signal line S3, the fourth transistor T4 is controlled by a fourth scan signal supplied from a fourth scan signal line S4, and the fifth transistor T5 is controlled by a fifth scan signal supplied from a fifth scan signal line S5. Correspondingly, the timing of each scanning signal line in fig. 3 is shown in fig. 4.

In the reset phase t1, the first, second, and third scan signal lines S1, S2, and S3 provide low potential signals. The fourth scanning signal line S4 and the fifth signal line S5 supply high potential signals. In the data writing phase t2, the first scan signal line S1, the third scan signal line S3, and the fifth scan signal line S5 provide a high potential signal. The second scanning signal line S2 and the fourth scanning signal line S4 supply a low potential signal. In the light emitting period t3, the first scan signal line S1 and the fifth signal line S5 supply a low potential signal. The second scanning signal line S2, the third scanning signal line S3, and the fourth scanning signal line S4 supply high potential signals.

In other examples, some transistors are controlled by the same scanning signal in other transistors than the driving transistor DT, that is, the control electrodes of the plurality of transistors may be electrically connected to the same scanning signal line according to actual conditions. For example, as shown in fig. 9, 11 and 13, the control electrode of the first transistor T1 and the control electrode of the fourth transistor T4 are electrically connected to the same scanning signal line, and the second transistor T2 and the fifth transistor T5 are electrically connected to the same scanning signal line. That is, the first scanning signal line S1 and the fourth scanning signal line S4 are the same scanning signal line, i.e., the sixth scanning signal line S6. The second scanning signal line S2 and the fifth scanning signal line S5 are the same scanning signal line, i.e., the seventh scanning signal line S7.

For example, referring to fig. 9, the second transistor T2 and the fourth transistor T4 are N-type thin film transistors, and the first transistor T1, the third transistor T3, the driving transistor DT, and the fifth transistor T5 are P-type thin film transistors. Correspondingly, the timing of each scanning signal line in fig. 9 is shown in fig. 10. In the reset period t1, the third scan signal line S3 and the sixth scan signal line S6 supply a low potential signal, and the seventh scan signal line S7 supplies a high potential signal. In the data writing phase t2, please continue to refer to fig. 9 and 10, the third scan signal line S3, the sixth scan signal line S6 and the seventh scan signal line S7 all provide high level signals. In the light-emitting period t3, please continue to refer to fig. 9 and 10, the third scan signal line S3 provides a high signal. The sixth scanning signal line S6 and the seventh scanning signal line S7 supply low potential signals.

In addition, it is easily understood that the pixel circuit in this embodiment is made to be turned on or off in a time-sharing manner by combining the P-type thin film transistor and the N-type thin film transistor, so that the first transistor T1 and the fourth transistor T4 can be controlled by a scan signal provided by the same scan signal line; the second transistor T2 and the fifth transistor T5 can be turned on or off in a time-sharing manner by a scan signal supplied from the same scan signal line. In this way, the number of scanning signal lines in the pixel circuit can be reduced from five to three (the third scanning signal line S3, the sixth scanning signal line S6, and the seventh scanning signal line S7). The number of scanning signal lines in the pixel circuit is reduced, so that a plurality of signal lines electrically connected with the reset voltage signal end and the corresponding reset driving integrated circuits are correspondingly reduced, and the space occupancy rate is reduced. Therefore, the narrow frame design of the corresponding display device is facilitated.

For example, referring to fig. 11, the second transistor T2, the third transistor T3, the driving transistor DT, and the fourth transistor T4 are P-type thin film transistors, and the first transistor T1 and the fifth transistor T5 are N-type thin film transistors. Correspondingly, the timing of each scanning signal line in fig. 11 is shown in fig. 12. In the reset period t1, the third and seventh scan signal lines S3 and S7 supply a low potential signal, and the sixth scan signal line S6 supplies a high potential signal. In the data writing phase t2, the third scanning signal line S3 provides a high potential signal. The sixth scanning signal line S6 and the seventh scanning signal line S7 supply low potential signals. In the light-emitting period t3, please continue to refer to fig. 11 and 12, the third scanning signal line S3, the sixth scanning signal line S6 and the seventh scanning signal line S7 all provide high-level signals.

It can be seen that, as in the previous embodiment, the number of scanning signal lines can be reduced from five to three in this embodiment. Therefore, the same advantageous effects as those of the previous embodiment can be achieved.

In addition, the third transistor T3 and the fourth transistor T4 in this embodiment are both P-type thin film transistors, that is, the same type of thin film transistors. When the third transistor T3 and the fourth transistor T4 are turned off at the same time in the light emitting period T3, the scan signals applied to the control electrodes may be the same potential signal. In this way, it is possible to ensure that the potential signal at a position (for example, point a) between the two in the pixel circuit, that is, the potential signal applied to the control electrode of the driving transistor DT is stable. Therefore, the light-emitting device 3 has stable display brightness, and the display effect of the display substrate is effectively ensured.

In addition, the third transistor T3 and the fourth transistor T4 are of the same type, and can be simultaneously processed by an Aging (Aging) process, so that the stability of the performance of the third transistor T3 and the fourth transistor T4 is effectively improved, the stability of the potential of the control electrode of the driving transistor DT electrically connected with the third transistor T3 and the fourth transistor T4 is ensured, and the display effect of the light emitting device 3 and even the display substrate is ensured.

For example, referring to fig. 13, the second transistor T2, the third transistor T3, and the fourth transistor T4 are N-type thin film transistors, and the first transistor T1, the driving transistor DT, and the fifth transistor T5 are P-type thin film transistors. Correspondingly, the timing of each scanning signal line in fig. 13 is shown in fig. 14. In the reset period t1, referring to fig. 13 and 14, the third scan signal line S3 and the seventh scan signal line S7 provide high signals, and the sixth scan signal line S6 provides low signals. In the data writing phase t2, with continued reference to fig. 13 and 14, the third scan signal line S3 provides a low signal. The sixth scanning signal line S6 and the seventh scanning signal line S7 supply high potential signals. In the light-emitting period t3, please continue to refer to fig. 13 and 14, the third scanning signal line S3, the sixth scanning signal line S6 and the seventh scanning signal line S7 all provide low-level signals.

It can be seen that, as in the previous embodiment, the present embodiment can also reduce the number of the scanning signal lines from five to three, and the third transistor T3 and the fourth transistor T4 are the same type of thin film transistors. Therefore, the same advantageous effects as those of the previous embodiment can be achieved.

In addition, the first transistor T1 and the fifth transistor T5 in the pixel circuit of the present embodiment are P-type thin film transistors. In the light-emitting period t3, the scan signals provided by the sixth scan signal line S6 and the seventh scan signal line S7 are low-level signals. That is, the gate potential of the first transistor T1 and the gate potential of the fifth transistor T5 at this time are low potential signals. The potential signal provided by the first power signal terminal VDD is a high potential signal. That is, the source potential of the first transistor T1 and the source potential of the fifth transistor T5 are high potential signals. Thus, the potential difference Ugs (T1) between the gate and the source of the first transistor T1 and the potential difference Ugs (T5) between the gate and the source of the fifth transistor T5 are differences between the low potential signal and the high potential signal.

It is easily understood that if the first transistor T1 and the fifth transistor T5 are N-type thin film transistors, the scan signals provided by the sixth scan signal line S6 and the seventh scan signal line S7 correspond to a high potential signal during the light emitting period T3. That is, the source potential of the first transistor T1 and the gate potential of the fifth transistor T5 are high potential signals. Thus, the potential difference Ugs (T1) between the gate and the source of the first transistor T1 and the potential difference Ugs (T5) between the gate and the source of the fifth transistor T5 are differences between the high potential signal and the high potential signal.

Thus, even if Vth (T1) or Vth (T5) shifts to some extent (for example, due to manufacturing process reasons or aging of the transistor over a long period of time, the threshold voltage shifts), the first transistor T1 and the fifth transistor T5 can still be turned on. Thereby, the light emission control sub-circuit 2 is ensured to be turned on, and the light emitting device 3 is normally illuminated.

Note that each transistor in the pixel circuit according to the embodiment of the present disclosure may be a top gate thin film transistor or a bottom gate thin film transistor.

Illustratively, each transistor in the pixel circuit of the embodiment of the present disclosure is a top gate type thin film transistor. Fig. 15 is a schematic diagram of a layout structure of the pixel circuit shown in fig. 13. Fig. 16 is a schematic diagram of a process for fabricating the pixel circuit shown in fig. 13. And a corresponding insulating layer is also arranged between every two adjacent conductive layers. For example, a gate insulating layer provided between an active layer and a gate electrode in a transistor, and an interlayer insulating layer provided between the gate electrode and source and drain electrodes, and the like. In fig. 15, the contents of this portion are omitted, and only the conductive patterns are illustrated.

According to the layout design shown in fig. 16, the pixel circuit is fabricated as follows.

As shown in fig. 16 (a), a patterned semiconductor layer is formed on a substrate (not shown in the figure). The semiconductor layer is configured to form an active layer in each transistor (including the first transistor T1, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5).

As shown in fig. 16 (b), a patterned first conductive layer is formed on the side of the active layer away from the substrate. The first conductive layer is configured to form gates of transistors (including the first transistor T1, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5), and first electrodes of the third scan signal line S3, the sixth scan signal line S6, the seventh scan signal line S7, and the storage capacitor C.

Here, a gate insulating layer (not shown) is provided between the first conductive layer and the active layer.

As shown in fig. 16 (c), a patterned second conductive layer is formed on the side of the first conductive layer away from the substrate. The second conductive layer is configured to form a second pole of the storage capacitor C.

Here, a first interlayer insulating layer (not shown) is provided between the second conductive layer and the first conductive layer.

As shown in fig. 16 (d), a patterned third conductive layer is formed on the side of the second conductive layer remote from the substrate. The third conductive layer X is configured to form a source and a drain of each transistor (including the first transistor T1, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5), a data signal terminal Vdata, and a first power signal terminal VDD.

Here, a second interlayer insulating layer (not shown) is provided between the third conductive layer and the second conductive layer.

In fig. 16, the region O is a film layer region connected to the anode 12 in the pixel circuit.

In addition, the layout design manner of the pixel circuit shown in fig. 13 may be various, and this is not limited in the embodiment of the present disclosure. Fig. 16 is only one possible scenario among others.

In order to verify the driving performance of the pixel circuit of the embodiment of the present disclosure, the inventors conducted a simulation test. Fig. 17 to 20 show the correlation data obtained after the simulation test.

Fig. 17 is a diagram illustrating the effect of signal output after an analog simulation test of the pixel circuit shown in fig. 13, in a light-emitting driving period, the changes of the light-emitting current I (O L ED) of the point a potential V (a), the point B potential V (B), the point O L ED and the anode potential V (O L ED) of the point O L ED in each stage (including the reset stage t1, the data write stage t2 and the light-emitting stage t3) are shown.

Please refer to fig. 13, in the circuit provided in the embodiment of the present disclosure, the points a and B do not represent actually existing components, but represent junctions of related electrical connections in the circuit diagram, that is, the nodes are equivalent nodes of the junctions of the related electrical connections in the circuit diagram. For example, the point a is a junction point where the second pole of the third transistor T3, the control pole of the driving transistor DT, the second pole of the fourth transistor T4, and the first pole of the storage capacitor C are joined. Point B is a junction point where the second pole of the fifth transistor T5, the first pole of the fourth transistor and the first pole of the driving transistor DT are joined.

It can be seen from the figure that, when the second data signals Vdata (h) provided by the data signal terminals Vdata are the same, for example, Vdata (h) is 3.5V, and the threshold voltage vth (DT) of the driving transistor DT is different values (for example, 2V, 2.5V, and 3V), the emission current I (O L ED) of the O L ED is substantially the same and hardly influenced by the threshold voltage vth (DT) of the driving transistor DT, that is, the pixel circuit can effectively compensate the vth voltage vth (DT) of the driving transistor DT, so that the emission current I (O L ED) of the O L ED is not influenced by (DT), and thus the display effect of the display device can be effectively ensured.

It can be seen from the figure that, under the condition that the threshold voltage vth (DT) of the driving transistor DT is the same (for example, 2V), the light emitting current I (O L ED) of the O L ED is linearly related to the second data signal vdata (h), that is, the second data signal vdata (h) can accurately control the magnitude of the light emitting current I (O L ED) of the O L ED, and further control the luminance of the O L ED, and thus the display luminance of the corresponding display device.

Fig. 19 is a schematic diagram of the error analysis of the emission current I (O L ED) of the O L ED obtained after the error analysis is performed according to the data in fig. 18, and it can be seen from the diagram that, in the same range of the second data signal vdata (h) (e.g., 3V to 3.5V, 3.5V to 4V, 4V to 4.5V, or 4.5V to 5V), when the threshold voltages vth (DT) of the driving transistors DT are different (e.g., 2V, 2.5V, and 3V, respectively), the error of the emission current I (O L ED) of the O L ED is in the range of 0.30% to 0.75%.

This further illustrates that the pixel circuit shown in fig. 13 can effectively compensate the threshold voltage vth (DT) of the driving transistor DT, and control the influence of vth (DT) on the light emitting current I (O L ED) of O L ED within a small range, so as to effectively control the display brightness of O L ED, thereby ensuring the display effect of the corresponding display device.

Fig. 20 is a graph showing the relationship between the emission current I (O L ED) of O L ED and the threshold voltage vth (DT) of the driving transistor DT in the pixel circuit shown in fig. 13, in which the inventor conducted simulation tests on the display process of the pixel circuit when the second data signal vdata (h) is different in value, to obtain the relationship curve shown in fig. 20, it can be seen from the graph that, when the threshold voltage vth (DT) of the driving transistor DT is constant and the second data signal vdata (h) is different, the emission current I (O L ED) of O L ED is clearly regularly related to the second data signal vdata (h), that is, the emission current I (O L ED) of O L ED decreases as the second data signal vdata (h) increases.

As can be seen from this figure, when the threshold voltage vth (DT) of the driving transistor DT is different in a case where the second data signal vdata (h) is constant, the emission current I (O L ED) of O L ED is kept almost constant.

Therefore, fig. 20 again illustrates that the pixel circuit shown in fig. 20 can effectively eliminate the influence of the threshold voltage vth (DT) shift of the driving transistor DT on the O L ED light-emitting current I (O L ED), so that the light-emitting current I (O L ED) of the O L ED is controlled by the second data signal vdata (h), thereby effectively ensuring the display effect of the corresponding display device.

In summary, the pixel circuit of the embodiment of the disclosure can ensure the display effect of the display device under the condition of effectively reducing power consumption.

The embodiment of the disclosure also provides a display substrate. The display substrate includes pixel circuits as described in some embodiments above.

Here, the display substrate may be an O L ED display substrate, a Q L ED display substrate, a L ED display substrate, or the like.

In general, referring to fig. 21, the display substrate includes a substrate 4 and a plurality of pixels PX disposed on the substrate 4.

Here, the type of the substrate 4 includes a plurality of types, and the arrangement may be selected according to actual needs, which is not limited by the embodiment of the present disclosure. Illustratively, the substrate 4 comprises a rigid substrate, such as a glass substrate. Illustratively, the substrate 4 includes a flexible substrate such as a PET (Polyethylene terephthalate) substrate, a PEN (Polyethylene terephthalate) substrate, or a PI (Polyimide) substrate. The substrate 4 includes a display area AA and a non-display area BB located at least one side of the display area AA.

The plurality of pixels PX are arranged in an array with the display area AA of the substrate 4. Each pixel PX includes a pixel circuit and a light emitting device 3 as described in some embodiments above.

The embodiment of the disclosure also provides a display device. The display device comprises the display substrate according to some embodiments.

Here, the display device package may be an O L ED display substrate, a Q L ED display substrate, or a L ED display substrate, for example, the display device is specifically any product or component with a display function, such as electronic paper, a television, a monitor, a notebook computer, a tablet computer, a digital photo frame, a mobile phone, and a navigator.

The beneficial effects that can be achieved by the display device in the embodiments of the present disclosure are the same as those that can be achieved by the display substrate in some embodiments described above, and are not described herein again.

In the foregoing description of embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present disclosure should be covered within the scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A pixel circuit comprises an input sub-circuit and a light-emitting control sub-circuit; wherein the content of the first and second substances,

the input sub-circuit is electrically connected with the data signal end and the light-emitting control sub-circuit respectively; the input sub-circuit is configured to: in a reset phase, responding to a second scanning signal and a third scanning signal, transmitting a first data signal provided by the data signal terminal to the light-emitting device through the light-emitting control sub-circuit so as to reset the light-emitting device and store the first data signal; in the data writing phase, responding to a second scanning signal and a fourth scanning signal, and storing a light-emitting driving voltage according to a second data signal provided by the data signal end with the assistance of the light-emitting control sub-circuit; and in the light-emitting stage, the light-emitting control sub-circuit is controlled to be conducted in an auxiliary mode according to the light-emitting driving voltage; the data signal provided by the data signal terminal is an alternating voltage signal, and the potentials of the first data signal and the second data signal are different;

the light emission control sub-circuit is also electrically connected with the light emitting device and configured to: transmitting the first data signal in the input sub-circuit to the light emitting device in response to a first scan signal in a reset phase; in a data writing phase, responding to the first data signal, and assisting the input sub-circuit to be conducted; in the light emitting stage, the light emitting device is driven to emit light in response to the first scan signal, the fifth scan signal, and the light emission driving voltage.

2. The pixel circuit according to claim 1,

the light emission control sub-circuit includes a first transistor and a driving transistor; wherein a control electrode of the first transistor is electrically connected to a first scan signal line, a second electrode of the first transistor is electrically connected to the light emitting device, and a first electrode of the first transistor is electrically connected to the second electrode of the driving transistor;

the input sub-circuit comprises a second transistor, a third transistor, a fourth transistor and a storage capacitor; wherein the content of the first and second substances,

a control electrode of the second transistor is electrically connected with a second scanning signal line, a first electrode of the second transistor is electrically connected with the data signal end, and a second electrode of the second transistor is electrically connected with a first electrode of the first transistor, a first electrode of the third transistor and a second electrode of the driving transistor respectively;

a control electrode of the third transistor is electrically connected to a third scanning signal line, and a second electrode of the third transistor is electrically connected to a first electrode of the storage capacitor, a control electrode of the driving transistor, and a second electrode of the fourth transistor, respectively;

a control electrode of the fourth transistor is electrically connected with a fourth scanning signal line; a first pole of the fourth transistor is electrically connected to the first pole of the driving transistor;

and the second pole of the storage capacitor is electrically connected with the first power supply signal end.

3. The pixel circuit according to claim 2,

the light emission control sub-circuit further includes the fifth transistor; a control electrode of the fifth transistor is electrically connected to a fifth scanning signal line, a first electrode of the fifth transistor is electrically connected to the first power signal terminal, and a second electrode of the fifth transistor is electrically connected to the first electrode of the driving transistor.

4. The pixel circuit according to any one of claims 1 to 3,

the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the driving transistor are all P-type thin film transistors.

5. The pixel circuit according to any one of claims 1 to 3,

the second transistor and the fourth transistor are N-type thin film transistors, and the first transistor, the third transistor, the driving transistor, and the fifth transistor are P-type thin film transistors;

6. The pixel circuit according to any one of claims 1 to 3,

the second transistor, the third transistor, the driving transistor and the fourth transistor are P-type thin film transistors, and the first transistor and the fifth transistor are N-type thin film transistors;

7. The pixel circuit according to any one of claims 1 to 3,

the second transistor, the third transistor and the fourth transistor are N-type thin film transistors, and the first transistor, the driving transistor and the fifth transistor are P-type thin film transistors;

8. A driving method of a pixel circuit, applied to the pixel circuit according to any one of claims 1 to 7; the method is characterized in that one light-emitting drive period comprises a reset stage, a data writing stage and a light-emitting stage;

the driving method includes:

in a reset phase, the input sub-circuit transmits a first data signal provided by a data signal terminal to the light emitting device through the light emission control sub-circuit in response to the second scan signal and the third scan signal to reset the light emitting device and store the first data signal;

in a data writing phase, the light-emitting control sub-circuit responds to the first data signal to assist the input sub-circuit to be conducted; the input sub-circuit responds to a second scanning signal and a fourth scanning signal, and stores a light-emitting driving voltage according to a second data signal provided by the data signal terminal with the assistance of the light-emitting control sub-circuit; the data signal provided by the data signal end is an alternating voltage signal; the first data signal and the second data signal have different potentials;

in the light emission phase, the light emission control sub-circuit drives the light emitting device to emit light in response to the first scan signal, the fifth scan signal, and the light emission driving voltage in the input sub-circuit.

9. The driving method of the pixel circuit according to claim 8, wherein the emission control sub-circuit includes a first transistor, a driving transistor, and a fifth transistor; the input sub-circuit comprises a second transistor, a third transistor, a fourth transistor and a storage capacitor;

the driving method further includes:

in a reset stage, a first scanning signal controls the first transistor to be conducted, a second scanning signal controls the second transistor to be conducted, and a third scanning signal controls the third transistor to be conducted; the data signal terminal provides the first data signal; the first data signal is transmitted to the light emitting device through the second transistor and the first transistor to reset the light emitting device; the first data signal is transmitted to the storage capacitor through the second transistor and the third transistor; the storage capacitor stores the first data signal;

in a data writing stage, a second scanning signal controls the second transistor to be conducted, the first data signal stored in the storage capacitor controls the driving transistor to be conducted, and a fourth scanning signal controls the fourth transistor to be conducted; the data signal terminal provides the second data signal; the input sub-circuit stores the light-emitting driving voltage to the storage capacitor according to the second data signal;

in a light emitting stage, a fifth scanning signal controls the fifth transistor to be conducted, the light emitting driving voltage stored in the storage capacitor controls the driving transistor to be conducted, and a first scanning signal controls the first transistor to be conducted; and a first power supply voltage signal provided by a first power supply signal end is transmitted to the light-emitting device through the fifth transistor, the driving transistor and the first transistor to drive the light-emitting device to emit light.

10. A display substrate comprising the pixel circuit according to any one of claims 1 to 7.