CN111463261A - Nitride schottky diode and method of manufacturing the same - Google Patents
Nitride schottky diode and method of manufacturing the same Download PDFInfo
- Publication number
- CN111463261A CN111463261A CN202010223103.XA CN202010223103A CN111463261A CN 111463261 A CN111463261 A CN 111463261A CN 202010223103 A CN202010223103 A CN 202010223103A CN 111463261 A CN111463261 A CN 111463261A
- Authority
- CN
- China
- Prior art keywords
- nitride
- layer
- doping concentration
- schottky diode
- hard mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 150000004767 nitrides Chemical class 0.000 title claims abstract description 77
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 238000000034 method Methods 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 229910002601 GaN Inorganic materials 0.000 claims description 34
- 239000013078 crystal Substances 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 17
- 229920002120 photoresistant polymer Polymers 0.000 claims description 15
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical group [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 12
- 229910052782 aluminium Inorganic materials 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 10
- 229910052759 nickel Inorganic materials 0.000 claims description 10
- 229910052719 titanium Inorganic materials 0.000 claims description 10
- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 239000000956 alloy Substances 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 5
- 229910052804 chromium Inorganic materials 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 229910052763 palladium Inorganic materials 0.000 claims description 4
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000000463 material Substances 0.000 abstract description 10
- 235000012431 wafers Nutrition 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 5
- -1 gallium nitride compound Chemical class 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000013067 intermediate product Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
Abstract
The embodiment of the invention relates to the technical field of nitride Schottky diodes, and discloses a nitride Schottky diode and a manufacturing method thereof, wherein the nitride Schottky diode comprises the following components: a substrate at the bottom; a buffer layer over the substrate; the heavily doped N-type nitride layer is positioned above the buffer layer; the cathode is in a polygonal structure, and the N-type nitride with the light doping concentration is positioned in the polygonal structure; and the anode is positioned on the surface of the N-type nitride layer with the light doping concentration. Under the condition of not increasing the surface area, the higher pressure-resistant grade can be maintained only by increasing the thickness of the material in the vertical direction, and the fixation of the surface area is also beneficial to improving the utilization rate of the surface material; the cathode and the anode are arranged at the same side of the Schottky diode, so that the Schottky diode is more convenient and flexible to install and use; the planar process has simple flow, can be compatible with various substrate materials, and is suitable for the growth of large-size wafers.
Description
Technical Field
The embodiment of the invention relates to the technical field of nitride diodes, in particular to a nitride Schottky diode and a manufacturing method thereof.
Background
The device structure of the gan schottky diode (GaNSBD) has two kinds of structures, i.e. a full vertical structure and a lateral structure, as shown in fig. 1 and fig. 2, and the inventor finds that at least the following problems exist in the prior art: although the vertical GaNSBD device has high withstand voltage, the GaN single crystal is selected as the substrate, so that the production cost is high; however, although the turn-on voltage of the horizontal heterostructure gassbd device is low, if a higher breakdown voltage is to be achieved, the required device size is too large, and the requirement for the use space is high.
Disclosure of Invention
An object of the embodiments of the present invention is to provide a nitride schottky diode and a method for manufacturing the same, which can effectively reduce the cost of the GaNSBD while ensuring high withstand voltage, and which is small in size and easy to integrate.
In order to solve the above technical problem, an embodiment of the present invention provides a nitride schottky diode, including:
a substrate at the bottom;
a buffer layer over the substrate;
the heavily doped N-type nitride layer is positioned above the buffer layer;
the cathode is in a polygonal structure, and the N-type nitride with the light doping concentration is positioned in the polygonal structure;
and the anode is positioned on the surface of the N-type nitride layer with the light doping concentration.
The embodiment of the invention also provides a method for manufacturing the nitride Schottky diode, which comprises the following steps:
growing a gallium nitride compound buffer layer on a substrate;
growing a single crystal nitride layer on the gallium nitride compound buffer layer, wherein the single crystal nitride layer is sequentially an N-type nitride with heavy doping concentration and an N-type nitride with light doping concentration from bottom to top;
depositing a first hard mask layer on the N-type nitride with the light doping concentration;
forming photoresist on the first hard mask layer, forming a groove pattern, and baking the photoresist;
etching the hard mask layer which is not blocked, and transferring the groove pattern to the hard mask layer;
removing the residual photoresist and leaving the hard mask layer with the groove pattern;
etching the single crystal nitride layer and the hard mask layer, and transferring the groove pattern to the single crystal nitride layer;
removing the residual hard mask from the surface of the single crystal nitride layer;
forming a front contact anode on the surface of the N-type nitride layer with the light doping concentration;
and forming a front contact cathode on the surface of the N-type nitride layer with the heavy doping concentration, wherein the cathode is of a polygonal structure, and the N-type nitride with the light doping concentration is positioned in the polygonal structure.
Compared with the prior art, the embodiment of the invention has obvious advantages in device structure: compared with a horizontal device, the high pressure-resistant grade can be maintained by only increasing the thickness of the material in the vertical direction under the condition of not increasing the surface area, and the utilization rate of the surface material can be improved by the fixing liquid in the surface area; compared with the existing vertical structure device, the cathode and the anode are arranged on the same side of the Schottky diode, so that the Schottky diode is more convenient and flexible to install and use; the advantages of the process flow are as follows: the plane process has uncomplicated flow; the cost advantage is as follows: can be compatible with various substrate materials and is suitable for the growth of large-size wafers.
Further optionally, the nitride is gallium nitride.
Further optionally, the cathode is made of alloy, the metal components are Ti, Al, Ni and Au, wherein the metal Ti is in direct contact with the lightly doped N-type gallium nitride, and the metal Ti, Al, Ni and Au are sequentially from the surface to the outside.
Further optionally, the anode is made of an alloy of one or more elements of Al, Ag, Pd, Pt, Ti, Ni, Au, Cu, and Cr.
Further optionally, the thickness of the buffer layer is selected between 1um and 5 um.
Further optionally, the thickness of the single crystal gallium nitride layer is selected from 0.1um to 10 um.
Further optionally, the anode thickness is selected between 0.1um-5 um.
Further optionally, the cathode thickness is selected between 0.1um-5 um.
Further optionally, the polygonal structure is a hexagon.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
Fig. 1 and 2 are schematic structural diagrams of two types of gallium nitride in the related art;
FIG. 3 is a schematic diagram of a nitride Schottky diode structure according to an embodiment of the present invention;
FIG. 4 is a top view of the structure shown in FIG. 3;
fig. 5 is a schematic diagram of the operating principle of the nitride schottky diode shown in fig. 3;
FIG. 6 is a schematic diagram showing the relationship between current and voltage when the nitride Schottky diode shown in FIG. 3 is in operation;
fig. 7 is a schematic view illustrating a manufacturing process of a nitride schottky diode according to an embodiment of the present invention;
fig. 8-14 are schematic diagrams of intermediate product structures in steps of the process shown in fig. 7.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that numerous technical details are set forth in order to provide a better understanding of the present application in various embodiments of the present invention. However, the technical solution claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments. The following embodiments are divided for convenience of description, and should not constitute any limitation to the specific implementation manner of the present invention, and the embodiments may be mutually incorporated and referred to without contradiction.
A first embodiment of the present invention relates to a nitride schottky diode. As shown in fig. 3, the core structure of the present embodiment is as follows:
the method comprises the following steps:
a substrate 5 at the bottom;
a buffer layer 4 over the substrate 5;
the heavily doped N-type nitride layer 3 is positioned on the buffer layer 4;
the cathode 6 and the N-type nitride 2 with light doping concentration are positioned on the N-type nitride layer 3 with heavy doping concentration, the cathode 6 is in a polygonal structure, and the N-type nitride 2 with light doping concentration is positioned in the polygonal structure of the cathode 6;
and the anode 1 is positioned on the surface of the N-type nitride layer 2 with light doping concentration.
In some alternative embodiments, the nitride may be gallium nitride.
In some alternative embodiments, the cathode 6 is made of alloy, and the metal components are Ti, Al, Ni, and Au, wherein the metal Ti is in direct contact with the lightly doped N-type gallium nitride, and from the surface to the outside, the metal Ti, Al, Ni, and Au are in sequence.
In some alternative embodiments, the anode 1 is made of an alloy of one or more elements selected from Al, Ag, Pd, Pt, Ti, Ni, Au, Cu, and Cr.
In alternative embodiments, the buffer layer 4 has a thickness selected between 1um and 5 um.
In some alternative embodiments, the thickness of the single-crystal gallium nitride layer, i.e. the heavily doped N-type nitride layer 3 and the lightly doped N-type nitride layer 2, is selected between 0.1um and 10 um.
In some alternative embodiments, the anode 1 thickness is selected between 0.1um and 5 um.
In alternative embodiments, the cathode 6 has a thickness selected between 0.1um and 5 um.
In some alternative embodiments, the polygonal structure is hexagonal.
Compared with the prior art, the embodiment comprises the following steps: a substrate at the bottom, a buffer layer on the substrate, N on the buffer layer+-a GaN layer on the N+-N on GaN layer--a GaN layer on the N--an anode on the surface of the GaN layer, located at the N+Cathode with polygonal GaN layer surface, N+-GaN is located within the polygonal cathode. The advantages of the device structure are as follows: compared with a horizontal device, the semi-vertical device can maintain higher pressure-resistant grade by only increasing the thickness of the material in the vertical direction under the condition of not increasing the surface area, and the fixing liquid of the surface area is favorable for improving the utilization rate of the surface material; the advantages of the process flow are as follows: the plane process and the flow are not complex. The cost advantage is as follows: the hexagonal device can be compatible with various substrate materials, is suitable for large-size wafer growth, fully considers the anisotropic crystal structure of gallium nitride in the hexagonal device shape, can reduce reverse leakage current, and improves the reverse breakdown voltage of the device.
For the reader's understanding of the nitride schottky diode, the following description is provided for its operation:
referring to fig. 4, when forward biased, the anode 1 is connected to the positive electrode of the power supply, and the cathode 6 is connected to the negative electrode of the power supply, so that current flows through the anode and the lightly doped GaN layer 2, the heavily doped GaN layer 3, and flows to the cathode 6. Wherein the direction of current flow through layer 2 is parallel to the substrate (i.e., the growth direction of the GaN crystal), and the direction of current flow through layer 3 is perpendicular to the growth direction of the GaN crystal. The current and forward voltage relationships satisfy the relationship of the first quadrant in the coordinate system shown in fig. 5. When reverse biased, the current flows in the opposite direction to that in the forward direction, and the reverse current and reverse voltage relationship satisfies that shown in the third quadrant of fig. 5.
The implementation details of the gan schottky diode according to the present embodiment are described in detail below, and the following description is only provided for the convenience of understanding and is not necessary for implementing the present embodiment.
A third embodiment of the present invention relates to a method for manufacturing a nitride schottky diode, as shown in fig. 7, including:
701. growing a nitride buffer layer on a substrate;
in some embodiments, a typical metalorganic chemical vapor deposition (MOCVD) method may be used to grow a buffer layer 4 (typically 1um-5um) of gallium nitride compound on the substrate, see FIG. 8.
702. Growing a monocrystalline nitride layer on the nitride buffer layer, wherein the monocrystalline nitride layer is sequentially an N-type nitride with heavy doping concentration and an N-type nitride with light doping concentration from bottom to top;
in some embodiments, a typical Metal Organic Chemical Vapor Deposition (MOCVD) method can be used to grow a single crystal GaN layer (typically 0.1um to 10um) on the GaN compound buffer layer and form n-GaN by n-type doping at a certain concentration. As shown in fig. 8, 2 is n-type GaN with a lower doping concentration, and 3 is n-type GaN with a higher doping concentration.
703. Depositing a first hard mask layer on the N-type nitride with the light doping concentration;
in some embodiments, as shown in FIG. 9, a first hard mask layer 7 may be deposited on 2 using a conventional deposition process.
The hard mask is made of hard materials, such as silicon nitride, silicon oxynitride, silicon carbide, silicon oxide, metal and the like.
704. Forming photoresist on the first hard mask layer, forming a groove pattern, and baking the photoresist;
in some embodiments, as shown in fig. 10, a photoresist 8 may be formed on the first hard mask layer 7 by a spin-on or spray-on process, and a trench pattern may be formed using a well-established photolithography process. And baking the photoresist to improve the corrosion resistance of the photoresist.
705. Etching the hard mask layer which is not blocked, and transferring the groove pattern to the hard mask layer;
with the photoresist as a barrier layer, in some embodiments, as shown in fig. 11, the unblocked hard mask layer may be etched by using F-based gas using a conventional etching method, so as to transfer the trench pattern to the hard mask layer.
706. Removing the residual photoresist and leaving the hard mask layer with the groove pattern;
in some embodiments, as shown in fig. 12, a conventional photoresist removal process may be used to remove the remaining photoresist, leaving the hard mask layer with a trench pattern.
707. Etching the hard mask layer, transferring the groove pattern to the single crystal nitride layer, and removing the residual hard mask from the surface of the single crystal nitride layer;
in some embodiments, the trench pattern may be transferred to a GaN sample using an ICP etch process to simultaneously etch the GaN and hard mask layers, as shown in fig. 13. The remaining hard mask is then removed from the GaN surface.
708. Forming a front contact anode on the surface of the N-type nitride layer with the light doping concentration;
in some embodiments, as shown in fig. 14, the front contact anode 1 is formed on the surface of the GaN layer 2 by a typical photolithography process, a metal process (any one of sputtering, evaporation, electroplating and deposition), and an annealing process. The electrode metal is composed of an alloy of one or more elements selected from Al, Ag, Pd, Pt, Ti, Ni, Au, Cu and Cr. The thickness is about 0.1um-5 um.
709. And forming a front contact cathode on the surface of the N-type nitride layer with the heavy doping concentration, wherein the cathode is of a polygonal structure, and the N-type nitride with the light doping concentration is positioned in the polygonal structure.
In some embodiments, as shown in fig. 1, the front contact cathode electrode 6 is formed on the surface of the GaN layer 3 by a typical photolithography process, a metal process (any one of sputtering, evaporation, electroplating, and deposition), and an annealing process. The electrode metal is made of a Ti/Al/Ni/Au alloy. The thickness is about 0.1um-5 um.
The steps of the above methods are divided for clarity, and the implementation may be combined into one step or split some steps, and the steps are divided into multiple steps, so long as the same logical relationship is included, which are all within the protection scope of the present patent; it is within the scope of the patent to add insignificant modifications to the algorithms or processes or to introduce insignificant design changes to the core design without changing the algorithms or processes.
It should be understood that this embodiment is a method example corresponding to the first embodiment, and may be implemented in cooperation with the first embodiment. The related technical details mentioned in the first embodiment are still valid in this embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related-art details mentioned in the present embodiment can also be applied to the first embodiment.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples for carrying out the invention, and that various changes in form and details may be made therein without departing from the spirit and scope of the invention in practice.
Claims (10)
1. A nitride schottky diode, comprising:
a substrate at the bottom;
a buffer layer over the substrate;
the heavily doped N-type nitride layer is positioned above the buffer layer;
the cathode is in a polygonal structure, and the N-type nitride with the light doping concentration is positioned in the polygonal structure;
and the anode is positioned on the surface of the N-type nitride layer with the light doping concentration.
2. The nitride schottky diode of claim 1, wherein the nitride is gallium nitride.
3. A nitride schottky diode according to claim 1 or 2, wherein the cathode is made of alloy, and the metal components are Ti, Al, Ni and Au, wherein the metal Ti is in direct contact with the lightly doped N-type gallium nitride, and the metal Ti, Al, Ni and Au are sequentially arranged from the surface to the outside.
4. A nitride schottky diode according to claim 1 or 2, characterized in that the anode is made of an alloy of one or more elements of Al, Ag, Pd, Pt, Ti, Ni, Au, Cu, Cr.
5. The method according to claim 1 or 2, wherein the buffer layer has a thickness selected between 1um and 5 um.
6. A method according to claim 1 or 2, wherein the thickness of the single crystal gallium nitride layer is selected between 0.1um and 10 um.
7. The method according to claim 1 or 2, wherein the anodic metal thickness is chosen between 0.1-5 um.
8. The method according to claim 1 or 2, wherein the cathode metal thickness is selected between 0.1um and 5 um.
9. The method according to claim 1 or 2, wherein the polygonal structure is hexagonal.
10. A method for manufacturing a nitride Schottky diode is characterized by comprising the following steps:
growing a nitride buffer layer on a substrate;
growing a single crystal nitride layer on the nitride buffer layer, wherein the single crystal nitride layer is sequentially an N-type nitride with heavy doping concentration and an N-type nitride with light doping concentration from bottom to top;
depositing a first hard mask layer on the N-type nitride with the light doping concentration;
forming photoresist on the first hard mask layer, forming a groove pattern, and baking the photoresist;
etching the hard mask layer which is not blocked, and transferring the groove pattern to the hard mask layer;
removing the residual photoresist and leaving the hard mask layer with the groove pattern;
etching the single crystal nitride layer and the hard mask layer, and transferring the groove pattern to the single crystal nitride layer;
removing the residual hard mask from the surface of the single crystal nitride layer;
forming a front contact anode on the surface of the N-type nitride layer with the light doping concentration;
and forming a front contact cathode on the surface of the N-type nitride layer with the heavy doping concentration, wherein the cathode is of a polygonal structure, and the N-type nitride with the light doping concentration is positioned in the polygonal structure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010223103.XA CN111463261A (en) | 2020-03-26 | 2020-03-26 | Nitride schottky diode and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010223103.XA CN111463261A (en) | 2020-03-26 | 2020-03-26 | Nitride schottky diode and method of manufacturing the same |
Publications (1)
Publication Number | Publication Date |
---|---|
CN111463261A true CN111463261A (en) | 2020-07-28 |
Family
ID=71678996
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010223103.XA Pending CN111463261A (en) | 2020-03-26 | 2020-03-26 | Nitride schottky diode and method of manufacturing the same |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN111463261A (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101222015A (en) * | 2008-01-19 | 2008-07-16 | 鹤山丽得电子实业有限公司 | Light emitting diode, packaging structure with the same and its manufacturing method |
US20130240919A1 (en) * | 2010-11-03 | 2013-09-19 | Verticle, Inc. | Semiconductor device and a manufacturing method thereof |
CN103400866A (en) * | 2013-07-31 | 2013-11-20 | 中国电子科技集团公司第十三研究所 | GaN Schottky diode based on modulation doping |
CN108695395A (en) * | 2017-04-11 | 2018-10-23 | 三星电子株式会社 | Schottky diode and integrated circuit including it |
CN109698248A (en) * | 2018-12-27 | 2019-04-30 | 中国科学院长春光学精密机械与物理研究所 | Enhance the production method of the silicon detector array device of blue light efficiency |
-
2020
- 2020-03-26 CN CN202010223103.XA patent/CN111463261A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101222015A (en) * | 2008-01-19 | 2008-07-16 | 鹤山丽得电子实业有限公司 | Light emitting diode, packaging structure with the same and its manufacturing method |
US20130240919A1 (en) * | 2010-11-03 | 2013-09-19 | Verticle, Inc. | Semiconductor device and a manufacturing method thereof |
CN103400866A (en) * | 2013-07-31 | 2013-11-20 | 中国电子科技集团公司第十三研究所 | GaN Schottky diode based on modulation doping |
CN108695395A (en) * | 2017-04-11 | 2018-10-23 | 三星电子株式会社 | Schottky diode and integrated circuit including it |
CN109698248A (en) * | 2018-12-27 | 2019-04-30 | 中国科学院长春光学精密机械与物理研究所 | Enhance the production method of the silicon detector array device of blue light efficiency |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR20120005372A (en) | Schottky diode with combined field plate and guard ring | |
US20090224354A1 (en) | Junction barrier schottky diode with submicron channels | |
EP2920817B1 (en) | Gan-based schottky diode having partially recessed anode and method of manufacturing the same | |
CN105470294A (en) | Vertical gallium nitride power switch device and manufacturing method therefor | |
CN109755325A (en) | A kind of novel double-groove type metal oxide semiconductor barrier Schottky diode structure and implementation method | |
CN1971943A (en) | Self-supporting SiC based GaN apparatus and its manufacturing method | |
CN114823925A (en) | P-type island and super junction structure-based hybrid PIN Schottky diode and preparation method thereof | |
CN106298977A (en) | Diode anode structure, longitudinal diode and transverse diode | |
CN109461767A (en) | A kind of super-junction structure and preparation method thereof | |
CN211017091U (en) | Vertical GaN-based groove junction barrier Schottky diode | |
CN211045445U (en) | Vertical conduction gallium nitride power diode | |
CN111463261A (en) | Nitride schottky diode and method of manufacturing the same | |
CN110931571A (en) | Vertical GaN-based groove junction barrier Schottky diode and manufacturing method thereof | |
CN103441152A (en) | Trench MOS barrier Schottky diode and manufacturing method | |
US20210376067A1 (en) | Fabrication of lateral superjunction devices using selective epitaxy | |
CN205231071U (en) | Perpendicular type gallium nitride power switch device | |
CN211295112U (en) | Gallium nitride-based Schottky diode | |
CN113964181A (en) | PN junction base electrode coupled gallium nitride Schottky diode and preparation method thereof | |
CN109326522B (en) | Preparation method of diamond heterojunction diode device | |
CN111785785A (en) | SBD device structure and preparation method thereof | |
CN110676307B (en) | Preparation method of Schottky diode | |
CN213958964U (en) | Transverse conduction type GaN mixed pn Schottky power diode | |
CN215527733U (en) | Longitudinal conduction type GaN power diode | |
US20230420577A1 (en) | Semiconductor device with selectively grown field oxide layer in edge termination region | |
KR102591151B1 (en) | Method of manufacturing a non emitting iii-nitride semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200728 |