CN111462804A - Programming method and programming device of memory - Google Patents
Programming method and programming device of memory Download PDFInfo
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- CN111462804A CN111462804A CN202010231175.9A CN202010231175A CN111462804A CN 111462804 A CN111462804 A CN 111462804A CN 202010231175 A CN202010231175 A CN 202010231175A CN 111462804 A CN111462804 A CN 111462804A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
Abstract
The invention provides a programming method and a programming device of a memory. The programming method comprises the following steps: acquiring a programming temperature of a storage unit of a memory; and under the condition that the programming temperature is lower than the preset temperature, programming the memory cell by adopting the gradually increased programming voltage until the memory cell meets the preset condition, wherein the difference value of the programming voltages of two adjacent times is smaller than the preset difference value. The invention solves the technical problems that the threshold voltage distribution of the memory cell is widened, the distribution of the whole programming state is widened, the reading window between states is reduced, and reading errors are easily caused.
Description
Technical Field
The present invention relates to the field of memory device technology, and in particular, to a programming method and a programming apparatus for a memory.
Background
Three-dimensional NAND memory structures have become one of the mainstream memory structures for successful commercialization due to their high memory density, mature fabrication process. As the application field expands, the reliability of the three-dimensional NAND at different temperatures becomes an important product verification item.
After each memory cell of the memory is programmed, the threshold voltage of each memory cell is changed, thereby realizing information storage. The general programming-testing method for the memory cell is as follows: programming at low temperature and reading at high temperature; high temperature programming, low temperature reading. However, at a lower programming temperature, the threshold voltage distribution of the entire programmed state is wide, and when a read operation is performed at a high temperature, characteristics of different memory cells are different, the threshold voltage of the memory cell drifts, the threshold voltage distribution widens, the distribution of the entire programmed state widens, and the read window between states becomes small, which easily causes a read error.
Disclosure of Invention
The invention aims to provide a programming method and a programming device of a memory, which aim to solve the technical problems that the threshold voltage distribution of a memory cell is widened, the distribution of the whole programming state is widened, the reading window between states is reduced, and reading errors are easily caused.
The invention provides a programming method of a memory, which comprises the following steps:
acquiring a programming temperature of a storage unit of a memory;
and under the condition that the programming temperature is lower than the preset temperature, programming the memory cell by adopting the gradually increased programming voltage until the memory cell meets the preset condition, wherein the difference value of the programming voltages of two adjacent times is smaller than the preset difference value.
Wherein the programming method further comprises:
and under the condition that the programming temperature is lower than the preset temperature, the time of programming the memory cell by the programming voltage every time is shorter than the preset time.
Wherein the programming method further comprises:
and under the condition that the programming temperature is greater than or equal to the preset temperature, programming the memory cells of the memory by adopting successively increased programming voltages until the memory cells meet the preset condition, wherein the difference value of the programming voltages of two adjacent times is greater than or equal to a preset difference value.
Wherein the programming method further comprises:
and under the condition that the programming temperature is greater than or equal to the preset temperature, the time for programming the memory cell by the programming voltage each time is greater than or equal to the preset time.
Wherein the memory programming Is Step Pulse Programming (ISPP), and after the memory cell of the memory is programmed to satisfy the preset condition, the programming method further comprises:
program inhibit is performed on the memory cell at the next pulse.
The preset condition is that the threshold voltage of the storage unit is greater than or equal to a target threshold value.
The invention provides a programming device of a memory, comprising:
the acquisition module is used for acquiring the programming temperature of a storage unit of the memory;
and the control module is used for controlling the programming of the memory unit by adopting the gradually increased programming voltage under the condition that the programming temperature is lower than the preset temperature until the memory unit meets the preset condition, wherein the difference value of the programming voltage of two adjacent times is smaller than the preset difference value.
The control module is further configured to control the programming voltage to program the memory cell for a time less than a preset time under the condition that the programming temperature is less than the preset temperature.
The control module is further configured to control to program the memory cell of the memory with successively increased programming voltages under the condition that the programming temperature is greater than or equal to the preset temperature until the memory cell meets the preset condition, where a difference between the two adjacent programming voltages is greater than or equal to a preset difference.
The control module is further configured to control the programming voltage to program the memory cell for a time greater than or equal to a preset time under the condition that the programming temperature is greater than or equal to the preset temperature.
In summary, the present application sets the difference between two adjacent programming voltages to be smaller than the preset difference in the low-temperature programming phase, and the increase of the programming voltage is smaller, so that when the memory cell satisfies the preset condition in the low-temperature programming phase, the threshold voltage distribution of the memory cell is narrowed, and the narrowing width is larger, and the narrowing width of the distribution of the entire programming state is larger, so that although the threshold voltage distribution of the memory cell is relatively wider and the distribution of the entire programming state is relatively wider in the low-temperature programming phase, the above effect that the increase of the programming voltage is smaller in the present application makes the distance between the states larger, and the read window between the states is larger, and when the memory cell is read in the high-temperature phase, although the threshold voltage distribution of the memory cell is widened, the distribution of the entire programming state is widened, but because the threshold voltage distribution of the memory cell is widened in the width at a higher temperature in the read operation, the distribution broadening amplitude of the whole programming state is small, and finally the threshold voltage distribution broadening degree is not enough to enable the reading window between states of the memory cell to be too small, the reading window between the states can still meet the standard requirement, and reading errors cannot be caused.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flow chart illustrating a conventional memory programming method.
Fig. 2 is a diagram illustrating voltages applied to a memory cell during a conventional program operation.
Fig. 3 a-3 b are timing diagrams during a conventional programming operation.
FIG. 4 is a distribution diagram of threshold voltages of a certain program state in a certain page of an actual memory in multiple programming steps of ISPP.
FIG. 5 is a flowchart illustrating a method for programming a memory according to an embodiment of the invention.
FIG. 6 is a schematic diagram of voltages applied to a memory cell during a low temperature programming operation according to an embodiment of the present invention.
FIG. 7 is a schematic diagram of voltages applied to a memory cell during a high temperature programming operation according to an embodiment of the present invention.
FIG. 8 is a diagram illustrating voltages applied to a memory cell during a low temperature program-high temperature read operation according to an embodiment of the present invention.
FIG. 9 is a graph comparing threshold voltage distributions of memory cells programmed by the conventional programming method and programming methods according to the programming method of the present invention.
FIG. 10 is a schematic structural diagram of a memory programming device according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Before describing embodiments of the present invention, a brief description of the conventional method of programming a memory will be given.
FIG. 1 is a flow chart illustrating a conventional memory programming method; fig. 2 is a diagram illustrating voltages applied to a memory cell during a program operation in a conventional method. As shown in fig. 2, in the conventional method, a step pulse Program (ISPP) is used for writing. For NAND flash, the write operation is done in page units; taking a certain memory cell in a page as an example, after programming is started, loading an initial programming voltage on the memory cell, and then verifying whether a target threshold value is programmed or not; if the target threshold value is not reached, programming by using higher voltage; repeating the above process until the verifying step finds that the threshold voltage of the memory cell is programmed to reach the target threshold, at which point the programming of the memory cell is completed, and applying a program inhibit voltage to the memory cell in a subsequent time so that the memory cell is not programmed any more; when the threshold voltages of all memory cells of this page are programmed to the target threshold, the programming process of the entire page is ended.
Fig. 3 a-3 b show timing diagrams during a program operation in a conventional method. As shown in fig. 3 a-3 b, during programming, a programming voltage is applied to the selected word line, a turn-on voltage is applied to the unselected word lines, and an upper selection transistor of the selected cell string is turned on by applying a turn-on voltage, so that a low potential of the selected word line is conducted to a channel, thereby implementing the programming operation; when program inhibition is carried out, a program inhibition voltage is loaded on the bit line of the unit string, namely the low potential is changed into the high potential, the upper selection tube is closed, the channel is floated, and therefore the storage unit on the corresponding selected word line cannot be programmed any more.
FIG. 4 is a distribution diagram of threshold voltages of a certain program state in a certain page of an actual memory in multiple programming steps of ISPP. Each curve in the graph represents the distribution of the threshold voltage of each memory cell after one-time programming in ISPP, that is, the relationship between each threshold voltage and the number of memory cells having the threshold voltage. Specifically, the corresponding threshold voltage at the peak of each curve in the graph is the threshold voltage that the maximum number of memory cells have. As can be seen from the graph, as the number of programming times (programming pulses) increases, the threshold voltage of the memory cell as a whole becomes higher; when a portion of the memory cells reach the target threshold, the portion of the memory cells are program inhibited; and continuously programming the memory cells which do not reach the target threshold, continuously increasing the threshold voltage, finally starting compression and narrowing of the distribution of the whole programming state (the rightmost curve in the main graph) until the threshold voltages of all the memory cells exceed the target threshold, and finishing the programming. However, since the 3D NAND channel is not an ideal intrinsic semiconductor, the grain boundaries between the grains of the polysilicon channel provide many shallow level traps, the confinement depth of carriers at different temperatures is different, and the mobility of carriers at different temperatures is different, which results in the difference of the channel conduction characteristics at different temperatures. This is mainly manifested as: in a low-temperature programming stage, the channel conduction is poor, the threshold voltage distribution of the memory unit is wide, the distribution of the whole programming state is wide, the distance between the states is small, the read window between the states is small, and if the read window between the states is still smaller than the standard value in a high-temperature reading stage, the memory can read errors; in a high-temperature programming stage, the channel conduction is good, the threshold voltage distribution is narrow, the distribution of the whole programming state is narrow, the distance between the states is large, and the read window between the states is large.
In view of the above problems, the present invention provides a method for programming a memory. Referring to fig. 5, fig. 5 is a programming method of a three-dimensional memory according to the present invention. The difference value of the programming voltages of two adjacent times is smaller than the preset difference value, so that the distribution of the threshold voltage is narrow, the distribution of the whole programming state is narrow, the reading window between the states is large, the standard requirement can be met, and the reading error cannot be caused when the storage unit is read at high temperature under the condition of low-temperature programming.
A method of programming a three-dimensional memory is shown in fig. 5. As shown in fig. 5, the method can be broadly summarized as the following process: acquiring a programming temperature of a memory cell of the memory (S1), and programming the memory cell of the memory with successively increased programming voltages under the condition that the programming temperature is lower than a preset temperature until the memory cell meets the preset condition, wherein a difference value V1 between two adjacent programming voltages is lower than a preset difference value (S2).
As will be described separately below.
S1, the program temperature of the memory cell of the memory is obtained. In this step, the programming temperature is mainly the ambient temperature, and a temperature sensor is pre-arranged in the memory and used for sensing the ambient temperature.
S2, referring to fig. 6, under the condition that the programming temperature is lower than the preset temperature, the memory cell is programmed with the successively increased programming voltages until the memory cell meets the preset condition, wherein a difference V1 between two adjacent programming voltages is smaller than the preset difference. Specifically, the previous programming voltage is a first voltage, the next programming voltage is a second voltage, and the second voltage is greater than the first voltage to increase the threshold voltage of the memory cell, so that the memory cell finally satisfies the predetermined condition, and the difference V1 between the second voltage and the first voltage is smaller than the predetermined difference. In a specific embodiment, the predetermined difference is 0.05V-0.6V, and the optional predetermined difference is 0.4V-0.6V. Preferably, the preset difference is 0.4V.
In a specific embodiment, between the steps S1-S2, the following steps are further included:
and judging whether the programming temperature is less than the preset temperature.
Specifically, the step S2 is executed under the condition that the programming temperature is judged to be less than the preset temperature.
According to the above, when the memory cell is programmed at a lower temperature (less than a preset temperature), the channel conduction is poor, the carrier mobility is low, the threshold voltage distribution of the memory cell is wide, the distribution of the whole programmed state is wide, the distance between the states is small, the read window between the states is small, when the read operation of the memory cell is performed at a higher temperature (greater than the preset temperature), the channel conduction is enhanced due to the higher read temperature, the carrier mobility is high, the threshold voltage of the memory cell is slightly shifted, the threshold voltage distribution of the memory cell is widened, and the distribution of the whole programmed state is widened.
The application sets the difference value V1 of the two adjacent programming voltages to be smaller than the preset difference value and the increase V1 of the programming voltage to be smaller in the low-temperature programming phase, so that when the memory cell meets the preset condition in the low-temperature programming phase, the threshold voltage distribution is narrowed, the narrowing amplitude is larger, and the distribution narrowing amplitude of the whole programming state is larger, so that although the threshold voltage distribution of the memory cell is relatively wider and the distribution of the whole programming state is relatively wider in the low-temperature programming phase, the distance between the states is larger and the read window between the states is larger due to the smaller increase V1 of the programming voltage of the application, and when the memory cell is read in the high-temperature phase, although the threshold voltage distribution of the memory cell is widened and the distribution of the whole programming state is widened, but the threshold voltage distribution of the memory cell is widened in the high-temperature reading operation, the distribution broadening amplitude of the whole programming state is small, and finally the threshold voltage distribution broadening degree is not enough to enable the reading window between states of the memory cell to be too small, the reading window between the states can still meet the standard requirement, and reading errors cannot be caused.
Therefore, the difference value V1 between the two adjacent programming voltages is smaller than the preset difference value, so that the distribution narrowing amplitude of the threshold voltage of the memory cell is larger under the condition of low-temperature programming, the distribution narrowing amplitude of the whole programming state is larger, the read window between the states is larger, when the memory cell is read at high temperature, the distribution widening amplitude of the threshold voltage is smaller, the distribution widening amplitude of the whole programming state is smaller, the read window between the states can still meet the standard requirement, and no read error can be caused.
The predetermined temperature may be in the range of 0 ℃ to 25 ℃, and in one particular embodiment, the predetermined temperature is 25 ℃.
In a specific embodiment, the programming temperature of the memory cell is less than 25 ℃, optionally, the range of the programming temperature less than the preset temperature is 0 ℃ to 25 ℃, and the reading temperature of the memory cell is greater than or equal to 25 ℃, optionally, the range is 25 ℃ to 85 ℃.
In a specific embodiment, the preset condition may be that the threshold voltage of the memory cell is equal to a target threshold value. The target threshold is the threshold voltage location to which the memory cell actually needs to be programmed. At this point, the memory cell is programmed, and a program inhibit voltage is applied to the memory cell at a subsequent time such that it is no longer programmed.
In another specific embodiment, the preset condition may also be that the threshold voltage of the memory cell is greater than the target threshold. I.e. a more demanding preset condition can be used to set a reserve for the programmed state distribution change.
In a specific embodiment, the programming method further includes:
with reference to fig. 6, under the condition that the programming temperature is lower than the predetermined temperature, the time t1 for the programming voltage to program the memory cell each time is shorter than the predetermined time. The preset time is 5-25 us, preferably 16 us.
Specifically, since the increase of the programming voltage is smaller, in order to increase the threshold voltage of the memory cell to the target threshold value more quickly, the time t1 for each programming voltage to act on the memory cell needs to be set shorter, i.e., the duration t1 of each programming pulse is shorter. Since the increase V1 of the program voltage is small, the number of times of programming is required to be increased to the target threshold value, so that even if the duration t1 of each pulse action is short, the increase from the start of programming of the memory cell to the target threshold value does not reduce the total programming time.
Therefore, under the condition that the amplification V1 of the programming voltage is small, the time t1 of the programming voltage for programming the memory cell each time is less than the preset time, and the total programming time is not increased from the programming start of the memory cell to the increase of the memory cell to the target threshold value.
In a specific embodiment, the programming method further includes:
referring to fig. 7, under the condition that the programming temperature is greater than or equal to the preset temperature, the memory cells are programmed by using the successively increased programming voltages until the memory cells satisfy the preset condition, wherein a difference V2 between the two adjacent programming voltages is greater than or equal to a preset difference. Specifically, the previous programming voltage is a first voltage, the subsequent programming voltage is a second voltage, and the second voltage is greater than the first voltage to increase the threshold voltage of the memory cell, so that the memory cell finally satisfies the predetermined condition, and the difference V2 between the second voltage and the first voltage is greater than or equal to the predetermined difference. Specifically, when the programming temperature is judged to be greater than or equal to the preset temperature, the step is executed.
As can be seen from the above, another program-test method for a memory cell is: high temperature programming, low temperature reading. When the memory cell is programmed at a higher temperature (greater than or equal to a preset temperature), the channel conduction is better, the carrier mobility is higher, the threshold voltage distribution of the whole programming state is narrower, the distribution of the whole programming state is narrowed, the read window between the states is enlarged, when the memory cell is read at a low temperature (less than the preset temperature), the channel conduction of the memory cell is poor due to the temperature reduction, the carrier mobility is reduced, the characteristics of different memory cells are different, the threshold voltage of the memory cell is greatly drifted, the threshold voltage distribution is widened, and the distribution of the whole programming state is widened.
In the present application, by setting the difference V2 between two adjacent programming voltages to be equal to or greater than the preset difference in the high-temperature programming phase, the increase V2 of the programming voltage is larger, which makes the threshold voltage distribution of the memory cell smaller and the distribution of the entire programming state smaller when the memory cell satisfies the preset condition in the high-temperature programming phase, but the channel conduction in the high-temperature phase is stronger, the carrier mobility is higher, the threshold voltage distribution is originally narrower and the distribution of the entire programming state is originally narrower, and then the above-mentioned effects of the larger increase V2 of the programming voltage are combined, which makes the distance between the states larger and the read window between the states larger, and when reading in the low-temperature phase, although the threshold voltage distribution of the memory cell may be broadened and the distribution of the entire programming state may be broadened, but since the programming operation is at a higher temperature, the threshold voltage distribution of the memory cell is narrow, the distribution of the whole programming state is narrow, even if the threshold voltage distribution in a low-temperature reading stage is widened, the distribution of the whole programming state is widened, and finally, the widening degree of the threshold voltage distribution is not enough to enable the reading window between the states of the memory cell to be too small, the reading window between the states can still meet the standard requirement, and reading errors cannot be caused.
Therefore, the difference value V2 between the two adjacent programming voltages is greater than or equal to the preset difference value, so that the distribution of the threshold voltage meets the requirement when the memory cell is read at low temperature under the condition of high-temperature programming, the distribution of the whole programming state meets the requirement, the read window between the states can meet the standard requirement, and no read error is caused.
In a specific embodiment, the programming temperature of the memory cell is greater than or equal to 25 ℃, optionally, the range of the programming temperature greater than or equal to the preset temperature is 25 ℃ to 85 ℃, and the reading temperature of the memory cell is less than 25 ℃, optionally, the range is 0 ℃ to 25 ℃.
In a specific embodiment, the preset conditions are the same as above. The preset condition may be that the threshold voltage of the memory cell is greater than a target threshold. The target threshold is the threshold voltage location to which the memory cell actually needs to be programmed. At this point, the memory cell is programmed, and a program inhibit voltage is applied to the memory cell at a subsequent time such that it is no longer programmed.
The preset condition may also be that the threshold voltage of the memory cell is greater than a target threshold. I.e. a more demanding preset condition can be used to set a reserve for the programmed state distribution change.
In a specific embodiment, the programming method further includes:
with reference to fig. 7, under the condition that the programming temperature is greater than or equal to the predetermined temperature, the time t2 for the programming voltage to program the memory cell each time is greater than or equal to the predetermined time.
Specifically, since the increase V2 of the program voltage is large, the threshold voltage of the memory cell can be rapidly increased to the target threshold, and the time t2 for each program voltage to act on the memory cell, i.e., the duration t2 of each program pulse, can be long. Since the increase V2 of the program voltage is larger, the number of programming times can be increased to the target threshold, so that the duration t2 of each pulse action can be longer without reducing the total programming time from the start of programming to the increase of the memory cell to the target threshold.
Therefore, in the case that the increase V2 of the programming voltage is large, the time t2 for the programming voltage to program the memory cell each time is equal to or greater than the preset time, and the duration t2 of each pulse action can be long from the beginning of programming the memory cell to the increase of the memory cell to the target threshold.
It is understood that the difference V1 between the two adjacent programming voltages is smaller than the preset difference during the low temperature programming phase, and the difference V2 between the two adjacent programming voltages is greater than or equal to the preset difference during the high temperature programming phase. That is, the difference V1 between the two adjacent programming voltages in the low temperature programming phase is smaller than the difference V2 between the two adjacent programming voltages in the high temperature programming phase, and the programming voltage increase V1 in the low temperature phase is smaller than the programming voltage increase V2 in the high temperature phase. That is to say, when the memory cell is programmed at a low temperature, under the action of the V1 with a smaller amplification of the programming voltage, the distribution of the threshold voltage is narrowed to a larger extent, although the distribution of the threshold voltage is originally wider at the low temperature stage, the distribution of the threshold voltage is narrowed more by the programming voltage with a smaller amplification V1, and when the memory cell is read at a high temperature, the broadening amplitude of the threshold voltage is smaller due to the high temperature setting, so that the distribution of the whole programmed state can still meet the standard requirement, the read window between the states can meet the standard requirement, and no read error occurs. When the memory cell is programmed at a high temperature, the distribution of the threshold voltage is originally narrow, under the action that the amplification V2 of the programming voltage is relatively large, although the distribution narrowing degree of the threshold voltage is limited, the distribution of the threshold voltage is narrow in combination with the effect of the high temperature, and when the memory cell is read at a low temperature, the broadening range of the threshold voltage is large, but the distribution of the threshold voltage in the high-temperature programming stage is narrow, so that the final distribution of the whole programming state can meet the standard requirement, the read window between the states can meet the standard requirement, and no read error can be caused.
Therefore, differential increment is adopted for the programming voltage of the low-temperature programming-high-temperature reading method and the programming voltage of the high-temperature programming-low-temperature reading method, so that the distribution of the threshold voltage of the storage unit in the low-temperature programming-high-temperature reading method or the high-temperature programming-low-temperature reading method can meet the standard requirement, and no reading error occurs to the storage unit. The method avoids the technical problems that the threshold voltage is wide in distribution, the whole programming state is wide in distribution, the read window between states is small, the standard requirements cannot be met, and the memory cell is easy to have read errors due to the fact that the same programming voltage increment is adopted regardless of a low-temperature programming-high-temperature reading method and a high-temperature programming-low-temperature reading method.
In a specific embodiment, the memory programming Is Step Pulse Programming (ISPP), and after the memory cell of the memory is programmed to satisfy the predetermined condition, the programming method further includes: program inhibit is performed on the memory cell at the next pulse.
Referring to FIG. 8, an embodiment of the present invention employs step pulse programming for write operations. For example, low temperature programming and high temperature reading are used. Taking a certain memory cell in a certain page of the NAND flash memory as an example, at a lower programming temperature, after programming is started, loading an initial programming voltage on the memory cell, then performing verification, and judging whether the memory cell is programmed to a target threshold value; if the target threshold is not reached, continuing programming with a higher voltage (the increase of the programming voltage is smaller); repeating the above process until the threshold voltage of this memory cell is found to have been programmed to reach the target threshold in the verifying step; program inhibit is performed on the memory cell at the next pulse. And after the low-temperature programming is finished, reading at a high temperature. Regarding the high temperature programming, the procedure of the low temperature reading is basically the same as the above, except for the temperature exchange between the programming and the reading, and the detailed description of the present application is omitted.
Referring to fig. 9, it can be seen from fig. 9 that the threshold voltage distribution of the memory cell obtained by the programming method according to the embodiment of the present invention, whether programming at low temperature, reading at high temperature, or programming at high temperature and reading at low temperature, meets the standard requirement, and thus, the read window and retention characteristics of the memory can be maintained.
In the context of the present invention, the memory may be a three-dimensional memory, further, a 3D NAND flash memory, memories include, but are not limited to, floating gate structures and charge trapping structures, furthermore, embodiments of the present invention are applicable to single value memory cells (S L C), M L C, three bit memory cells (T L C), or more bit memory cells.
Based on the above method, and with reference to fig. 10, an embodiment of the invention further provides a memory programming device 10.
As shown in fig. 10, the memory programming device 10 includes:
the obtaining module 101 is configured to obtain a programming temperature of a memory cell of a memory.
The control module 102 is configured to control to program the memory cell with successively increased programming voltages under the condition that the programming temperature is lower than the preset temperature until the memory cell meets the preset condition, where a difference V1 between two adjacent programming voltages is smaller than a preset difference.
In a specific embodiment, the control device further comprises a judging module. The judging module is used for judging whether the programming temperature is smaller than the preset temperature. That is, when the determining module determines that the programming temperature of the memory cell is lower than the preset temperature, the control module 102 controls to program the memory cell with successively increasing programming voltages until the memory cell meets the preset condition, where a difference V1 between two adjacent programming voltages is smaller than the preset difference.
The programming device of the application sets the difference V1 between two adjacent programming voltages to be smaller than the preset difference and the increase V1 of the programming voltage to be smaller, so that when the memory cell meets the threshold condition in the low-temperature programming phase, the threshold voltage distribution is narrowed, the narrowing amplitude is larger, and the distribution narrowing amplitude of the whole programming state is larger, thereby although the threshold voltage distribution of the memory cell is relatively wider and the distribution of the whole programming state is relatively wider in the low-temperature programming phase, the distance between the states is larger and the read window between the states is larger due to the smaller increase V1 of the programming voltage of the application, when the memory cell is read in the high-temperature phase, although the threshold voltage distribution of the memory cell is widened and the distribution of the whole programming state is widened, but because the threshold voltage distribution widening amplitude of the memory cell is smaller under the higher temperature of the read operation, the distribution broadening amplitude of the whole programming state is small, and finally the threshold voltage distribution broadening degree is not enough to enable the reading window between states of the memory cell to be too small, the reading window between the states can still meet the standard requirement, and reading errors cannot be caused.
In a specific embodiment, the preset condition may be that the threshold voltage of the memory cell is equal to a target threshold value. The target threshold is the threshold voltage location to which the memory cell actually needs to be programmed. At this point, the memory cell is programmed, and a program inhibit voltage is applied to the memory cell at a subsequent time such that it is no longer programmed.
In another specific embodiment, the preset condition may also be that the threshold voltage of the memory cell is greater than the target threshold. I.e. a more demanding preset condition can be used to set a reserve for the programmed state distribution change.
In a specific embodiment, the control module 102 is further configured to control the time t1 for the programming voltage to program the memory cell to be less than the preset time under the condition that the programming temperature is less than the preset temperature. That is, when the determining module determines that the programming temperature of the memory cell is less than the predetermined temperature, the control module 102 controls the programming voltage to program the memory cell for a time t1 less than the predetermined time.
In a specific embodiment, the control module 102 is further configured to control to program the memory cell of the memory with successively increasing programming voltages under the condition that the programming temperature is greater than or equal to the preset temperature until the memory cell meets the preset condition, where a difference V2 between two adjacent programming voltages is greater than or equal to a preset difference. That is, when the determining module determines that the programming temperature of the memory cell is greater than or equal to the predetermined temperature, the control module 102 controls to program the memory cell with successively increased programming voltages until the memory cell meets the predetermined condition, wherein a difference V2 between two adjacent programming voltages is greater than or equal to a predetermined difference.
The programming device of the application sets the difference V2 between two adjacent programming voltages to be greater than or equal to a preset difference in the high-temperature programming phase, so that the amplitude V2 of the programming voltage is larger, which makes the threshold voltage distribution of the memory cell narrower and the distribution of the whole programming state narrower when the memory cell meets the threshold condition in the high-temperature programming phase, but the channel conduction in the high-temperature phase is stronger, the carrier mobility is higher, the threshold voltage distribution is originally narrower, the distribution of the whole programming state is originally narrower, and then the above effects of the larger amplitude V2 of the programming voltage are synthesized, which makes the distance between the states larger, the read window between the states is larger, when the memory cell is read in the low-temperature phase, although the threshold voltage distribution of the memory cell is widened and the distribution of the whole programming state is widened, but the programming operation is at a higher temperature, the threshold voltage distribution of the memory cell is narrow, the distribution of the whole programming state is narrow, even if the threshold voltage distribution in a low-temperature reading stage is widened, the distribution of the whole programming state is widened, and finally, the widening degree of the threshold voltage distribution is not enough to enable the reading window between the states of the memory cell to be too small, the reading window between the states can still meet the standard requirement, and reading errors cannot be caused.
In a specific embodiment, the control module 102 is further configured to control the time t2 when the memory cell is programmed by the programming voltage to be equal to or greater than a preset time under the condition that the programming temperature is equal to or greater than a preset temperature. That is, when the determining module determines that the programming temperature of the memory cell is greater than or equal to the predetermined temperature, the control module 102 controls the programming voltage to program the memory cell for a time t2 greater than or equal to the predetermined time.
Therefore, the programming device of the application adopts differentiated increment for the programming voltage of the low-temperature programming-high-temperature reading method and the high-temperature programming-low-temperature reading method by controlling, so that the distribution of the threshold voltage of the storage unit in the low-temperature programming-high-temperature reading method or the high-temperature programming-low-temperature reading method can meet the standard requirement, and the reading error can not occur to the storage unit.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (10)
1. A method of programming a memory, comprising:
acquiring a programming temperature of a storage unit of a memory;
and under the condition that the programming temperature is lower than the preset temperature, programming the memory cell by adopting the gradually increased programming voltage until the memory cell meets the preset condition, wherein the difference value of the programming voltages of two adjacent times is smaller than the preset difference value.
2. The programming method according to claim 1, further comprising:
and under the condition that the programming temperature is lower than the preset temperature, the time of programming the memory cell by the programming voltage every time is shorter than the preset time.
3. The programming method according to claim 1 or 2, further comprising:
and under the condition that the programming temperature is greater than or equal to the preset temperature, programming the memory cells of the memory by adopting successively increased programming voltages until the memory cells meet the preset condition, wherein the difference value of the programming voltages of two adjacent times is greater than or equal to a preset difference value.
4. The programming method according to claim 3, further comprising:
and under the condition that the programming temperature is greater than or equal to the preset temperature, the time for programming the memory cell by the programming voltage each time is greater than or equal to the preset time.
5. The programming method according to claim 1, wherein the memory programming Is Step Pulse Programming (ISPP), and after the memory cell of the memory is programmed to satisfy the preset condition, the programming method further comprises:
program inhibit is performed on the memory cell at the next pulse.
6. The programming method according to claim 1, wherein the predetermined condition is that a threshold voltage of the memory cell is equal to or greater than a target threshold.
7. A programming apparatus for a memory, comprising:
the acquisition module is used for acquiring the programming temperature of a storage unit of the memory;
and the control module is used for controlling the programming of the memory unit by adopting the gradually increased programming voltage under the condition that the programming temperature is lower than the preset temperature until the memory unit meets the preset condition, wherein the difference value of the programming voltage of two adjacent times is smaller than the preset difference value.
8. The programming control device of claim 7, wherein the control module is further configured to control the programming voltage to program the memory cell for less than a preset time under the condition that the programming temperature is less than the preset temperature.
9. The programming apparatus according to claim 7 or 8, wherein the control module is further configured to control, under the condition that the programming temperature is greater than or equal to the preset temperature, to program the memory cells of the memory with successively increasing programming voltages until the memory cells satisfy the preset condition, where a difference between the programming voltages at two adjacent times is greater than or equal to a preset difference.
10. The programming device according to claim 9, wherein the control module is further configured to control the programming voltage to program the memory cell for a time equal to or longer than a preset time under the condition that the programming temperature is equal to or longer than the preset temperature.
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