CN111459861B - Signal transmission method and circuit structure with heterogeneous platform - Google Patents
Signal transmission method and circuit structure with heterogeneous platform Download PDFInfo
- Publication number
- CN111459861B CN111459861B CN201910057888.5A CN201910057888A CN111459861B CN 111459861 B CN111459861 B CN 111459861B CN 201910057888 A CN201910057888 A CN 201910057888A CN 111459861 B CN111459861 B CN 111459861B
- Authority
- CN
- China
- Prior art keywords
- platform
- bridge circuit
- register
- signal transmission
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
Abstract
The invention discloses a signal transmission method and a circuit structure with a heterogeneous platform, wherein the method comprises the following steps: adjusting the signal transmission bandwidth between the first platform and the bridge circuit and between the second platform and the bridge circuit according to the signal transmission rate of the first platform and the second platform; transmitting the instruction signal from the first platform to the bridge circuit, and registering the instruction signal in a register of the bridge circuit; the second platform reads the instruction signal from the register of the bridge circuit; the second platform transmits data to a register of the bridge circuit according to the instruction signal; and the first platform acquires data registered in a register of the bridge circuit.
Description
Technical Field
The present invention relates to a signal transmission method and circuit structure with heterogeneous platform, and more particularly, to a signal transmission method and circuit structure with heterogeneous platform capable of synchronizing signal transmission on different platforms.
Background
In designing an integrated circuit, the functions of the integrated circuit chip are usually tested on a tester, and an engineer may choose to use a semi-customized design approach, such as a Field-Programmable Gate array (FPGA), a Virtual Platform (Virtual Platform), or an Emulator (Emulator) to emulate the functions of the integrated circuit chip. The semi-customized design is that some elements are applied with field programmable gate array, and some elements simulate the functions of the elements by using a virtual platform or a simulator, and all the elements are integrated until the test result is good, so that the manufacturing of the whole integrated circuit is carried out, thereby saving the cost of the integrated circuit design and accelerating the time of the integrated circuit test.
However, although all functions of the elements of the integrated circuit can be simulated by the field programmable gate array, the virtual platform or the simulator, the signal transmission speed of the field programmable gate array, the virtual platform or the simulator may be fast or slow, resulting in asynchronous signal transmission of the integrated circuit.
Therefore, how to overcome the problem of asynchronous signal transmission during the design of integrated circuits to improve the design and test effect of integrated circuits has become one of the important issues to be solved by the industry.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a signal transmission method and circuit with heterogeneous platforms to overcome the problem of asynchronous signal transmission in different platforms.
In order to solve the above technical problems, one technical solution of the present invention is to provide a circuit structure with a heterogeneous platform, which includes a first platform, a bridge circuit and a second platform. The bridge circuit is electrically connected with the first platform, the second platform is electrically connected with the bridge circuit, and the signal transmission rates of the first platform and the second platform are different. And adjusting the signal transmission bandwidth between the bridge circuit and the second platform according to the signal transmission rate between the first platform and the bridge circuit.
In order to solve the above technical problem, another technical solution adopted by the present invention is to provide a signal transmission method with a heterogeneous platform, including: adjusting the signal transmission bandwidth between the first platform and the bridge circuit and between the second platform and the bridge circuit according to the signal transmission rate of the first platform and the second platform; transmitting the instruction signal from the first platform to the bridge circuit, and registering the instruction signal in a register of the bridge circuit; the second platform reads the instruction signal from the register of the bridge circuit; the second platform transmits data to a register of the bridge circuit to register according to the instruction signal; and the first platform receives data registered in a register of the bridge circuit.
In order to solve the above technical problem, another technical solution of the present invention is to provide a circuit structure with a heterogeneous platform, which includes a Master platform (Master), a bridge circuit and a Slave platform (Slave). The bridge circuit is electrically connected with the main platform, the Slave (Slave) platform is electrically connected with the bridge circuit, and the signal transmission rate of the main platform is faster than that of the Slave platform. And adjusting the signal transmission bandwidth between the bridge circuit and the slave platform according to the signal transmission rate between the master platform and the bridge circuit.
The method and the circuit for signal transmission with a heterogeneous platform provided by the invention can improve the problem of asynchronous signal transmission due to different first and second platforms by adjusting the signal transmission bandwidth between the first platform and the bridge circuit and between the bridge circuit and the second platform and arranging a register in the bridge circuit.
For a better understanding of the features and technical content of the present invention, reference should be made to the following detailed description and accompanying drawings, which are provided for purposes of illustration and description only and are not intended to limit the invention.
Drawings
FIG. 1 is a block diagram of a circuit structure with a heterogeneous platform according to the present invention.
FIG. 2 is a flowchart of a signal transmission method with a heterogeneous platform according to the present invention.
Detailed Description
The following description is provided for the implementation of the circuit structure with heterogeneous platform according to the present disclosure, and those skilled in the art will understand the advantages and effects of the present disclosure from the disclosure of the present specification. The invention is capable of other and different embodiments and its several details are capable of modification and various other changes, which can be made in various details within the specification and without departing from the spirit and scope of the invention. The drawings of the present invention are for illustrative purposes only and are not intended to be drawn to scale. The following embodiments will further explain the related art of the present invention in detail, but the disclosure is not intended to limit the scope of the present invention.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements or signals, these elements or signals should not be limited by these terms. These terms are used primarily to distinguish one element from another element or from one signal to another signal. In addition, the term "or" as used herein should be taken to include any one or combination of more of the associated listed items as the case may be.
[ first embodiment ]
Referring to FIG. 1, a block diagram of a circuit structure with a heterogeneous platform according to the present invention is shown. The embodiment of the present invention provides a circuit structure 10 with a heterogeneous platform, which includes: a first platform 101, a bridge circuit 102 and a second platform 103.
For example, the first platform 101 may be a virtual platform, and the second platform 103 may be a field programmable gate array, which may have its signal transmission limited, but in different embodiments, the first platform 101 may also be a field programmable gate array, and the second platform 103 may be a virtual platform, which is not limited herein, because the first platform 101 and the second platform 103 are different platforms, and the signal transmission rates of the two platforms are different. Generally, when the first platform 101 has a faster signal transmission speed than the second platform 103, the first platform 101 may be referred to as a Master (Master) platform, and the second platform 103 may be referred to as a Slave (Slave) platform. However, in different embodiments, the signal transmission speed of the second platform 103 may be faster than that of the first platform 101, and the second platform 103 is referred to as a master platform, and the first platform 101 is referred to as a slave platform, but not limited thereto.
The bridge circuit 102 is electrically connected to the first platform 101, and the second platform 103 is electrically connected to the bridge circuit 102. The first platform 101 has a faster signal transmission rate than the second platform 103, and the bridge circuit 102 balances the signal transmission between the first platform 101 and the second platform 103. For example, when the transmission rate of the first platform 101 is 10MHz per second and the transmission rate of the second platform 103 is 2MHz per second, the difference between the transmission rates of the first platform 101 and the second platform 103 may cause an error in reading and writing signals of the integrated circuit. Therefore, in this embodiment, the transmission bandwidth between the bridge circuit 102 and the second platform 101 is increased by 5 times, so that the signal transmission rates between the first platform 101 and the bridge circuit 102 and between the bridge circuit 102 and the second platform 103 are the same. The method of increasing the signal transmission bandwidth can be achieved by increasing the signal transmission ports.
The circuit structure 10 with heterogeneous platforms according to the present invention adjusts the signal transmission bandwidth between the first platform 101 and the bridge circuit 102 or between the bridge circuit 102 and the second platform 103 according to the signal transmission rate between the first platform 101 and the bridge circuit 102 and between the bridge circuit 102 and the second platform 103, so that the signal transmission rate between the first platform 101 and the bridge circuit 102 and between the bridge circuit 102 and the second platform 103 are the same.
Further, the bridge circuit 102 further includes a register 1021, which is preferably a First In First Out (FIFO) register, for storing data transmitted from the First platform 101 or the second platform 103, so as to achieve the purpose of data buffering. For example, when data read/write between the first platform 101 and the second platform 103 needs to be handshake (Handshaking), the instruction of the first platform 101 or the second platform 103 may be first stored in the register 1021 of the bridge circuit 102, after the second platform 103 or the first platform 101 obtains the instruction in the register 1021, according to the instruction, the second platform 103 or the first platform 101 transmits corresponding data to the register 1021 of the bridge circuit 102, and finally, the first platform 101 or the second platform 103 obtains corresponding data from the register 1021 of the bridge circuit 102.
The circuit structure 10 with heterogeneous platforms of the present invention can improve the problem of different signal transmission rates between the first platform 101 and the second platform 103, thereby making the test of the integrated circuit more accurate.
Referring to fig. 2, a flow chart of a signal transmission method with a heterogeneous platform according to the present invention is shown. The signal transmission method with heterogeneous platform of the present invention achieves the same signal transmission rate through the circuit structure 10 with heterogeneous platform. The signal transmission method comprises the following steps. In step S201, signal transmission bandwidths between the first platform and the bridge circuit and between the second platform and the bridge circuit are adjusted according to the signal transmission rates of the first platform and the second platform. When the signal transmission rate of the first platform is faster than that of the second platform, the signal transmission bandwidth between the bridge circuit and the second platform is adjusted, so that the transmission rates between the first platform and the bridge circuit and between the bridge circuit and the second platform are synchronous, and the problem that the signal transmission of the integrated circuit is asynchronous because the signal transmission rates of the first platform and the second platform are different is avoided.
In step S202, an instruction signal is transmitted from the first platform to the bridge circuit, and the instruction signal is registered in a register of the bridge circuit. In the data transmission, when the first platform transmits the instruction signal to the bridge circuit, the instruction signal is registered in the register of the bridge circuit, and in the signal transmission process, when the data read-write sequence needs to be considered, for example, when data needs to be handshake (handshaking), the signal may be registered in the register of the bridge circuit first, and the data transmitted by the second platform is waited to reach the bridge circuit.
In step S203, the second platform reads the instruction signal from the register of the bridge circuit. In step S204, the second platform transmits data to the register of the bridge circuit according to the instruction signal, and then in step S205, the first platform receives the data registered in the register of the bridge circuit. After the second platform reads the instruction signal from the register of the bridge circuit, it knows what data the first platform needs, so the second platform outputs the data corresponding to the instruction signal to the register of the bridge circuit. Then, the first platform receives the data in the register of the bridge circuit to complete the signal transmission method with heterogeneous platform of the present invention.
By the bridge circuit, the problem of asynchronous signal transmission between the first platform and the bridge circuit and between the bridge circuit and the second platform can be solved, and the data reading and writing problem in the reading requirement can be solved.
[ advantageous effects of the embodiments ]
The method and the circuit for signal transmission with a heterogeneous platform provided by the invention can improve the problem of asynchronous signal transmission due to different first and second platforms by adjusting the signal transmission bandwidth between the first platform and the bridge circuit and between the bridge circuit and the second platform and arranging a register in the bridge circuit.
The disclosure is only a preferred embodiment of the invention and should not be taken as limiting the scope of the invention, which is defined by the appended claims.
[ notation ] to show
Steps S201 to S205.
Claims (6)
1. A circuit structure having a heterogeneous platform, comprising:
a field programmable gate array;
a bridge circuit electrically connected to the FPGA; and
the virtual platform is electrically connected with the bridge circuit, and the signal transmission rates of the field programmable gate array and the virtual platform are different;
wherein, the signal transmission bandwidth between the bridge circuit and the virtual platform is adjusted according to the signal transmission rate between the FPGA and the bridge circuit, so that the signal transmission rates between the FPGA and the bridge circuit and between the bridge circuit and the virtual platform are the same,
the bridge circuit also includes a register for storing data transmitted by the FPGA or the virtual platform.
2. The circuit structure with heterogeneous platform according to claim 1, wherein the register is a first-in-first-out register.
3. The circuit structure with heterogeneous platform according to claim 1, wherein the data transmitted by the fpga is stored in the register, and the dummy platform reads the data from the register.
4. The circuit structure with a heterogeneous platform according to claim 1, wherein the fpga transmits command signals to the bridge circuit and registers the command signals in the register of the bridge circuit.
5. The circuit structure with a heterogeneous platform according to claim 4, wherein the virtual platform reads the command signal in the register of the bridge circuit and transmits data to the register of the bridge circuit according to the command signal, and the field programmable gate array receives the data registered in the register of the bridge circuit.
6. A signal transmission method with a heterogeneous platform comprises the following steps:
according to the signal transmission rate of a field programmable gate array and a virtual platform, adjusting the signal transmission bandwidth between the field programmable gate array and a bridge circuit and between the virtual platform and the bridge circuit, so that the signal transmission rate between the field programmable gate array and the bridge circuit and between the bridge circuit and the virtual platform are the same;
transmitting a command signal from the FPGA to the bridge circuit, and storing the command signal in a register of the bridge circuit;
the virtual platform reads the instruction signal from the register of the bridge circuit;
the virtual platform transmits data to the register of the bridge circuit according to the instruction signal; and
the field programmable gate array receives the data in the register of the bridge circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910057888.5A CN111459861B (en) | 2019-01-22 | 2019-01-22 | Signal transmission method and circuit structure with heterogeneous platform |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910057888.5A CN111459861B (en) | 2019-01-22 | 2019-01-22 | Signal transmission method and circuit structure with heterogeneous platform |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111459861A CN111459861A (en) | 2020-07-28 |
| CN111459861B true CN111459861B (en) | 2022-01-07 |
Family
ID=71683082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910057888.5A Active CN111459861B (en) | 2019-01-22 | 2019-01-22 | Signal transmission method and circuit structure with heterogeneous platform |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111459861B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11154967A (en) * | 1997-11-21 | 1999-06-08 | Nec Corp | Control system for network management traffic transmission band width |
| EP1069512A2 (en) * | 1999-07-12 | 2001-01-17 | Matsushita Electric Industrial Co., Ltd. | Data processing apparatus with buffering between buses |
| CN102103562A (en) * | 2009-12-17 | 2011-06-22 | 财团法人工业技术研究院 | Multi-power mode serial interface architecture |
| CN104362770A (en) * | 2014-11-06 | 2015-02-18 | 重庆大学 | Power signal parallel transfer circuit for ECPT (electric-field coupled power transfer) and control method of power signal parallel transfer circuit |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6633944B1 (en) * | 2001-10-31 | 2003-10-14 | Lsi Logic Corporation | AHB segmentation bridge between busses having different native data widths |
| US20060282602A1 (en) * | 2005-06-09 | 2006-12-14 | Tse-Hsine Liao | Data transmission device and method thereof |
-
2019
- 2019-01-22 CN CN201910057888.5A patent/CN111459861B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11154967A (en) * | 1997-11-21 | 1999-06-08 | Nec Corp | Control system for network management traffic transmission band width |
| EP1069512A2 (en) * | 1999-07-12 | 2001-01-17 | Matsushita Electric Industrial Co., Ltd. | Data processing apparatus with buffering between buses |
| CN102103562A (en) * | 2009-12-17 | 2011-06-22 | 财团法人工业技术研究院 | Multi-power mode serial interface architecture |
| CN104362770A (en) * | 2014-11-06 | 2015-02-18 | 重庆大学 | Power signal parallel transfer circuit for ECPT (electric-field coupled power transfer) and control method of power signal parallel transfer circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111459861A (en) | 2020-07-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8522189B2 (en) | Functional fabric based test access mechanism for SoCs | |
| US20180189158A1 (en) | Blade centric automatic test equipment system | |
| US20040078179A1 (en) | Logic verification system | |
| TWI514402B (en) | Memory test system and memory test method | |
| US20130290594A1 (en) | Core-driven translation and loopback test | |
| US20070294580A1 (en) | Virtual tester architecture | |
| US8165866B2 (en) | Emulation system | |
| CN111459861B (en) | Signal transmission method and circuit structure with heterogeneous platform | |
| CN108120917B (en) | Method and device for determining test clock circuit | |
| CN103257309B (en) | Ddr series pcb plate timing compensation method, system and terminal | |
| CN110717311A (en) | FPGA internal access system and FPGA verification method | |
| CN108984451B (en) | Signal driving method and communication device | |
| US9100112B1 (en) | Latency built-in self-test | |
| US20050055189A1 (en) | Verification method and system for logic circuit | |
| TWI692694B (en) | Signal transmission method for different platforms and circuit structure thereof | |
| JP4736135B2 (en) | Internal bus analysis system for inter-card communication, method and program | |
| US20210286694A1 (en) | Packeted protocol device test system | |
| CN114610549A (en) | Serial port flash memory chip test system and test method | |
| CN104866638B (en) | Verification method for DRAM system | |
| CN110188053A (en) | Airborne databus delay fault injection device and method | |
| US9778678B2 (en) | Method and apparatus for clocked data eye measurement | |
| CN112966335B (en) | Interface simulation device and automatic driving simulation test platform | |
| CN117795492A (en) | Speed bridge for emulating hardware | |
| CN114444423B (en) | Data processing method and system based on verification platform and electronic equipment | |
| CN112131066B (en) | System and method for testing an OTP type SOC |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |