CN111435152B - Battery voltage detection circuit and battery voltage detection module of battery pack - Google Patents

Battery voltage detection circuit and battery voltage detection module of battery pack Download PDF

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CN111435152B
CN111435152B CN201910032369.3A CN201910032369A CN111435152B CN 111435152 B CN111435152 B CN 111435152B CN 201910032369 A CN201910032369 A CN 201910032369A CN 111435152 B CN111435152 B CN 111435152B
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resistor
current
operational amplifier
tube
compensation
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CN111435152A (en
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王婉贞
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Wuxi Yourong Microelectronics Co ltd
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Wuxi Yourong Microelectronics Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • H01M10/482—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte for several batteries or cells simultaneously or sequentially
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

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  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Secondary Cells (AREA)

Abstract

The application discloses a detection circuit of battery voltage, which comprises a voltage conversion unit and a current compensation unit; the current compensation unit is used for performing current compensation; the voltage conversion unit is used for detecting the battery voltage of a connected target battery, and comprises: the first end of the first resistor is connected with the third resistor as a positive input end; the second end of the first resistor and the second resistor are both connected with the first input end of the first operational amplifier; the other end of the second resistor is used as a negative input end; the other end of the third resistor and the second input end of the first operational amplifier are connected with the first end of the first MOS tube; the second end of the first MOS tube is connected with the fourth resistor as an output end, the grid electrode is connected with the output end of the first operational amplifier, and the other end of the fourth resistor is grounded. This application is simple structure not only, can effectively improve group battery life and product economic benefits moreover. The application also discloses a battery voltage detection module of group battery, also has above-mentioned beneficial effect.

Description

Battery voltage detection circuit and battery voltage detection module of battery pack
Technical Field
The present disclosure relates to battery management technologies, and particularly to a battery voltage detection circuit and a battery voltage detection module of a battery pack.
Background
Batteries have found widespread use in people's work and life. As an important energy device, good health of the battery is of paramount importance. A Battery Management System (BMS) can monitor the Battery voltage using an associated sampling circuit to perform a health maintenance on the Battery in time. In practical application, a plurality of batteries are generally connected in series to form a battery pack for use, so that the problem of unbalanced current of different batteries is often caused when the battery voltage is detected, and the battery voltage is inevitably unbalanced after long-time operation, so that the working performance of the battery pack is reduced. Although the current compensation circuit can be used for current compensation to solve the problem, the detection circuit adopted in the prior art has a less reasonable structure, which results in the need to design a very complicated current compensation circuit, which undoubtedly increases the difficulty of circuit design and the cost of products. In view of the above, it is an important attention of those skilled in the art to provide a solution to the above technical problems.
Disclosure of Invention
The purpose of the application is to provide a detection circuit of battery voltage with simple and reasonable structure and a battery voltage detection module of a battery pack, so as to effectively solve the problem of unbalanced battery current and effectively improve the economic benefit of products.
In order to solve the above technical problem, in a first aspect, the present application discloses a battery voltage detection circuit, including a voltage conversion unit and a current compensation unit; the voltage conversion unit is used for detecting the battery voltage of the connected target battery; the compensation output end of the current compensation unit is connected with the positive input end of the voltage conversion unit and is used for performing current compensation on the voltage conversion unit;
the voltage conversion unit comprises a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a first MOS (metal oxide semiconductor) tube; a first end of the first resistor is connected with a first end of the third resistor and serves as a positive input end of the voltage conversion unit; the second end of the first resistor is respectively connected with the first end of the second resistor and the first input end of the first operational amplifier; a second end of the second resistor is used as a negative input end of the voltage conversion unit; a second end of the third resistor is respectively connected with a second input end of the first operational amplifier and a first end of the first MOS tube; the second end of the first MOS tube is connected with the first end of the fourth resistor and serves as the output end of the voltage conversion unit, the second end of the fourth resistor is grounded, and the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier.
Optionally, the first input terminal of the first operational amplifier is an inverting input terminal, and the second input terminal of the first operational amplifier is a non-inverting input terminal; the first MOS tube is a first NMOS tube, the first end of the first NMOS tube is a drain electrode, and the second end of the first NMOS tube is a source electrode.
Optionally, a positive power supply terminal of the first operational amplifier is connected to a power supply input terminal of the current compensation unit, and a negative power supply terminal of the first operational amplifier is grounded;
the current compensation unit comprises a current mirror, a second NMOS tube and a fifth resistor; a first mirror current output end of the current mirror is used as a compensation output end of the current compensation unit, and a second mirror current output end of the current mirror is connected with a drain electrode of the second NMOS tube; the grid electrode of the second NMOS tube is connected with the grid electrode of the first NMOS tube, the source electrode of the second NMOS tube is connected with the first end of the fifth resistor, and the second end of the fifth resistor is grounded.
Optionally, the first operational amplifier includes a first current source, a second current source, a third current source, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first high-voltage PMOS transistor, a second high-voltage PMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor, a sixth resistor, a first capacitor, and a first zener diode;
the input end of the first current source is connected with the input end of the second current source and is used as a power supply positive end of the first operational amplifier; the output end of the first current source is respectively connected with the source electrode of the second PMOS tube, the source electrode of the third PMOS tube and the source electrode of the fourth PMOS tube; the grid electrode of the second PMOS tube is used as the inverted input end of the first operational amplifier, and the drain electrode of the second PMOS tube is connected with the source electrode of the first high-voltage PMOS tube; the grid electrode of the third PMOS tube is used as a positive phase input end of the first operational amplifier, and the drain electrode of the third PMOS tube is connected with the source electrode of the second high-voltage PMOS tube; the drain electrode of the fourth PMOS tube is connected with the source electrode of the third high-voltage PMOS tube, and the fourth PMOS tube, the third high-voltage PMOS tube, the first high-voltage PMOS tube and the second high-voltage PMOS tube share a grid electrode;
the drain electrode of the third high-voltage PMOS tube is connected with the grid electrode and the input end of the third current source; the drain electrode of the first high-voltage PMOS tube is respectively connected with the drain electrode and the grid electrode of the third NMOS tube and the grid electrode of the fourth NMOS tube; the drain electrode of the second high-voltage PMOS tube is respectively connected with the drain electrode of the fourth NMOS tube, the grid electrode of the fifth NMOS tube, the first end of the sixth resistor and the cathode of the first Zener diode; a second end of the sixth resistor is connected with a first end of the first capacitor, and a second end of the first capacitor is respectively connected with an output end of the second current source and a drain electrode of the fifth NMOS transistor and serves as an output end of the first operational amplifier; the output end of the third current source, the anode of the first zener diode, the source electrode of the third NMOS tube, the source electrode of the fourth NMOS tube and the source electrode of the fifth NMOS tube are all grounded.
Optionally, a first input terminal of the first operational amplifier is a non-inverting input terminal, and a second input terminal of the first operational amplifier is an inverting input terminal; the first MOS tube is a first PMOS tube, the first end of the first PMOS tube is a source electrode, and the second end of the first PMOS tube is a drain electrode.
Optionally, a positive power supply terminal of the first operational amplifier is connected to the positive input terminal of the voltage conversion unit, and a negative power supply terminal of the first operational amplifier is grounded;
the current compensation unit comprises a current mirror, a second NMOS tube, a fifth resistor, a second operational amplifier and a compensation current source; the current of the compensation current source is equal to the working current of the first operational amplifier in magnitude;
the positive power supply end of the second operational amplifier is connected with the input end of the current mirror, the negative power supply end is grounded, the positive phase input end of the second operational amplifier is connected with the output end of the voltage conversion unit, and the output end of the second operational amplifier is connected with the grid electrode of the second NMOS tube; a first mirror current output end of the current mirror is used as a compensation output end of the current compensation unit, and a second mirror current output end of the current mirror is connected with a drain electrode of the second NMOS tube; the source electrode of the second NMOS tube is respectively connected with the first end of the fifth resistor, the input end of the compensation current source and the inverted input end of the second operational amplifier; and the second end of the fifth resistor and the output end of the compensation current source are both grounded.
Optionally, a positive power supply terminal of the first operational amplifier is connected to the positive input terminal of the voltage conversion unit, and a negative power supply terminal of the first operational amplifier is grounded;
the current compensation unit comprises a current mirror, a seventh resistor, a fifth PMOS (P-channel metal oxide semiconductor) tube, a sixth NMOS (N-channel metal oxide semiconductor) tube, a seventh NMOS tube and a compensation current source; the size ratio of the sixth NMOS tube to the seventh NMOS tube is 1:2, and the current of the compensation current source is equal to the working current of the first operational amplifier;
a first mirror current output end of the current mirror is used as a compensation output end of the current compensation unit and is connected with a first end of the seventh resistor; a second end of the seventh resistor is connected with a source electrode of the fifth PMOS tube, the fifth PMOS tube and the first PMOS tube share a grid electrode, and a drain electrode of the fifth PMOS tube is respectively connected with a drain electrode and a grid electrode of the sixth NMOS tube and a grid electrode of the seventh NMOS tube; a second mirror current output end of the current mirror is respectively connected with a drain electrode of the seventh NMOS tube and an input end of the compensation current source; and the source electrode of the sixth NMOS tube, the source electrode of the seventh NMOS tube and the output end of the compensation current source are all grounded.
Optionally, the first operational amplifier includes a sixth PMOS transistor, a seventh PMOS transistor, an eighth NMOS transistor, a ninth NMOS transistor, a fourth current source, a fifth current source, an eighth resistor, a second capacitor, and a second zener diode; the magnitude of the current of the fifth current source is twice that of the fourth current source;
the source electrode of the sixth PMOS tube, the source electrode of the seventh PMOS tube and the source electrode of the eighth PMOS tube are connected with the cathode of the second Zener diode and are used as the positive power supply terminal of the first operational amplifier; the drain electrode and the grid electrode of the sixth PMOS tube are both connected with the grid electrode of the seventh PMOS tube and the drain electrode of the eighth NMOS tube, and the grid electrode of the eighth NMOS tube is used as the inverting input end of the first operational amplifier; the drain electrode of the seventh PMOS tube is respectively connected with the first end of the eighth resistor, the gate electrode of the eighth PMOS tube and the drain electrode of the ninth NMOS tube; a second end of the eighth resistor is connected with a first end of the second capacitor; a drain electrode of the eighth PMOS transistor is connected to the second end of the second capacitor, the input end of the fifth current source, and an anode of the second zener diode, respectively, and serves as an output end of the first operational amplifier; a grid electrode of the ninth NMOS tube is used as a positive phase input end of the first operational amplifier, and source electrodes of the ninth NMOS tube and the eighth NMOS tube are both connected with an input end of the fourth current source; the output ends of the fourth current source and the fifth current source are both grounded.
In a second aspect, the present application also discloses a battery voltage detection module of a battery pack, which includes a switch array and a detection circuit of any one of the above battery voltages;
the input end of the switch array is connected with each battery in the battery pack, the first output end of the switch array is connected with the positive input end of the detection circuit, and the second output end of the switch array is connected with the negative input end of the detection circuit, and is used for connecting the corresponding target battery into the detection circuit when the target switch in the switch array is closed.
The application also discloses a battery voltage detection module of another battery pack, wherein the battery pack comprises K batteries which are connected in series, and the battery voltage detection module comprises a current multi-path compensation unit and K voltage conversion units which are respectively in one-to-one correspondence with the batteries;
the positive input end of each voltage conversion unit is connected with the positive electrode of the corresponding battery, and the negative input end of each voltage conversion unit is connected with the negative electrode of the corresponding battery, wherein the voltage conversion unit connected with the positive electrode of the battery pack is a first voltage conversion unit;
the voltage conversion unit comprises a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a first NMOS (N-channel metal oxide semiconductor) tube; a first end of the first resistor is connected with a first end of the third resistor and serves as a positive input end of the voltage conversion unit; the second end of the first resistor is respectively connected with the first end of the second resistor and the inverting input end of the first operational amplifier; a second end of the second resistor is used as a negative input end of the voltage conversion unit; a second end of the third resistor is connected with a positive phase input end of the first operational amplifier and a drain electrode of the first NMOS transistor respectively; the source electrode of the first NMOS transistor is connected with the first end of the fourth resistor and serves as the output end of the voltage conversion unit, the second end of the fourth resistor is grounded, and the grid electrode of the first MOS transistor is connected with the output end of the first operational amplifier;
the current multi-path compensation unit comprises K paths of output current mirrors, compensation resistors and K compensation NMOS tubes which are in one-to-one correspondence with the voltage conversion units respectively; the input end of the K-path output current mirror is connected with the positive input end of the first voltage conversion unit, K-1 mirror current output ends of the K-path output current mirror are respectively connected with the positive input ends of the other voltage conversion units so as to perform current compensation, and one mirror current output end of the K-path output current mirror is respectively connected with the drain electrode of each compensation NMOS tube; each compensation NMOS tube shares a grid with the first NMOS tube in the corresponding voltage conversion unit, the source electrode of each compensation NMOS tube is connected with the first end of the compensation resistor, and the second end of the compensation resistor is grounded.
The detection circuit of the battery voltage comprises a voltage conversion unit and a current compensation unit; the voltage conversion unit is used for detecting the battery voltage of the connected target battery; the compensation output end of the current compensation unit is connected with the positive input end of the voltage conversion unit and is used for performing current compensation on the voltage conversion unit; the voltage conversion unit comprises a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a first MOS (metal oxide semiconductor) tube; a first end of the first resistor is connected with a first end of the third resistor and serves as a positive input end of the voltage conversion unit; the second end of the first resistor is respectively connected with the first end of the second resistor and the first input end of the first operational amplifier; a second end of the second resistor is used as a negative input end of the voltage conversion unit; a second end of the third resistor is respectively connected with a second input end of the first operational amplifier and a first end of the first MOS tube; the second end of the first MOS tube is connected with the first end of the fourth resistor and serves as the output end of the voltage conversion unit, the second end of the fourth resistor is grounded, and the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier.
Therefore, the battery voltage detection circuit provided by the application utilizes the negative feedback effect of the operational amplifier to clamp the voltage and is matched with the voltage division effect of the series resistor, so that the battery voltage detection can be performed on the target battery connected with the circuit, and the backflow of partial current in the target battery is effectively realized. Therefore, the current compensation of the rest currents can be realized by using the current compensation unit with a simple structure, so that the balance of the current consumed by each battery is effectively ensured in the process of carrying out voltage detection on each battery in the battery pack one by one, and the service life of the battery pack is prolonged, and the economic benefit of products is improved. The battery voltage detection module of the battery pack provided by the application comprises the battery voltage detection circuit and also has the beneficial effects.
Drawings
In order to more clearly illustrate the technical solutions in the prior art and the embodiments of the present application, the drawings used in the description of the prior art and the embodiments of the present application will be briefly described below. Of course, the following description of the drawings related to the embodiments of the present application is only a part of the embodiments of the present application, and it will be obvious to those skilled in the art that other drawings can be obtained from the provided drawings without any creative effort, and the obtained other drawings also belong to the protection scope of the present application.
Fig. 1 is a schematic structural diagram of a battery voltage detection circuit according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a first operational amplifier according to one embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a battery voltage detection circuit according to another embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a battery voltage detection circuit according to another embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of a first operational amplifier in another embodiment provided by the present application;
fig. 6 is a schematic structural diagram of a battery voltage detection module of a battery pack according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of a battery voltage detection module of a battery pack according to another embodiment of the present disclosure.
Detailed Description
The core of the application lies in providing a simple structure, reasonable battery voltage's detection circuitry and the battery voltage detection module of a group battery to solve the unbalanced problem of battery current effectively, and effectively improve product economic benefits simultaneously.
In order to more clearly and completely describe the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the application discloses a detection circuit of battery voltage, which is shown in fig. 1 and comprises a voltage conversion unit 1 and a current compensation unit 2; the input end of the voltage conversion unit 1 is used for connecting with a target battery so as to detect the battery voltage of the target battery; the compensation output end of the current compensation unit 2 is connected with the positive input end of the voltage conversion unit 1 and is used for performing current compensation on the voltage conversion unit 1;
the voltage conversion unit 1 comprises a first operational amplifier OPA1 and a first resistor R1A second resistor R2A third resistor R3A fourth resistor R4And a first MOS transistor T; a first resistor R1First terminal and third resistor R3Is connected to and serves as the positive input terminal BATP of the voltage conversion unit 1; a first resistor R1Respectively with a second terminal of a second resistor R2Is connected to a first input of a first OPA 1; a second resistor R2The second terminal of the voltage conversion unit 1 is used as a negative input terminal BATN of the voltage conversion unit 1; third resistor R3The second end of the second transistor is respectively connected with the second input end of the first operational amplifier OPA1 and the first end of the first MOS transistor T; the second end of the first MOS transistor T and the fourth resistor R4Is connected to and serves as an output terminal of the voltage conversion unit 1, a fourth resistor R4The second terminal of the first MOS transistor T is grounded, and the gate of the first MOS transistor T is connected to the output terminal of the first operational amplifier OPA 1.
Specifically, the voltage conversion sheet provided by the applicationElement 1 is implemented primarily based on the first op-amp. The positive input terminal BATP of the voltage conversion unit 1 is used for being connected with the positive electrode of the target battery, and the negative input terminal BATN is used for being connected with the negative electrode of the target battery. A first resistor R1And a second resistor R2Is connected in series between the positive input terminal BATP and the negative input terminal BATN, the first resistor R1VV of1Voltage V of target batteryeProportionally, and the first resistor R is clamped by the negative feedback of the first operational amplifier OPA11VV of1And a third resistor R3VV of3Equal, then there are:
Figure GDA0003541067430000071
output voltage V of voltage conversion unit 1outIn fact the fourth resistor R4VV of4According to the principle of resistance voltage division, the fourth resistor R4VV of4And a third resistor R3VV of3If a proportional relationship exists, then:
Figure GDA0003541067430000081
thus, the battery voltage detection of the target battery can be realized. In particular, if the first resistance R1And a second resistor R2Equal, third resistance R3And a fourth resistor R4Equal, then Vout＝Ve/2。
As shown in fig. 1, a first resistor R1And a second resistor R2Current I flowing upwardsBATPFlows into the detection circuit from the positive input terminal BATP, i.e. the positive pole of the target battery, and flows back to the negative pole of the target battery from the negative input terminal BATP, so that the current IBATPOnly the target battery in the battery pack flows through, and other batteries do not flow through, so that the unbalance of the battery current can not be caused in the process of carrying out battery voltage detection by taking each battery in the battery pack as the target battery one by oneProblem, therefore, it is not necessary to apply the current IBATPCompensation is performed.
Current IV2VFlows into the third resistor R from the positive input terminal BATP, i.e. the positive electrode of the target battery3And a fourth resistor R4The current I is consumed by all the batteries connected in series between the target battery and the ground wire, including the target batteryV2VAnd all the batteries (excluding the target battery) connected in series between the target battery and the positive electrode of the battery pack do not consume the current IV2VThis causes current imbalance, so current I needs to be balancedV2VCompensation is performed.
According to the above analysis, the battery voltage detection circuit provided by the present application only needs to detect the current IV2VCompensation is carried out without the need for current IBATPCompensation is performed, whereby the current compensation unit 2 having a simpler structure than the prior art can be used in cooperation. Specifically, the compensation output end of the current compensation unit 2 is connected to the positive input end BATP, and the magnitude of the output compensation current and the current I areV2VAre equal.
By the current compensation of the current compensation unit 2, the voltage conversion unit 1 does not draw the divided current I from the positive input terminal BATPBATPOther currents than electric current. Therefore, in the process of detecting the battery voltage of each battery in the battery pack one by one, the current consumed by each battery can be effectively ensured to be equal and balanced.
The detection circuit of the battery voltage provided by the application comprises a voltage conversion unit 1 and a current compensation unit 2; the input end of the voltage conversion unit 1 is used for being connected with a target battery so as to detect the battery voltage of the target battery; the compensation output end of the current compensation unit 2 is connected with the positive input end of the voltage conversion unit 1 and is used for performing current compensation on the voltage conversion unit 1; the voltage conversion unit 1 comprises a first operational amplifier OPA1 and a first resistor R1A second resistor R2A third resistor R3A fourth resistor R4And a first MOS transistor; a first resistor R1First terminal and third resistor R3Is connected as a voltage conversionA positive input terminal BATP of the unit 1; a first resistor R1Respectively with a second terminal of a second resistor R2Is connected to a first input of a first OPA 1; a second resistor R2The second terminal of the voltage conversion unit 1 is used as a negative input terminal BATN of the voltage conversion unit 1; third resistor R3The second end of the second transistor is respectively connected with the second input end of the first operational amplifier OPA1 and the first end of the first MOS transistor T; the second end of the first MOS transistor T and the fourth resistor R4Is connected to and serves as an output terminal of the voltage conversion unit 1, a fourth resistor R4The second terminal of the first MOS transistor T is grounded, and the gate of the first MOS transistor T is connected to the output terminal of the first operational amplifier OPA 1.
Therefore, the battery voltage detection circuit provided by the application utilizes the negative feedback effect of the operational amplifier to clamp the voltage and is matched with the voltage division effect of the series resistor, so that the battery voltage detection can be performed on the target battery connected with the circuit, and the backflow of partial current in the target battery is effectively realized. Therefore, current compensation of the rest current can be achieved by the current compensation unit with a simple structure, and therefore, in the process of carrying out voltage detection on each battery in the battery pack one by one, the balance of the current consumed by each battery is effectively ensured, the service life of the battery pack is prolonged, and the economic benefit of products is improved.
Based on the above, as shown in fig. 1, as a preferred embodiment, the battery voltage detection circuit provided in the present application includes a first operational amplifier OPA1 having a first input terminal as an inverting input terminal and a second input terminal as a non-inverting input terminal; the first MOS transistor T is a first NMOS transistor N1, the first end of the first NMOS transistor N1 is a drain, and the second end of the first NMOS transistor N1 is a source.
On the basis, as shown in fig. 1, the positive power supply terminal of the first operational amplifier OPA1 is connected to the power supply input terminal of the current compensation unit 2, and the negative power supply terminal of the first operational amplifier OPA1 is grounded;
the current compensation unit 2 comprises a current mirror 21, a second NMOS transistor N2 and a fifth resistor R5(ii) a A first mirror current output end of the current mirror 21 is used as a compensation output end of the current compensation unit 2, and a second mirror current output end of the current mirror 21 is connected with a drain electrode of a second NMOS transistor N2; second NMOS transistor N2 is connected with the gate of the first NMOS transistor N1, and the source of the second NMOS transistor N2 is connected with the fifth resistor R5Is connected to the first terminal of a fifth resistor R5The second terminal of (a) is grounded.
Specifically, the positive power supply terminal of the first OPA1 can be connected to the power supply input terminal of the current compensation unit 2, and is uniformly supplied by a set power supply E, such as the positive electrode of the entire battery pack, so that the working current consumed by the first OPA1 can flow through all the batteries in the battery pack, and no current imbalance is caused.
In the current compensation unit 2, the current mirror 21 may be implemented by two PMOS of a cascode, and outputs two mirror currents: i isCOMP1＝ICOMP2. Specifically, the resistance of the fifth resistor and the resistance of the fourth resistor can be made equal, i.e., R5＝R4Whereby a current I flowing through the fifth resistorR5(and is also I)COMP2) With the current I flowing through the fourth resistorV2VAnd (3) equality: I.C. AR5＝IV2V. Thus, the compensation current input to the positive input terminal BATP of the voltage conversion unit 1 is also: i isCOMP1＝IV2VI.e. the third resistor R3And a fourth resistor R4The current flowing in the branch is compensated.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a first operational amplifier provided in the present application in an embodiment.
Based on fig. 1, as a preferred embodiment, the first operational amplifier OPA1 provided by the present application is specifically shown in fig. 2, and includes a first current source I1, a second current source I2, a third current source I3, a second PMOS transistor P2, a third PMOS transistor P3, a fourth PMOS transistor P4, a first high-voltage PMOS transistor GP1, a second high-voltage PMOS transistor GP2, a third high-voltage PMOS transistor GP3, a third NMOS transistor N3, a fourth NMOS transistor N4, a fifth NMOS transistor N5, and a sixth resistor R56A first capacitor C1And a first zener diode ZD 1;
the input end of the first current source I1 is connected with the input end of the second current source I2 and serves as the power supply positive end of the first operational amplifier OPA 1; the output end of the first current source I1 is respectively connected with the source electrode of the second PMOS tube P2, the source electrode of the third PMOS tube P3 and the source electrode of the fourth PMOS tube P4; the grid electrode of the second PMOS tube P2 is used as the inverting input end of the first operational amplifier OPA1, and the drain electrode is connected with the source electrode of the first high-voltage PMOS tube GP 1; the grid electrode of the third PMOS tube P3 is used as the positive phase input end of the first operational amplifier OPA1, and the drain electrode is connected with the source electrode of the second high-voltage PMOS tube GP 2; the drain electrode of the fourth PMOS tube P4 is connected with the source electrode of the third high-voltage PMOS tube GP3, and the fourth PMOS tube P4, the third high-voltage PMOS tube GP3, the first high-voltage PMOS tube GP1 and the second high-voltage PMOS tube GP2 share a grid electrode;
the drain electrode of the third high-voltage PMOS tube GP3 is connected with the gate electrode and the input end of a third current source I3; the drain electrode of the first high-voltage PMOS tube GP1 is respectively connected with the drain electrode and the grid electrode of a third NMOS tube N3 and the grid electrode of a fourth NMOS tube N4; the drain electrode of the second high-voltage PMOS tube GP2 is respectively connected with the drain electrode of the fourth NMOS tube N4, the grid electrode of the fifth NMOS tube N5 and the sixth resistor R6Is connected to the cathode of the first zener diode ZD 1; a sixth resistor R6Second terminal and first capacitor C1Is connected to a first terminal of a first capacitor C1The second end of the first operational amplifier is respectively connected with the output end of a second current source I2 and the drain electrode of a fifth NMOS tube N5, and is used as the output end of a first operational amplifier OPA 1; the output end of the third current source I3, the anode of the first zener diode ZD1, the source of the third NMOS transistor N3, the source of the fourth NMOS transistor N4, and the source of the fifth NMOS transistor N5 are all grounded.
The first operational amplifier OPA1 shown in fig. 2 is specifically a two-stage operational amplifier circuit, and some devices (GP1, GP2, GP3) use high-voltage devices to isolate high voltage, and the rest use low-voltage common devices to save chip area. The first zener diode ZD1, i.e. a zener diode, is also used in the circuit to prevent the fourth NMOS transistor N4 and the fifth NMOS transistor N5 from being broken down by high voltage. As can be seen from fig. 1, the gate voltage of the first NMOS transistor N1 is: vNOUT＝Vout+Vth_N1Wherein V isth_N1The threshold voltage of the first NMOS transistor is generally about 0.75V; and the battery voltage VeUsually not exceeding 4.25V, so the output voltage Vout＝VeThe/2 is not more than 2.125V. Thus, the gate voltage VNOUTTypically 2.125V + 0.75V-2.875V<5V so the first op amp OPA1 can adopt the configuration shown in fig. 2.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a battery voltage detection circuit according to another embodiment of the present disclosure.
As shown in the battery voltage detecting circuit of fig. 3, the first input terminal of the first operational amplifier OPA1 is a non-inverting input terminal, and the second input terminal of the first operational amplifier OPA1 is an inverting input terminal; the first MOS transistor T is a first PMOS transistor P1, the first end of the first PMOS transistor P1 is a source, and the second end of the first PMOS transistor P1 is a drain.
On the basis, as shown in fig. 3, the positive power supply terminal of the first operational amplifier OPA1 is connected to the positive input terminal of the voltage converting unit 2, and the negative power supply terminal of the first operational amplifier OPA1 is grounded;
the current compensation unit 2 comprises a current mirror 21, a second NMOS transistor N2, and a fifth resistor R5A second operational amplifier OPA2 and a compensation current source IS(ii) a Current I of compensating current sourceSWorking current I of the first operational amplifier OPA1OPA1Equal in size;
the positive power supply end of the second operational amplifier OPA2 is connected with the input end of the current mirror 21, the negative power supply end is grounded, the positive phase input end is connected with the output end of the voltage conversion unit 1, and the output end is connected with the grid electrode of the second NMOS transistor N2; a first mirror current output end of the current mirror 21 is used as a compensation output end of the current compensation unit 2, and a second mirror current output end of the current mirror 21 is connected with a drain electrode of a second NMOS transistor N2; the source electrode of the second NMOS transistor N2 and the fifth resistor R respectively5First terminal of (1), compensating current source ISIs connected with the inverting input of the second OPA 2; fifth resistor R5And a compensation current source ISThe output terminals of the two are all grounded.
Specifically, the point different from fig. 1 is that the first MOS transistor T in the present embodiment is specifically a first PMOS transistor P1. Since the current flowing through the first PMOS transistor P1 cannot be directly sensed, the clamping effect of the second OPA2 is required to copy the current. Thus, it increases chip area and power loss relative to fig. 1.
Another difference from fig. 1 is that the battery voltage detection circuit provided in this embodiment directly supplies power to the first OPA1 by the positive electrode of the target batteryThis is advantageous for simplifying the circuit design of the first OPA 1. Accordingly, the working current I of the OPA1 for the first operational amplifier is needed at this timeOPA1And (6) compensating.
The second OPA2 may be powered by 5V and may be implemented using a common operational amplifier. Similarly, the current mirror 21 may be implemented by two PMOS of a cascode, outputting two mirror currents: i isCOMP1＝ICOMP2. Let the fifth resistor R5And a fourth resistor R4Equal in resistance, i.e. R5＝R4Then the fifth resistance R5Current I flowing upwardsR5And a fourth resistor R4Current I flowing upwardsV2VAnd (3) equality: i isR5＝IV2V. Due to the current I of the compensating current sourceSWorking current I of the first operational amplifier OPA1OPA1Of equal size, i.e. IS＝IOPA1Therefore, the compensation current I inputted to the positive input terminal BATP of the voltage conversion unit 1COMP1Comprises the following steps:
ICOMP1＝ICOMP2＝IR5+IS＝IV2V+IOPA1。
it can be seen that the current compensation unit 2 inputs the compensation current I to the positive input terminal BATPCOMP1A first operational amplifier OPA1 and a third resistor R3The branch provides current, so that the voltage conversion unit 1 does not extract the divided current I from the positive input terminal BATPBATPOther currents than electric current. Therefore, in the process of detecting the battery voltage of each battery in the battery pack one by one, the current consumed by each battery can be effectively ensured to be equal and balanced.
It should be noted that the same reference numerals are used for the same components of the current compensation unit 2 in fig. 3 and the current compensation unit 2 in fig. 1, for example, the second NMOS transistor N2 and the fifth resistor R5。
Referring to fig. 4, fig. 4 is a schematic structural diagram of a battery voltage detection circuit according to another embodiment of the present disclosure.
As shown in fig. 4, the positive power supply terminal of the first operational amplifier OPA1 is connected to the positive input terminal of the voltage conversion unit 1, and the negative power supply terminal of the first operational amplifier OPA1 is grounded;
the current compensation unit 2 comprises a current mirror 21 and a seventh resistor R7A fifth PMOS transistor P5, a sixth NMOS transistor N6, a seventh NMOS transistor N7 and a compensation current source IS(ii) a The size ratio of the sixth NMOS transistor N6 to the seventh NMOS transistor N7 is 1:2, and the compensation current source ISAnd the operating current I of the first OPA1OPA1Equal in size;
the first mirror current output terminal of the current mirror 21 is used as the compensation output terminal of the current compensation unit 2, and is connected to the seventh resistor R7Is connected with the first end of the first connecting pipe; a seventh resistor R7The second end of the first PMOS tube P5 is connected with the source electrode of a fifth PMOS tube P5, the fifth PMOS tube P5 shares the grid electrode with the first PMOS tube P1, and the drain electrode of the fifth PMOS tube P5 is respectively connected with the drain electrode and the grid electrode of a sixth NMOS tube N6 and the grid electrode of a seventh NMOS tube N7; a second mirror current output end of the current mirror 21 is respectively connected with a drain electrode of the seventh NMOS transistor N7 and an input end of the compensation current source; the source electrode of the sixth NMOS transistor N6, the source electrode of the seventh NMOS transistor N7 and the output end of the compensation current source are all grounded.
Specifically, compared with the current compensation unit 2 shown in fig. 3, the current compensation unit 2 shown in fig. 4 does not use the second operational amplifier for current replication, but realizes proportional current output based on the MOS transistor. The current mirror 21 may be specifically implemented by two PMOS of a cascode, and outputs two mirror currents: i isCOMP1＝ICOMP2。
Make the resistance of the seventh resistor and the third resistor R3Is equal, the seventh resistor R7The current flowing through and the third resistor R3The currents flowing through are equal and are all IV2V. Since the size ratio of the sixth NMOS transistor N6 to the seventh NMOS transistor N7 is 1:2, the current I flowing through the seventh NMOS transistor N7N7Is the current I flowing through the sixth NMOS transistor N6 V2V2 times of: I.C. AN7＝2IV2V. The current of the compensating current source is ISWith the operating current I of the first operational amplifier OPA1OPA1Of equal size, i.e. IS＝IOPA1. The compensation current input to the positive input terminal BATP of the voltage converting unit 1 is thus:
ICOMP1＝ICOMP2＝IN7+IS＝2IV2V+IOPA1。
as can be seen, the compensation current ICOMP1Can be a first operational amplifier OPA1 and a third resistor R3The branch and the seventh resistor R7The branch provides current, so that the voltage conversion unit 1 does not extract the divided current I from the positive input terminal BATPBATPOther currents than electric current. Therefore, in the process of detecting the battery voltage of each battery in the battery pack one by one, the current consumed by each battery can be effectively ensured to be equal and balanced.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a first operational amplifier provided in the present application in another embodiment. For fig. 3 or fig. 4, the first OPA1 may specifically adopt the structure shown in fig. 5.
On the basis of the above, as shown in fig. 5, the first operational amplifier OPA1 includes a sixth PMOS transistor P6, a seventh PMOS transistor P7, an eighth PMOS transistor P8, an eighth NMOS transistor N8, a ninth NMOS transistor N9, a fourth current source I4, a fifth current source I5, and an eighth resistor R58A second capacitor C2And a second zener diode ZD 2; the magnitude of the current of the fifth current source I5 is twice the magnitude of the current of the fourth current source I4;
the source electrode of the sixth PMOS tube P6, the source electrode of the seventh PMOS tube P7 and the source electrode of the eighth PMOS tube P8 are connected with the cathode of the second Zener diode ZD2 and are used as the positive power supply terminal of the first operational amplifier OPA 1; the drain and the gate of the sixth PMOS transistor P6 are both connected to the gate of the seventh PMOS transistor P7 and the drain of the eighth NMOS transistor N8, and the gate of the eighth NMOS transistor N8 is used as the inverting input terminal of the first operational amplifier OPA 1; the drain electrode of the seventh PMOS transistor P7 and the eighth resistor R8The first end of the eighth PMOS tube P8, the gate of the eighth NMOS tube N9 are connected; eighth resistor R8Second terminal and second capacitor C2Is connected with the first end of the first connecting pipe; the drain of the eighth PMOS transistor P8 and the second capacitor C2Is connected to the input of the fifth current source I5 and to the anode of the second zener diode ZD2 and serves as the output of the first op amp OPA 1; the gate of the ninth NMOS transistor N9 is used as the non-inverting input terminal of the first operational amplifier OPA1, and the sources of the ninth NMOS transistor N9 and the eighth NMOS transistor N8 are both connected to the input terminal of the fourth current source I4; a fourth current source I4 and a fifth current source IThe output terminals of the current source I5 are all connected to ground.
Since the current magnitude of the fifth current source I5 is twice that of the fourth current source I4, i.e., I5 is 2I4, the operating current of the first operational amplifier OPA1 shown in fig. 5 is specifically IOPA1＝I4+I5＝3·I4。
Further, please refer to fig. 6, fig. 6 is a schematic structural diagram of a battery voltage detection module of the battery pack provided in the present application in an embodiment, mainly including a switch array and any one of the above battery voltage detection circuits;
the input end of the switch array is connected with each battery in the battery pack, the first output end of the switch array is connected with the positive input end of the detection circuit, and the second output end of the switch array is connected with the negative input end of the detection circuit and used for connecting the corresponding target battery into the detection circuit when the target switch in the switch array is closed.
Specifically, as shown in fig. 6, if the battery pack includes K batteries connected in series, the switch array includes K switch groups, each switch group corresponds to one battery and is composed of a positive switch S × P and a negative switch S × N, where × represents the group number of the switch group and has a value range of 1,2, …, K. Each switch group is connected to the two ends of the positive electrode and the negative electrode of the corresponding battery, wherein one end of a positive electrode switch S P is connected with the positive electrode of the battery, and the other end of the positive electrode switch S P is connected to a positive input terminal BATP of the detection circuit; one end of the negative switch S × N is connected to the negative electrode of the battery, and the other end is connected to the positive input terminal BATN of the detection circuit.
In fig. 6, the K value is specifically 6, and those skilled in the art can set other values by themselves. It should be noted that the detection circuit used in the battery voltage detection module shown in fig. 6 is specifically the detection circuit shown in fig. 1, and those skilled in the art may also use the detection circuit shown in fig. 3 or fig. 4, which is not limited in the present application.
When voltage detection needs to be carried out on a certain battery, only the switch group corresponding to the battery needs to be closed. For example, when the voltage of the battery 4 is to be detected, the corresponding positive switch S4P and negative switch S4N may be controlled to be closed so as to connect the battery 4 to a subsequent circuit.
It is easily understood that the battery voltage detection module of the battery pack implemented by using the switch array in fig. 6 can detect the voltage of only one battery at a time, and thus may be referred to as a discrete time type battery voltage detection module. Under the same detection concept, a continuous time type battery voltage detection module can be realized by using the detection circuit shown in fig. 1.
Referring to fig. 7, fig. 7 is a schematic structural diagram of a battery voltage detection module of a battery pack according to another embodiment of the present disclosure.
As shown in fig. 7, the battery pack includes K batteries connected in series, and the battery voltage detection module includes a current multi-path compensation unit 3 and K voltage conversion units 1 corresponding to the batteries one to one;
the positive input end of each voltage conversion unit 1 is respectively connected with the positive electrode of the corresponding battery, the negative input end of each voltage conversion unit 1 is respectively connected with the negative electrode of the corresponding battery, wherein the voltage conversion unit connected with the positive electrode of the battery pack is a first voltage conversion unit;
the voltage conversion unit 1 comprises a first operational amplifier and a first resistor R1_*A second resistor R2_*A third resistor R3_*A fourth resistor R4_*And a first NMOS transistor N1 _; a first resistor R1_*First terminal and third resistor R3_*Is connected and serves as the positive input of the voltage conversion unit 1; a first resistor R1_*Respectively with a second terminal of a second resistor R2_*The first terminal of the first operational amplifier OPA1_, is connected to the inverting input terminal of the first operational amplifier; a second resistor R2_*As a negative input terminal of the voltage converting unit 1; third resistor R3_*The second end of the first operational amplifier is respectively connected with the positive phase input end of the first operational amplifier OPA1 and the drain electrode of the first NMOS tube N1; the source of the first NMOS transistor N1 and a fourth resistor R4_*As an output terminal of the voltage converting unit 1, a fourth resistor R4_*The second end of the first MOS transistor N1 is grounded, and the gate of the first MOS transistor N1 is connected to the output end of the first operational amplifier OPA 1;
the current multi-path compensation unit 3 comprises K paths of output current mirrors 31, compensation resistors RCC and K compensation NMOS tubes Ns (n + n) which are respectively in one-to-one correspondence with the voltage conversion units 1; the input end of the K-path output current mirror 31 is connected with the positive input end of the first voltage conversion unit, K-1 mirror current output ends of the K-path output current mirror 31 are respectively connected with the positive input ends of the other voltage conversion units 1 so as to perform current compensation, and one mirror current output end of the K-path output current mirror 31 is respectively connected with the drain electrode of each compensation NMOS tube Ns _; each compensation NMOS transistor Ns _ is respectively connected to a common gate of a first NMOS transistor N1_ in the corresponding voltage converting unit 1, a source of each compensation NMOS transistor Ns _ is connected to a first terminal of the compensation resistor RCC, and a second terminal of the compensation resistor RCC is grounded.
Wherein, the value range of 1,2, …, K; the representation corresponding to the first cell, e.g. R3_1That is, the third resistance in the voltage converting unit 1 corresponding to the 1 st cell (i.e., the cell 1 with its negative electrode grounded), and the others are similar. It should be noted that the circuit shown in fig. 7 is specifically an example of a battery pack formed by 3 batteries, that is, K is 3, and those skilled in the art can set other values according to the actual application. The circuit shown in fig. 7 is a time-continuous battery voltage detection module that can simultaneously detect the voltage of all the batteries in the battery pack by providing the voltage conversion units 1 in the same number as the number of the batteries.
Taking fig. 7 as an example, the operating current of each first operational amplifier OPA1 _isiOPA1Respective first resistors R1_*All the current flowing through the current collector is IBATP. The 3-path output current mirror 31 is specifically realized by three cascode PMOS tubes, and the magnitudes of the output 3-path mirror currents are ICOMP1＝ICOMP2＝ICOMP3＝ICOMP. Make the resistance of the compensation resistor RCC and each fourth resistor R4_*Each third resistor R3_*Is equal, the current I flowing through the compensation resistor RCCCOMP1With respective third resistors R3_*The current flowing in the upper part is equal: i isCOMP1＝IV2V. In addition, a mirror current ICOMP2For compensating a third resistance R corresponding to the battery 13_1Current I ofV2VAnother mirror current ICOMP3For compensating a third resistance R corresponding to the battery 23_2Current I ofV2V. Thus, each cell consumes current:
IE1＝IE2＝IE3＝IBATP+3IOPA1+3IV2V+ICOMP＝IBATP+3IOPA1+4IV2V。
therefore, the battery voltage detection module of the battery pack provided by the application utilizes the negative feedback effect of the operational amplifier to clamp the voltage and is matched with the voltage division effect of the series resistor, so that the battery voltage detection module not only can detect the battery voltage of the target battery connected with the circuit, but also effectively realizes the backflow of partial current in the target battery. Therefore, the current compensation of the rest currents can be realized by using the current compensation unit with a simple structure, so that the balance of the current consumed by each battery is effectively ensured in the process of carrying out voltage detection on each battery in the battery pack one by one, and the service life of the battery pack is prolonged, and the economic benefit of products is improved.
The specific implementation of the battery voltage detection circuit module of the battery pack provided in the present application and the above-described battery voltage detection circuit may be referred to correspondingly, and are not described herein again.
The embodiments in the present application are described in a progressive manner, and each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
It is further noted that, throughout this document, relational terms such as "first" and "second" are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Furthermore, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The technical solutions provided by the present application are described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, without departing from the principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall into the protection scope of the present application.

Claims (10)

1. The detection circuit of a kind of battery voltage, characterized by, including voltage conversion unit and current compensation unit; the voltage conversion unit is used for detecting the battery voltage of the connected target battery; the compensation output end of the current compensation unit is connected with the positive input end of the voltage conversion unit and is used for performing current compensation on the voltage conversion unit;
the voltage conversion unit comprises a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a first MOS (metal oxide semiconductor) tube; a first end of the first resistor is connected with a first end of the third resistor and serves as a positive input end of the voltage conversion unit; the second end of the first resistor is respectively connected with the first end of the second resistor and the first input end of the first operational amplifier; a second end of the second resistor is used as a negative input end of the voltage conversion unit; a second end of the third resistor is respectively connected with a second input end of the first operational amplifier and a first end of the first MOS tube; the second end of the first MOS tube is connected with the first end of the fourth resistor and serves as the output end of the voltage conversion unit, the second end of the fourth resistor is grounded, and the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier.
2. The battery voltage detection circuit of claim 1, wherein the first input terminal of the first operational amplifier is an inverting input terminal, and the second input terminal of the first operational amplifier is a non-inverting input terminal; the first MOS tube is a first NMOS tube, the first end of the first NMOS tube is a drain electrode, and the second end of the first NMOS tube is a source electrode.
3. The battery voltage detection circuit according to claim 2, wherein a positive power supply terminal of the first operational amplifier is connected to the power input terminal of the current compensation unit, and a negative power supply terminal of the first operational amplifier is grounded;
the current compensation unit comprises a current mirror, a second NMOS tube and a fifth resistor; a first mirror current output end of the current mirror is used as a compensation output end of the current compensation unit, and a second mirror current output end of the current mirror is connected with a drain electrode of the second NMOS tube; the grid electrode of the second NMOS tube is connected with the grid electrode of the first NMOS tube, the source electrode of the second NMOS tube is connected with the first end of the fifth resistor, and the second end of the fifth resistor is grounded.
4. The battery voltage detection circuit of claim 2, wherein the first operational amplifier comprises a first current source, a second current source, a third current source, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first high-voltage PMOS transistor, a second high-voltage PMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor, a sixth resistor, a first capacitor, and a first zener diode;
the input end of the first current source is connected with the input end of the second current source and is used as a power supply positive end of the first operational amplifier; the output end of the first current source is respectively connected with the source electrode of the second PMOS tube, the source electrode of the third PMOS tube and the source electrode of the fourth PMOS tube; the grid electrode of the second PMOS tube is used as the inverted input end of the first operational amplifier, and the drain electrode of the second PMOS tube is connected with the source electrode of the first high-voltage PMOS tube; the grid electrode of the third PMOS tube is used as a positive phase input end of the first operational amplifier, and the drain electrode of the third PMOS tube is connected with the source electrode of the second high-voltage PMOS tube; the drain electrode of the fourth PMOS tube is connected with the source electrode of the third high-voltage PMOS tube, and the fourth PMOS tube, the third high-voltage PMOS tube, the first high-voltage PMOS tube and the second high-voltage PMOS tube share a grid electrode;
the drain electrode of the third high-voltage PMOS tube is connected with the grid electrode and the input end of the third current source; the drain electrode of the first high-voltage PMOS tube is respectively connected with the drain electrode and the grid electrode of the third NMOS tube and the grid electrode of the fourth NMOS tube; the drain electrode of the second high-voltage PMOS tube is respectively connected with the drain electrode of the fourth NMOS tube, the grid electrode of the fifth NMOS tube, the first end of the sixth resistor and the cathode of the first Zener diode; a second end of the sixth resistor is connected with a first end of the first capacitor, and a second end of the first capacitor is respectively connected with an output end of the second current source and a drain electrode of the fifth NMOS transistor and serves as an output end of the first operational amplifier; the output end of the third current source, the anode of the first zener diode, the source electrode of the third NMOS tube, the source electrode of the fourth NMOS tube and the source electrode of the fifth NMOS tube are all grounded.
5. The battery voltage detection circuit of claim 1, wherein the first input terminal of the first operational amplifier is a non-inverting input terminal, and the second input terminal of the first operational amplifier is an inverting input terminal; the first MOS tube is a first PMOS tube, the first end of the first PMOS tube is a source electrode, and the second end of the first PMOS tube is a drain electrode.
6. The battery voltage detection circuit of claim 5, wherein a positive power supply terminal of the first operational amplifier is connected to the positive input terminal of the voltage conversion unit, and a negative power supply terminal of the first operational amplifier is grounded;
the current compensation unit comprises a current mirror, a second NMOS tube, a fifth resistor, a second operational amplifier and a compensation current source; the current of the compensation current source is equal to the working current of the first operational amplifier in magnitude;
the positive power supply end of the second operational amplifier is connected with the input end of the current mirror, the negative power supply end is grounded, the positive phase input end of the second operational amplifier is connected with the output end of the voltage conversion unit, and the output end of the second operational amplifier is connected with the grid electrode of the second NMOS tube; a first mirror current output end of the current mirror is used as a compensation output end of the current compensation unit, and a second mirror current output end of the current mirror is connected with a drain electrode of the second NMOS tube; a source electrode of the second NMOS tube is respectively connected with a first end of the fifth resistor, an input end of the compensation current source and an inverted input end of the second operational amplifier; and the second end of the fifth resistor and the output end of the compensation current source are both grounded.
7. The battery voltage detection circuit of claim 5, wherein a positive power supply terminal of the first operational amplifier is connected to the positive input terminal of the voltage conversion unit, and a negative power supply terminal of the first operational amplifier is grounded;
the current compensation unit comprises a current mirror, a seventh resistor, a fifth PMOS (P-channel metal oxide semiconductor) tube, a sixth NMOS (N-channel metal oxide semiconductor) tube, a seventh NMOS tube and a compensation current source; the size ratio of the sixth NMOS tube to the seventh NMOS tube is 1:2, and the current of the compensation current source is equal to the working current of the first operational amplifier;
a first mirror current output end of the current mirror is used as a compensation output end of the current compensation unit and is connected with a first end of the seventh resistor; a second end of the seventh resistor is connected with a source electrode of the fifth PMOS tube, the fifth PMOS tube and the first PMOS tube share a grid electrode, and a drain electrode of the fifth PMOS tube is respectively connected with a drain electrode and a grid electrode of the sixth NMOS tube and a grid electrode of the seventh NMOS tube; a second mirror current output end of the current mirror is respectively connected with a drain electrode of the seventh NMOS tube and an input end of the compensation current source; and the source electrode of the sixth NMOS tube, the source electrode of the seventh NMOS tube and the output end of the compensation current source are all grounded.
8. The battery voltage detection circuit of claim 5, wherein the first operational amplifier comprises a sixth PMOS transistor, a seventh PMOS transistor, an eighth NMOS transistor, a ninth NMOS transistor, a fourth current source, a fifth current source, an eighth resistor, a second capacitor, and a second Zener diode; the magnitude of the current of the fifth current source is twice that of the fourth current source;
the source electrode of the sixth PMOS tube, the source electrode of the seventh PMOS tube and the source electrode of the eighth PMOS tube are connected with the cathode of the second Zener diode and are used as the positive power supply terminal of the first operational amplifier; the drain and the gate of the sixth PMOS tube are both connected with the gate of the seventh PMOS tube and the drain of the eighth NMOS tube, and the gate of the eighth NMOS tube is used as the inverting input end of the first operational amplifier; the drain electrode of the seventh PMOS tube is respectively connected with the first end of the eighth resistor, the gate electrode of the eighth PMOS tube and the drain electrode of the ninth NMOS tube; a second end of the eighth resistor is connected with a first end of the second capacitor; a drain electrode of the eighth PMOS transistor is connected to the second end of the second capacitor, the input end of the fifth current source, and an anode of the second zener diode, respectively, and serves as an output end of the first operational amplifier; a grid electrode of the ninth NMOS tube is used as a positive phase input end of the first operational amplifier, and source electrodes of the ninth NMOS tube and the eighth NMOS tube are both connected with an input end of the fourth current source; the output ends of the fourth current source and the fifth current source are both grounded.
9. A battery voltage detection module of a battery pack, characterized by comprising a switch array and a detection circuit of a battery voltage according to any one of claims 1 to 8;
the input end of the switch array is connected with each battery in the battery pack, the first output end of the switch array is connected with the positive input end of the detection circuit, and the second output end of the switch array is connected with the negative input end of the detection circuit, and is used for connecting the corresponding target battery into the detection circuit when the target switch in the switch array is closed.
10. The battery voltage detection module of the battery pack is characterized in that the battery pack comprises K batteries which are connected in series, and the battery voltage detection module comprises a current multi-path compensation unit and K voltage conversion units which are respectively in one-to-one correspondence with the batteries;
the positive input end of each voltage conversion unit is connected with the positive electrode of the corresponding battery, and the negative input end of each voltage conversion unit is connected with the negative electrode of the corresponding battery, wherein the voltage conversion unit connected with the positive electrode of the battery pack is a first voltage conversion unit;
the voltage conversion unit comprises a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a first NMOS (N-channel metal oxide semiconductor) tube; a first end of the first resistor is connected with a first end of the third resistor and serves as a positive input end of the voltage conversion unit; the second end of the first resistor is respectively connected with the first end of the second resistor and the inverting input end of the first operational amplifier; a second end of the second resistor is used as a negative input end of the voltage conversion unit; a second end of the third resistor is connected with a positive phase input end of the first operational amplifier and a drain electrode of the first NMOS transistor respectively; the source electrode of the first NMOS tube is connected with the first end of the fourth resistor and serves as the output end of the voltage conversion unit, the second end of the fourth resistor is grounded, and the grid electrode of the first NMOS tube is connected with the output end of the first operational amplifier;
the current multi-path compensation unit comprises K paths of output current mirrors, compensation resistors and K compensation NMOS tubes which are respectively in one-to-one correspondence with the voltage conversion units; the input end of the K-path output current mirror is connected with the positive input end of the first voltage conversion unit, K-1 mirror current output ends of the K-path output current mirror are respectively connected with the positive input ends of the other voltage conversion units so as to perform current compensation, and one mirror current output end of the K-path output current mirror is respectively connected with the drain electrode of each compensation NMOS tube; each compensation NMOS tube shares a grid with the first NMOS tube in the corresponding voltage conversion unit, the source electrode of each compensation NMOS tube is connected with the first end of the compensation resistor, and the second end of the compensation resistor is grounded.
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