CN111434034B - Passband frequency adjustable differential cascode amplifier for optical communications - Google Patents
Passband frequency adjustable differential cascode amplifier for optical communications Download PDFInfo
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- CN111434034B CN111434034B CN201780097457.0A CN201780097457A CN111434034B CN 111434034 B CN111434034 B CN 111434034B CN 201780097457 A CN201780097457 A CN 201780097457A CN 111434034 B CN111434034 B CN 111434034B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/45183—Long tailed pairs
- H03F3/45188—Non-folded cascode stages
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
- H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
- H03F3/082—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with FET's
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45024—Indexing scheme relating to differential amplifiers the differential amplifier amplifying transistors are cascode coupled transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45052—Indexing scheme relating to differential amplifiers the cascode stage of the cascode differential amplifier being controlled by a controlling signal, which controlling signal can also be the input signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45302—Indexing scheme relating to differential amplifiers the common gate stage of a cascode dif amp being controlled
Abstract
The invention provides a differential cascode amplifier for optical communication, comprising a first variable resistor connected to a second variable resistor, wherein the first variable resistor is further connected to a control port of a first common control port transistor, and the second variable resistor is further connected to a control port of a second common control port transistor of the cascode amplifier.
Description
Technical Field
The invention relates to the technical field of optical communication, in particular to a differential cascode amplifier for optical communication and a working method thereof. The differential cascode amplifier may specifically support passband frequency adjustment.
Background
Conventional amplifiers used for optical communication cause high Inter Symbol Interference (ISI) when the bandwidth of the conventional amplifier is lower than about 70% of the bit rate in the communication standard.
Conversely, if the bandwidth of a conventional amplifier is much higher than about 70% of the bit rate in the communication standard, the optical signal to noise ratio (OSNR) is low. Therefore, the bandwidth of a conventional amplifier used in optical communication needs to be optimized according to a target bit rate of a communication standard.
However, it is not easy to accurately predict the bandwidths of the optical transmitter and receiver (where conventional amplifiers are applied) because it depends on the interconnections between several blocks that cannot be modeled correctly. Furthermore, the frequency response depends on technology and manufacturing variations. Finally, the same optical module can be applied to different communication standards with different target bit rates. Therefore, different bandwidths are needed to achieve optimal equalization between ISI and SNR.
In this scenario, an amplifier with a tunable passband frequency is of interest to optimize the equalization between ISI and SNR directly in the field.
One way to make a conventional differential amplifier have an adjustable passband frequency response is to introduce a varactor, a variable inductor, and a variable resistor at the output side of the conventional differential amplifier.
Disclosure of Invention
In view of the above problems and deficiencies, the present invention is directed to improvements in conventional differential amplifiers.
Embodiments of the invention enable, inter alia, equalization optimization between ISI and OSNR for transmitter and receiver chains for optical communications in which the differential cascode amplifier according to the invention is used.
With the inventive differential cascode amplifier with adjustable passband frequency response, the bandwidth of the optical transmitter and receiver can be optimized directly in the field (e.g., during operation). In an optical system based on a differential digital source, in order to improve the speed and quality of signals, a preferred scheme based on the differential cascode amplifier with adjustable passband frequency response in the invention can be adopted to realize bandwidth adjustment.
More specifically, the differential cascode amplifier according to the embodiment of the present invention has the following advantages compared to the prior art:
1. higher integration level: the proposed solution does not require the use of inductors and variable inductors, and can thus be easily integrated in Monolithic Microwave Integrated Circuit (MMIC) technology;
2. higher operating frequency: the differential cascode amplifier according to the present invention does not need to use an inductor and a variable inductor (if the inductor and the variable inductor are used, low loss at high frequency cannot be achieved), thereby minimizing high frequency loss;
3. higher linearity: variable components such as variable resistors used in the differential cascode amplifier of the present invention are inserted into the gate branches of the common-gate transistors, where the amplitude of the radio frequency signal is very small. Therefore, the variable component operates at a low signal level, resulting in little nonlinearity;
4. higher reliability: variable components such as variable resistors used in the differential cascode amplifier of the present invention are inserted into the gate legs of the common-gate transistors, where the magnitude of the Direct Current (DC) voltage and current is minimized. Therefore, power processing can be realized easily.
The object of the invention is achieved by the solution presented in the appended independent claims. Advantageous embodiments of the invention are further defined in the dependent claims.
A first aspect of the invention provides a differential cascode amplifier for optical communication, comprising a first variable resistor connected to a second variable resistor, wherein the first variable resistor is further connected to a control port of a first common control port transistor and the second variable resistor is further connected to a control port of a second common control port transistor of the cascode amplifier.
In a first implementation of the differential cascode amplifier according to the first aspect, the differential cascode amplifier may further comprise a first voltage source, wherein the first voltage source may be connected with the first variable resistor and the first voltage source may be connected with the second variable resistor.
In a second implementation form of the differential cascode amplifier according to the first aspect, the differential cascode amplifier may further comprise a first output port and a second output port, wherein the first output port may be connected to the first common control port transistor and the second output port may be connected to the second common control port transistor.
In a third implementation form of the differential cascode amplifier according to the first aspect, the connecting the first common control port transistor to the first output port may include: the first output port may be connected to an output port of the first common control port transistor; the connecting the second common control port transistor to the second output port may include: the second output port may be connected to an output port of the second common control port transistor.
In a fourth implementation form of the differential cascode amplifier according to the first aspect, the differential cascode amplifier may further comprise a first resistor, a second resistor and a second voltage source, wherein the first resistor may be connected to the first common control port transistor, the second resistor may be connected to the second common control port transistor, and the first resistor and the second resistor may be connected to the second voltage source.
In a fifth implementation form of the differential cascode amplifier according to the first aspect, the connecting the first resistor to the first common control port transistor may comprise: the first resistor may be connected to an output port of the first common control port transistor; the second resistor 205 being connected to the second common control port transistor may include: the second resistor may be connected to an output port of the second common control port transistor.
In a sixth implementation form of the differential cascode amplifier according to the first aspect, the differential cascode amplifier may further comprise a first common input port transistor, a second common input port transistor and a first current source, the first common input port transistor may be connected to the first common control port transistor, the second common input port transistor may be connected to the second common control port transistor, and the first current source may be connected to the first common input port transistor and the second common input port transistor.
In a seventh implementation form of the differential cascode amplifier according to the first aspect, the connecting the first common input port transistor and the first common control port transistor may include: an output port of the first common input port transistor may be connected with an input port of the first common control port transistor; the second common input port transistor connected to the second common control port transistor may include: an output port of the second common input port transistor may be connected with an input port of the second common control port transistor; the first current source connected to the first common input port transistor and the second common input port transistor may include: the first current source may be connected to an input port of the first common input port transistor and an input port of the second common input port transistor.
In an eighth implementation form of the differential cascode amplifier according to the first aspect, the differential cascode amplifier may further comprise a first input port and a second input port, the first input port may be connected to the first common input port transistor, preferably to the control port of the first common input port transistor, and the second input port may be connected to the second common input port transistor, preferably to the control port of the second common input port transistor.
In a ninth implementation form of the differential cascode amplifier according to the first aspect, the first variable resistor may be implemented by a transistor, a potentiometer or a switchable resistor and the second variable resistor may be implemented by a transistor, a potentiometer or a switchable resistor.
In a tenth implementation form of the differential cascode amplifier according to the first aspect, the first variable resistor may be implemented by a transistor, the differential cascode amplifier further comprises a control voltage source connected to the first variable resistor, preferably to a control port of the first variable resistor, and the differential cascode amplifier may be configured to control the first variable resistor according to a control voltage provided by the control voltage source.
In an eleventh implementation form of the differential cascode amplifier according to the first aspect, the second variable resistor may be implemented by a transistor, the control voltage source is further connected to the second variable resistor, preferably to a control port of the second variable resistor, and the differential cascode amplifier is further configured to control the second variable resistor according to a control voltage provided by the control voltage source.
A second aspect of the invention provides a method for operating a differential cascode amplifier for optical communication, wherein the differential cascode amplifier comprises a first variable resistor connected to a second variable resistor, the first variable resistor further connected to a control port of a first common control port transistor of the cascode amplifier, the second variable resistor further connected to a control port of a second common control port transistor of the cascode amplifier, and the method comprises the steps of: adjusting a passband frequency response of the differential cascode amplifier through the first variable resistor and the second variable resistor.
In a first implementation of the method according to the second aspect, the differential cascode amplifier may further comprise a first voltage source, wherein the first voltage source may be connected to the first variable resistor and the first voltage source may be connected to the second variable resistor.
In a second implementation of the method according to the second aspect, the differential cascode amplifier may further comprise a first output port and a second output port, the first output port may be connected with the first common control port transistor and the second output port may be connected with the second common control port transistor.
In a third implementation of the method according to the second aspect, the connecting the first common control port transistor to the first output port may comprise: the first output port may be connected with an output port of the first common control port transistor, and the connecting the second common control port transistor with the second output port may include: the second output port may be connected to an output port of the second common control port transistor.
In a fourth implementation of the method according to the second aspect, the differential cascode amplifier may further comprise a first resistor, a second resistor and a second voltage source, wherein the first resistor may be connected with the first common control port transistor, the second resistor may be connected with the second common control port transistor, and the first resistor and the second resistor may be connected with the second voltage source.
In a fifth implementation form of the method according to the second aspect, the connecting the first resistor to the first common control port transistor may comprise: the first resistor may be connected to an output port of the first common control port transistor; the second resistor 205 being connected to the second common control port transistor may include: the second resistor may be connected to an output port of the second common control port transistor.
According to the second aspect, in a sixth implementation of the method, the differential cascode amplifier may further comprise a first common input port transistor, a second common input port transistor, and a first current source, the first common input port transistor may be connected to the first common control port transistor, the second common input port transistor may be connected to the second common control port transistor, and the first current source may be connected to the first common input port transistor and the second common input port transistor.
In a seventh implementation form of the method according to the second aspect, the connecting the first common input port transistor and the first common control port transistor may comprise: an output port of the first common input port transistor may be connected with an input port of the first common control port transistor; the second common input port transistor connected to the second common control port transistor may include: an output port of the second common input port transistor may be connected with an input port of the second common control port transistor; the first current source connected to the first common input port transistor and the second common input port transistor may include: the first current source may be connected to an input port of the first common input port transistor and an input port of the second common input port transistor.
In an eighth implementation form of the method according to the second aspect, the differential cascode amplifier may further comprise a first input port and a second input port, the first input port may be connected to the first common input port transistor, preferably to the control port of the first common input port transistor, and the second input port may be connected to the second common input port transistor, preferably to the control port of the second common input port transistor.
In a ninth implementation of the method according to the second aspect, the first variable resistor may be realized by a transistor, a potentiometer or a switchable resistor and the second variable resistor may be realized by a transistor, a potentiometer or a switchable resistor.
In a tenth embodiment of the method according to the second aspect, the first variable resistor may be implemented by a transistor, the differential cascode amplifier further comprises a control voltage source connected to the first variable resistor, preferably to a control port of the first variable resistor, and the differential cascode amplifier may be adapted to control the first variable resistor according to a control voltage provided by the control voltage source.
In an eleventh implementation of the method according to the second aspect, the second variable resistor may be implemented by a transistor, the control voltage source may further be connected to the second variable resistor, preferably to a control port of the second variable resistor, and the differential cascode amplifier may further be configured to control the second variable resistor according to a control voltage provided by the control voltage source.
It should be noted that all devices, elements, units and means described in the present application may be implemented as software or hardware elements or any combination thereof. All steps performed by the various entities described in the present application and the functions described to be performed by the various entities are intended to indicate that the respective entities are adapted or arranged to perform the respective steps and functions. Although in the following description of specific embodiments specific functions or steps performed by an external entity are not represented in the description of specific elements of that entity performing the specific steps or functions, it should be clear to a skilled person that these methods and functions may be implemented by respective hardware or software elements or any combination thereof.
Drawings
The foregoing aspects and many of the attendant aspects of this invention will become more readily appreciated as the same become better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:
fig. 1 shows a differential cascode amplifier according to an embodiment of the invention;
fig. 2 shows a differential cascode amplifier in more detail according to an embodiment of the invention;
FIG. 3 shows a schematic model of a transistor;
FIG. 4 illustrates another differential cascode amplifier according to an embodiment of the present invention;
FIG. 5 illustrates another differential cascode amplifier according to an embodiment of the present invention;
FIG. 6 shows another differential cascode amplifier according to an embodiment of the invention;
fig. 7 is an overview diagram of a method according to an embodiment of the invention.
Detailed Description
Fig. 1 shows details of a differential cascode amplifier 100 according to an embodiment of the invention. The differential cascode amplifier 100 is particularly suitable for optical communications, e.g., to handle frequencies used for optical communications, and is implemented with a common cascode configuration. Specifically, the differential cascode amplifier 100 is illustrated by the rectangle shown in fig. 1, which contains other circuitry. The rectangle specifically illustrates that the differential cascode amplifier 100 may in principle be a conventional cascode amplifier including other non-conventional circuits. The beneficial effects of the invention are based on the other circuits.
The differential cascode amplifier 100 includes a first variable resistor 101 and a second variable resistor 102. As shown in fig. 1, the first variable resistor 101 and the second variable resistor 102 are connected to each other.
The first variable resistor 101 and/or the second variable resistor 102 may be implemented in several ways. For example, each of the variable resistors may be a transistor, a potentiometer, a rheostat, or a switchable resistor. In particular, the variable resistor may be any component having at least two terminals, the constitutive behavior of which may be described by the equation I-k-V, where I is the current flowing through the terminals and V is the voltage drop between the terminals. Thus, the parameter k may be varied or adjusted in some way, for example, by applying a mechanical change, voltage or current to the third or other terminal of the variable resistor.
The first variable resistor 101 is further connected to a control port 103c of a first common control port transistor 103 and the second variable resistor 102 is further connected to a control port 104c of a second common control port transistor 104 of the cascode amplifier 100, in other words, the first variable resistor 101 and the second variable resistor 102 are inserted in control port branches of the first common control port transistor 103 and the second common control port transistor 104 of the differential cascode amplifier 100. This enables adjustment of the passband frequency response of the differential cascode amplifier 100 and achieves the aforementioned significant advantages over the prior art. Therefore, can be considered as the core of the present invention.
The first common control port transistor 103 or the second common control port transistor 104 may be implemented by any type of transistor known in the art. Moreover, all other transistors to be described herein may also be implemented by any type of transistor known in the art. More specifically, a Bipolar Junction Transistor (BJT) or a Field Effect Transistor (FET) may be used in the differential cascode amplifier 100. All transistors used in the differential cascode amplifier 100 need not be of the same type, but may be any combination of different types of transistors.
When the BJT is used, the basic port of the BJT can be used as a control port, the emitter port of the BJT can be used as an input port, and the collector port of the BJT can be used as an output port.
When a FET is used, the gate port of the FET may be taken as the control port, the drain port of the FET as the output port, and the source port of the FET as the input port.
The cascode amplifier 100 may also be implemented by Heterojunction Bipolar Transistor (HBT), darlington, schottky, multi-emitter, dual-gate metal-oxide-semiconductor field-effect transistor (MOSFET), junction FET, avalanche, diffusion, etc. transistor types.
Conventional differential cascode amplifiers typically require four transistors, two output loads, two DC voltage sources, and one DC current source (e.g., as described below in connection with fig. 2). However, fig. 1 only shows the components of the differential cascode amplifier 100 that are needed to achieve the core effects of the present invention (i.e., to adjust the passband frequency response of the differential cascode amplifier 100). Any other components of the differential cascode amplifier, in particular those which will be described hereinafter, in particular those described in connection with fig. 2, may be considered as optional features. Any variation of the cascode differential amplifier known in the art, particularly the case shown in fig. 1, is suitable for use with the present invention.
Fig. 2 shows a differential cascode amplifier 200 in more detail according to an embodiment of the invention. The differential cascode amplifier 200, as described below, includes all of the features and functions of the differential cascode amplifier 100. All additional features and functions of the differential cascode amplifier 200 are considered optional features. The features of fig. 2 relate in particular to the cascode configuration of the differential cascode amplifier 200.
The differential cascode amplifier 200 specifically includes a first voltage source 201, a first output port 202, a second output port 203, a first resistor 204, a second resistor 205, a second voltage source 206, a first common input port transistor 207, a second common input port transistor 208, a first current source 209, a first input port 210, and a second input port 211.
Furthermore, the first common control port transistor 103 comprises a control port 103c, an input port 103i and an output port 103 o. The second common control port transistor 104 includes a control port 104c, an input port 104i, and an output port 104 o. The first common input port transistor 207 includes a control port 207c, an input port 207i, and an output port 207 o. The second common input port transistor 208 includes a control port 208c, an input port 208i, and an output port 208 o.
As shown in fig. 2, the components are connected to each other.
In other words, as with other prior art cascode amplifiers, the cascode amplifier includes four transistors 103, 104, 210, and 211 (also referred to as Q1, Q2, Q3, and Q4), two output loads 202 and 203 (also referred to as R4)L1And RL2) Two DC voltage sources 201 and 206 (also referred to as V)DDAnd VGG) And a DC current source 209 (also referred to as I)E)。
The differential input of the differential cascode amplifier can be Vin+And Vin-Represented, and may be transmitted by ports 210 and 211.
The differential output of the differential cascode amplifier can be Vout+And Vout-To representAnd may be transmitted by ports 202 and 203.
The two DC voltage sources 201 and 206 (also referred to as V)DDAnd VGG) Or may be supplied by a single voltage source, VDDAnd VGGCan be tapped off from the voltage source.
Fig. 3 shows a schematic model of a transistor that can be used to analyze the behavior of the differential cascode amplifier 100 or 200 according to the present invention. The description of fig. 3 especially relates to all transistors of the differential cascode 100 or 200 except for the transistors used for implementing the first variable resistor 101 and/or the second variable resistor 102.
Although the function of the differential cascode amplifier 100 or 200 may be implemented by any type of transistor, it is demonstrated here by a known simplified model in which the transistor is assumed to be a FET, as shown in fig. 3. Section a of fig. 3 shows the correlation between the output, control and input ports of the above-described general-purpose transistor and the drain, gate and source ports of the FET.
Part B of FIG. 3 shows the control of the current source (I) by voltageds＝gm·Vgs) And two capacitors (C)gsAnd Cgd) The equivalent circuit of the composed FET.
From the equivalent circuit of the FET, it can be shown that the frequency bandwidth of the transfer function in the cascode amplifier is limited by the common source transistors (i.e. 207 and 208 in fig. 2), with its upper passband frequency approximately equal to the following frequency (f):
the above equation can be considered as equation 1, where RSIs the impedance of the input source, ZinCGIs the input impedance of the common gate transistor. ZinCGThe value of (d) can be estimated by the following equation (equation 2):
wherein, assuming that the common-source transistor and the common-gate transistor (i.e. 103 and 104 in fig. 2) are equal, the component (g) constituting the equivalent modelm、CgsAnd Cgd) Are equal in value.
The equations 1 and 2 show that the upper passband frequency of the differential cascode amplifier 200 depends on the values of the variable resistors 101 and 102. Thus, the passband frequency response of the differential cascode amplifier 200 may be adjusted by adjusting the values of the variable resistors 101 and 102.
By a differential amplifier circuit (i.e., Q)1≠Q2≠Q3≠Q4And/or RL1≠RL2Namely: 103 ≠ 104 ≠ 210 ≠ 211 and/or 202 ≠ 203) and a variable resistor (R ≠ R)var1≠Rvar2Namely: 101 ≠ 102) any asymmetry introduced in the differential cascode amplifier can change the actual behavior of the differential cascode amplifier 100 or 200 without affecting the working principle on which the invention is based.
Fig. 4 shows another differential cascode amplifier 400 according to an embodiment of the invention. Two transistors 401 and 402 are inserted in the control port branches of the first common control port transistor 103 and the second common control port transistor 104. Thus, the two transistors 401 and 402 implement the variable resistors 101 and 102. The differential cascode amplifier 400 also includes a control voltage source 403 that provides a control voltage to control transistors 401 and 402 to further implement the variable resistors 101 and 102.
The embodiment shown in fig. 4 provides a preferred way of fully integrating the invention in an MMIC device.
The configuration of the transistors (i.e., 103, 104, 210, and 211) making up the differential cascode amplifier is the same as in fig. 2. The input terminals and the output terminals (i.e., the source port and the drain port) of the transistors 401 and 402, i.e., the FETs that implement the variable resistors 101 and 102, are interchangeable. Thus, any combination of the following may be employed: both input ports are connected to the first voltage source 201 and both output ports are connected to the first voltage source 201, or one input port and one output port are connected to the first voltage source 201.
Fig. 5 shows another differential cascode amplifier 500 according to an embodiment of the invention. The differential cascode amplifier 500 includes all of the features and functions of the differential cascode amplifier described above. In the differential cascode amplifier 500, the variable resistors 101 and 102 are implemented by potentiometers 501 and 502, respectively.
Fig. 6 shows another differential cascode amplifier according to an embodiment of the invention. The differential cascode amplifier 600 includes all of the features and functions of the differential cascode amplifier described above. In the differential cascode amplifier 600, the variable resistors 101 and 102 are implemented by potentiometers 602 and 602, respectively.
Although not shown in any of fig. 1 to 6, there may be any combination of the first variable resistor in any of fig. 1 to 6 and the second variable resistor in any of fig. 1 to 6. For example, there may be the following combination of the first variable resistor 101 and the second variable resistor 102:
the first variable resistor 101 is implemented by a transistor 401 and the second variable resistor 102 is implemented by a potentiometer 502.
The first variable resistor 101 is implemented by a transistor 401 and the second variable resistor 102 is implemented by a switchable resistor 602.
The first variable resistor 101 is implemented by a potentiometer 501 and the second variable resistor 102 is implemented by a transistor 402.
The first variable resistor 101 is realized by a potentiometer 501 and the second variable resistor 102 is realized by a switchable resistor 602.
The first variable resistor 101 is implemented by a switchable resistor 601 and the second variable resistor 102 is implemented by a transistor 402.
The first variable resistor 101 is realized by a switchable resistor 601 and the second variable resistor 102 is realized by a potentiometer 502.
Fig. 7 shows an overview of a method 700 for operating a differential cascode amplifier 100 for optical communication, wherein the differential cascode amplifier 100 comprises a first variable resistor 101 connected to a second variable resistor 102, the first variable resistor 101 is further connected to a control port 103c of a first common control port transistor 103 of the cascode amplifier 100, the second variable resistor 102 is further connected to a control port 104c of a second common control port transistor 104 of the cascode amplifier 100, and the method 700 corresponds to the differential cascode amplifier 100 of fig. 1 and can thus be used for operating the differential cascode amplifier 100. The method 700 comprises the steps of: the passband frequency response of the differential cascode amplifier 100 is adjusted 701 by the first variable resistor 101 and the second variable resistor 102.
The invention has been described in connection with various embodiments and implementations by way of example. Other variations will become apparent to those skilled in the art upon a study of the drawings, the disclosure, and the independent claims. In the claims and the description, the term "comprising" does not exclude other elements or steps, and "a" or "an" does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.
Claims (12)
1. A differential cascode amplifier (100, 200, 400) comprising a first variable resistor (101) connected to a second variable resistor (102), characterized in that the first variable resistor (101) is further connected to a control port (103c) of a first common control port transistor (103) and the second variable resistor (102) is further connected to a control port (104c) of a second common control port transistor (104) of the cascode amplifier (100);
the differential cascode amplifier (100, 200, 400) further comprises a first voltage source (201), wherein the first voltage source (201) is connected with the first variable resistor (101) and the first voltage source (201) is connected with the second variable resistor (102);
the differential cascode amplifier (100, 200, 400) further comprises a first common input port transistor (207), a second common input port transistor (208), and a first current source (209), the first common input port transistor (207) being connected to the first common control port transistor (103), the second common input port transistor (208) being connected to the second common control port transistor (104), and the first current source (209) being connected to the first common input port transistor (207) and the second common input port transistor (208);
wherein the first common control port transistor (103) forms a cascode structure with the first common input port transistor (207) and the second common control port transistor (104) forms a cascode structure with the second common input port transistor (208).
2. The differential cascode amplifier (100, 200, 400) according to claim 1, characterized in that the differential cascode amplifier (100, 200, 400) is a differential cascode amplifier for optical communication.
3. The differential cascode amplifier (100, 200, 400) according to claim 1, characterized in that the differential cascode amplifier (100, 200, 400) further comprises a first output port (202) and a second output port (203), wherein the first output port (202) is connected with the first common control port transistor (101) and the second output port (203) is connected with the second common control port transistor (102).
4. The differential cascode amplifier (100, 200, 400) according to claim 3, characterized in that the connection of the first common control port transistor (103) with the first output port (202) comprises: the first output port (202) is connected with an output port (103o) of the first common control port transistor (103); the second common control port transistor (104) connected to the second output port (203) comprises: the second output port (203) is connected to an output port (104o) of the second common control port transistor (104).
5. The differential cascode amplifier (100, 200, 400) according to claim 1, characterized in that the differential cascode amplifier (100, 200, 400) further comprises a first resistor (204), a second resistor (205) and a second voltage source (206), wherein the first resistor (204) is connected with the first common control port transistor (103), the second resistor (205) is connected with the second common control port transistor (104), and the first resistor (204) and the second resistor (205) are connected with the second voltage source (206).
6. The differential cascode amplifier (100, 200, 400) according to claim 5, characterized in that the connection of the first resistor (204) with the first common control port transistor (103) comprises: the first resistor (204) is connected with an output port (103o) of the first common control port transistor (103); the second resistor (205) connected to the second common control port transistor (104) comprises: the second resistor (205) is connected to an output port (104o) of the second common control port transistor (104).
7. The differential cascode amplifier (100, 200, 400) according to claim 1, characterized in that the connection of the first common input port transistor (207) with the first common control port transistor (103) comprises: an output port (207o) of the first common input port transistor (207) is connected to an input port (103i) of the first common control port transistor (103); the second common input port transistor (208) connected to the second common control port transistor (104) comprises: an output port (208o) of the second common input port transistor (208) is connected to an input port (104i) of the second common control port transistor (104); the first current source (209) connected to the first common input port transistor (207) and the second common input port transistor (208) comprises: the first current source (209) is connected to an input port (207i) of the first common input port transistor (207) and an input port (208i) of the second common input port transistor (208).
8. The differential cascode amplifier (100, 200, 400) according to claim 1, characterized in that the differential cascode amplifier (100, 200, 400) further comprises a first input port (210) and a second input port (211), the first input port (210) being connected with the control port (207c) of the first common input port transistor (207) and the second input port (211) being connected with the control port (208c) of the second common input port transistor (208).
9. The differential cascode amplifier (100, 200, 400) according to any of claims 1 to 8, characterized in that the first variable resistor (101) is realized by a transistor (401), a potentiometer (501) or a switchable resistor (601) and the second variable resistor (102) is realized by a transistor (402), a potentiometer (502) or a switchable resistor (602).
10. The differential cascode amplifier (100, 200, 400) according to any of claims 1 to 8, characterized in that the first variable resistor (101) is implemented by a transistor (401), the differential cascode amplifier (100, 200, 400) further comprises a control voltage source (403) connected to a control port (401c) of the first variable resistor (101), and the differential cascode amplifier (100, 200, 400) is configured to control the first variable resistor (101) in accordance with a control voltage provided by the control voltage source (403).
11. The differential cascode amplifier (100, 200, 400) according to claim 10, characterized in that the second variable resistor (102) is realized by a transistor (402), the control voltage source (403) is further connected with a control port (402c) of the second variable resistor (102), and the differential cascode amplifier (100, 200, 400) is further configured to control the second variable resistor (102) in accordance with a control voltage provided by the control voltage source (403).
12. A method (700) for operating a differential cascode amplifier (100, 200, 400), characterized in that the differential cascode amplifier (100, 200, 400) comprises a first variable resistor (101) connected to a second variable resistor (102), wherein the first variable resistor (101) is further connected to a control port (103c) of a first common control port transistor (103) of the cascode amplifier (100) and the second variable resistor (102) is further connected to a control port (104c) of a second common control port transistor (104) of the cascode amplifier (100); the differential cascode amplifier (100, 200, 400) further comprises a first voltage source (201), wherein the first voltage source (201) is connected with the first variable resistor (101) and the first voltage source (201) is connected with the second variable resistor (102); the differential cascode amplifier (100, 200, 400) further comprises a first common input port transistor (207), a second common input port transistor (208), and a first current source (209), the first common input port transistor (207) being connected to the first common control port transistor (103), the second common input port transistor (208) being connected to the second common control port transistor (104), and the first current source (209) being connected to the first common input port transistor (207) and the second common input port transistor (208); wherein the first common control port transistor (103) forms a cascode structure with the first common input port transistor (207) and the second common control port transistor (104) forms a cascode structure with the second common input port transistor (208); the method (700) comprises the steps of: adjusting (701) a passband frequency response of the differential cascode amplifier (100, 200, 400) by the first variable resistor (101) and the second variable resistor (102).
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/EP2017/082966 WO2019114978A1 (en) | 2017-12-15 | 2017-12-15 | Differential cascode amplifier for optical communication with tunable pass-band frequency |
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| CN111434034A CN111434034A (en) | 2020-07-17 |
| CN111434034B true CN111434034B (en) | 2022-04-12 |
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| WO2019114978A1 (en) | 2019-06-20 |
| CN111434034A (en) | 2020-07-17 |
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