CN111427731B - Automatic split code stream and verification code stream testing method and system - Google Patents
Automatic split code stream and verification code stream testing method and system Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2215—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test error correction or detection circuits
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
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Abstract
The method and the system for testing the automatic splitting code stream and the verification code stream can save a great amount of time consumption for splitting and comparing the code stream, greatly improve the testing efficiency of code stream verification and well improve the testing accuracy. The method comprises the following steps: (1) Reading a path of a circuit in the CASE file and a top entity name; (2) Judging whether a configuration file in the circuit exists or not, if yes, executing the step (3), and if not, executing the step (4); (3) taking out the configuration controller parameters, and jumping to (5); (4) storing the default values of the configuration in the LIST; (5) Judging whether the code stream file in the circuit exists or not, if yes, executing the step (6), otherwise, not checking and writing the code stream file in the result file to be absent; (6) splitting the code stream according to the code stream protocol; (7) Comparing and checking the code stream file and the value of the configuration controller to generate a result file; (8) If it is the last circuit in the CASE file, the flow is ended, and if it is not, the flow jumps to (1).
Description
Technical Field
The invention relates to the technical field of programmable logic devices, in particular to a test method for automatically splitting code streams and verifying code streams and a test system for automatically splitting code streams and verifying code streams.
Background
With the development of integrated circuit technology, EDA (Electronics Design Automation, electronic design automation) software of an FPGA (Field-Programmable Gate Array, field programmable gate array) is particularly important, and unlike other software systems, the EDA software of the FPGA integrates functions including a design circuit, a compiling circuit, a debugging circuit, an analysis circuit, and the like.
The main function of the FPGA EDA tool is to convert a circuit into a netlist file, then to perform subsequent boxing, layout, wiring and code matching on the netlist file, and the correctness of the code stream is critical to the FPGA.
The flow of generating the code stream by the FPGA EDA software is as follows: generating a circuit design- > generating a netlist file- > setting parameters of a configuration controller- > packaging layout wiring- > generating a configuration code, wherein the configuration code is generated only after all the previous steps are successfully executed, the parameter settings of the previous configuration controller are matched into corresponding code streams according to a configuration code rule, and if the generated code stream file is successful, the code stream file can be downloaded into a circuit board for subsequent testing. The workflow of an EDA tool to a circuit is shown in FIG. 1.
However, in the testing process, since the code stream files are both composed of 0 and 1, and one code stream file normally has a size of tens of MB or even larger, and tens of millions of 0 and 1 bytes are stored therein, this is a challenge for the tester, and it takes a lot of time to split the code stream file, and the configured configuration information is mapped to the corresponding code stream position. Therefore, the code stream splitting and comparing time is huge, the testing accuracy is poor, and the testing efficiency of code stream verification is low.
Disclosure of Invention
In order to overcome the defects of the prior art, the technical problem to be solved by the invention is to provide a test method for automatically splitting code streams and verifying the code streams, which can save a great amount of time consumption for splitting and comparing the code streams, greatly improve the test efficiency of code stream verification and well improve the test accuracy.
The technical scheme of the invention is as follows: the automatic split code stream and verification code stream testing method comprises the following steps:
(1) Reading a path and a top entity name of one circuit in a plurality of circuits stored in a CASE file;
(2) Judging whether a configuration file in the circuit exists or not, if so, executing the step (3), and if not, executing the step (4);
(3) Taking out the parameters of the configuration controller, and jumping to the step (5);
(4) Storing the default values of the configuration in a LIST;
(5) Judging whether the code stream file in the circuit exists or not, if so, executing the step (6), if not, not checking, and writing the code stream file in the result file to be not exist;
(6) Splitting the code stream according to the code stream protocol;
(7) Comparing and checking the code stream file and the value of the configuration controller to generate a result file;
(8) If the circuit is the last circuit in the CASE file, the flow is ended, and if the circuit is not the last circuit in the CASE file, the flow jumps to the step (1).
The invention reads the paths and top layer entity names of a plurality of circuits stored in the CASE file one by one, splices the configuration file address and the code stream file address corresponding to each circuit, judges whether the configuration file in the circuit exists, if yes, acquires the value of the configuration controller from the configuration file and stores the value in the LIST, if not, stores a group of default values in the LIST, then splits the code stream according to the code stream protocol, and finally compares and checks the code stream file and the value of the configuration controller and generates a result file, thereby the test method can save a large amount of time consumption required for splitting and comparing the code stream, greatly improves the test efficiency of code stream verification, and improves the test accuracy well.
The utility model also provides an automatic change test system of split code stream and verification code stream, it includes:
the CASE file reading module is configured to read a path and a top layer entity name of one circuit in the plurality of circuits stored in the CASE file;
the configuration file judging module is configured to judge whether the configuration file in the circuit exists or not, if so, the parameter extracting module is executed, if not, the configured default value is stored in the LIST LIST, if the code stream file exists, the code stream splitting module is executed, if not, the verification is not executed, and the code stream file written in the result file does not exist;
the parameter extraction module is configured to extract parameters of the configuration controller and the code stream splitting module;
the code stream splitting module is configured to split the code stream according to a code stream protocol;
and the configuration result comparison module is configured for comparing and checking the code stream file and the value of the configuration controller and generating a result file.
Drawings
Fig. 1 shows the workflow of an EDA tool to a circuit.
Fig. 2 shows a flow chart of a test method for automatically splitting a code stream and verifying the code stream according to the invention.
Fig. 3 shows a flow chart of step (7.2) of the test method for automatically splitting a code stream and verifying the code stream according to the invention.
Detailed Description
As shown in fig. 2, the method for testing the automatic split code stream and the verification code stream comprises the following steps:
(1) Reading a path and a top entity name of one circuit in a plurality of circuits stored in a CASE file;
(2) Judging whether a configuration file in the circuit exists or not, if so, executing the step (3), and if not, executing the step (4);
(3) Taking out the parameters of the configuration controller, and jumping to the step (5);
(4) Storing the default values of the configuration in a LIST;
(5) Judging whether the code stream file in the circuit exists or not, if so, executing the step (6), if not, not checking, and writing the code stream file in the result file to be not exist;
(6) Splitting the code stream according to the code stream protocol;
(7) Comparing and checking the code stream file and the value of the configuration controller to generate a result file;
(8) If the circuit is the last circuit in the CASE file, the flow is ended, and if the circuit is not the last circuit in the CASE file, the flow jumps to the step (1).
The invention reads the paths and top layer entity names of a plurality of circuits stored in the CASE file one by one, splices the configuration file address and the code stream file address corresponding to each circuit, judges whether the configuration file in the circuit exists, if yes, acquires the value of the configuration controller from the configuration file and stores the value in the LIST, if not, stores a group of default values in the LIST, then splits the code stream according to the code stream protocol, and finally compares and checks the code stream file and the value of the configuration controller and generates a result file, thereby the test method can save a large amount of time consumption required for splitting and comparing the code stream, greatly improves the test efficiency of code stream verification, and improves the test accuracy well.
Preferably, in the step (1), a path and a top layer entity name of one circuit of the plurality of circuits stored in the CASE file are read, and space intervals are formed; and splicing the configuration file address and the code stream file address corresponding to the circuit.
Preferably, in the step (3), the configuration in the read configuration file is stored in the LIST, and the configuration file stores a large amount of configuration information, so that information filtering of the value of the configuration controller is performed.
The code stream file is generated according to a specific code stream protocol, and tens of millions of 0 and 1 respectively contain information such as file header, register address, register value, csram, bsram and the like. Preferably, the step (6) includes the steps of:
(6.1) splitting the code stream according to the rule given by the code stream protocol, and storing each value into a corresponding variable until the code stream file is completely fetched;
(6.2) displaying the variables in the result log in the order of the code stream protocol, respectively. The sequence of splitting the code stream is actually split according to the sequence of the code stream protocol, and then the variables are respectively displayed in the result log according to the sequence, so that a tester can clearly see the values and the addresses of the registers.
Preferably, in the step (6.1), if the code stream starts from the HEAD, the HEAD of the code stream protocol rule is 32 bits, then the 32 bits are fetched from the code stream file from the HEAD, stored in the HEAD variable, the 32 bits are removed from the code stream file, then the address and the value of the COR register are fetched down according to the code stream protocol, the address of the COR register is found to be 32 bits, the 32 bits are fetched from the code stream file and are saved as the address of the COR register, then the 32 bits are fetched as the value of the COR register and are saved, and the 64 bits are removed from the code stream file. And by analogy, storing each value into a corresponding variable until the code stream file is completely fetched.
Preferably, the step (7) includes the steps of:
(7.1) matching the value of the extracted configuration controller into a corresponding split register code stream according to a code matching rule, for whether CRC check CRC_BYPASS is skipped, selecting the 29 th bit (from low to high) of the value of a COR register to be 1 when ON and 0 when OFF, comparing the 29 th bit of the value of the CRC_BYPASS obtained from the configuration file with the 29 th bit of the value of the COR register at the moment, configuring to be 1 when ON, configuring to be correct when OFF, configuring to be 0 to be correct, recording a correct result log, otherwise prompting failure, recording the cause of the error into the result log, and the like for other configuration items, and checking the same;
(7.2) if the configuration codes of all the configuration items to which the COR belongs are correct, recording that the COR register is correct, writing the correct configuration codes into a result log, otherwise, the COR register is failed. The other registers are treated the same if they are the same. The process flow diagram is shown in fig. 3.
In order to facilitate the simulation test of the circuit by the tester, the developer can convert the code stream into a fast simulation file and a slow simulation file according to a certain rule for the tester to perform simulation verification. Preferably, the verification in the step (7) includes verifying fast imitations and slow imitations, converting the code stream file into the fast imitations according to the conversion rule, comparing with the actual fast imitations, if the code stream file is consistent with the actual fast imitations, indicating that the generated fast imitations are successful, otherwise, listing the wrong results; and then the code stream file is converted into a slow imitation file through rules, and then the slow imitation file is compared with an actual slow imitation file.
Preferably, the verifying of step (7) further includes:
verifying whether the matching codes in the code stream file, the fast imitation file and the slow imitation file are both composed of 0 and 1, and whether the matching codes have messy codes or characters;
according to the code stream rule, after the code stream of the last end is taken out, checking whether the code stream file is split or not, and checking whether the code stream file has redundant bit digital streams or not at the moment;
and verifying the frame length, the frame number, the word number and the total bit number in the code stream according to the code stream protocol.
Preferably, the test method is suitable for being embedded in interface automation and bottom automation, and after automatic execution is completed to generate a code stream file, the code stream verification is directly carried out, so that labor can be saved, PATH and top layer entity names of a circuit do not need to be written into a CASE file manually, automatic judgment and writing are completed by automatic execution, then the code stream verification is carried out, a result is directly given, and a tester only needs to observe whether the result is correct or not.
It will be understood by those skilled in the art that all or part of the steps in implementing the above embodiment method may be implemented by a program to instruct related hardware, where the program may be stored in a computer readable storage medium, where the program when executed includes the steps of the above embodiment method, and the storage medium may be: ROM/RAM, magnetic disks, optical disks, memory cards, etc. Accordingly, the present invention also includes a test system for automated splitting of code streams and verification of code streams, corresponding to the method of the present invention, which is generally represented in the form of functional blocks corresponding to the steps of the method. The system comprises:
the CASE file reading module is configured to read a path and a top layer entity name of one circuit in the plurality of circuits stored in the CASE file;
the configuration file judging module is configured to judge whether the configuration file in the circuit exists or not, if so, the parameter extracting module is executed, if not, the configured default value is stored in the LIST LIST, if the code stream file exists, the code stream splitting module is executed, if not, the verification is not executed, and the code stream file written in the result file does not exist;
a parameter retrieval module configured to retrieve configuration controller parameters;
the code stream splitting module is configured to split the code stream according to a code stream protocol;
and the configuration result comparison module is configured for comparing and checking the code stream file and the value of the configuration controller and generating a result file.
In order to verify whether the code stream result generated by EDA software according to the code allocation file is correct, whether the configuration parameters are configured correctly, and downloading of the code stream can be performed only if the configuration is correct, but because the code stream consists of hundreds of thousands of 0 s and 1 s, the data size is very large, a tester manually verifies a code stream file, firstly needs to split the code stream file section by section, then finds the corresponding code allocation position according to the configured parameters, and then performs comparison, when the values of the code allocation are different, the work of regenerating the code allocation and then repeating the above is needed, which is very complicated for the tester, and a great amount of time is needed for verifying a code stream, and the error is easy to be found.
Compared with manual verification, the method for automatically splitting and verifying the code stream greatly reduces the test time and test efficiency of testers, can split the code stream within a few seconds as long as the code stream file is arranged in the circuit, and verifies whether the code stream has problems, so that whether the code stream of the version has problems can be rapidly judged after the version is released, and the problems need to be timely fed back to developers; secondly, the method can accurately judge whether the result of the code stream is correct or not, and the test personnel can easily misplace so much 0 and 1 by manual test, so that the conditions of incorrect test result, reworking and the like are caused, but the method can automatically split and check according to rules, the conditions of misplacement and the like are not caused, and the accuracy of the result can be greatly ensured; thirdly, the method can be transplanted to interface automation and bottom automation, and the code stream verification result of the circuit can be conveniently and rapidly given by generating an interface and bottom automation executing circuit, generating a netlist, boxing layout and wiring and generating a code stream and finally automatically calling the method.
The present invention is not limited to the preferred embodiments, but can be modified in any way according to the technical principles of the present invention, and all such modifications, equivalent variations and modifications are included in the scope of the present invention.
Claims (7)
1. A test method for automatically splitting code stream and verification code stream is characterized in that: which comprises the following steps:
(1) Reading a path and a top entity name of one circuit in a plurality of circuits stored in a CASE file;
(2) Judging whether a configuration file in the circuit exists or not, if so, executing the step (3), and if not, executing the step (4);
(3) Taking out the parameters of the configuration controller, and jumping to the step (5);
(4) Storing the default values of the configuration in a LIST;
(5) Judging whether the code stream file in the circuit exists or not, if so, executing the step (6), if not, not checking, and writing the code stream file in the result file to be not exist;
(6) Splitting the code stream according to the code stream protocol;
(7) Comparing and checking the code stream file and the value of the configuration controller to generate a result file;
(8) If the circuit is the last circuit in the CASE file, ending the flow, and if the circuit is not the last circuit in the CASE file, jumping to the step (1);
the step (6) comprises the following steps:
(6.1) splitting the code stream according to the rule given by the code stream protocol, and storing each value into a corresponding variable until the code stream file is completely fetched;
(6.2) displaying the variables in the result log according to the sequence of the code stream protocol;
in the step (6.1), if the code stream starts from the HEAD, the HEAD of the code stream protocol rule is 32 bits, then the 32 bits are taken out from the HEAD of the code stream file and stored into the HEAD variable, the 32 bits are removed from the code stream file, then the address and the value of the COR register are taken down according to the code stream protocol, the address of the COR register is found to be 32 bits, the value is 32 bits, then the 32 bits are taken out from the code stream file and are stored as the address of the COR register, then the 32 bits are taken as the value of the COR register and are stored, and the 64 bits are removed from the code stream file;
the step (7) comprises the following steps:
(7.1) matching the value of the extracted configuration controller into a corresponding split register code stream according to a code matching rule, selecting the 29 th bit of the value of a COR register to be 1 when the CRC_BYPASS is skipped and to be 0 when the COR register is turned ON and the 29 th bit of the value of the COR register is turned OFF, comparing the 29 th bit of the value of the COR register with the 29 th bit of the value of the CRC_BYPASS obtained from a configuration file, checking that the configuration is correct when the configuration is ON, and recording a correct result log when the configuration is OFF, otherwise prompting failure, recording the cause of the error into the result log, and the other configuration items are analogized in turn, and checking the same;
(7.2) if the configuration codes of all the configuration items to which the COR belongs are correct, recording that the COR register is correct, writing the correct configuration codes into a result log, otherwise, the COR register is failed.
2. The method for testing the automatic splitting code stream and the verification code stream according to claim 1, wherein the method comprises the following steps: in the step (1), reading a path and a top layer entity name of one circuit in a plurality of circuits stored in a CASE file, and spacing the paths and the top layer entity names by spaces; and splicing the configuration file address and the code stream file address corresponding to the circuit.
3. The method for testing the automatic splitting code stream and the verification code stream according to claim 2, wherein the method is characterized by comprising the following steps of: in the step (3), the configuration in the read configuration file is stored in the LIST, and the configuration file stores a large amount of configuration information, so that information filtering of the value of the configuration controller is performed.
4. The method for testing an automatic split code stream and a verification code stream according to claim 3, wherein the method comprises the following steps: the verification in the step (7) comprises verifying fast imitation and slow imitation files, firstly converting the code stream file into the fast imitation file according to a conversion rule, and then comparing the fast imitation file with an actual fast imitation file, if the code stream file is consistent with the actual fast imitation file, indicating that the generated fast imitation file is successful, otherwise, listing an error result; and then the code stream file is converted into a slow imitation file through rules, and then the slow imitation file is compared with an actual slow imitation file.
5. The method for testing the automatic splitting code stream and the verification code stream according to claim 4, wherein the method comprises the following steps: the verification of the step (7) further comprises:
verifying whether the matching codes in the code stream file, the fast imitation file and the slow imitation file are both composed of 0 and 1, and whether the matching codes have messy codes or characters;
according to the code stream rule, after the code stream of the last end is taken out, checking whether the code stream file is split or not, and checking whether the code stream file has redundant bit digital streams or not at the moment;
and verifying the frame length, the frame number, the word number and the total bit number in the code stream according to the code stream protocol.
6. The method for testing the automatic splitting code stream and the verification code stream according to claim 5, wherein the method comprises the following steps: the testing method is suitable for being embedded in interface automation and bottom automation, and after automatic execution is completed to generate a code stream file, the code stream verification is directly carried out, automatic judgment and writing are automatically completed, then the code stream verification is carried out, and a result is directly given.
7. A test system for automatically splitting code streams and verifying code streams is characterized in that: it comprises the following steps:
the CASE file reading module is configured to read a path and a top layer entity name of one circuit in the plurality of circuits stored in the CASE file;
the configuration file judging module is configured to judge whether the configuration file in the circuit exists or not, if so, the parameter extracting module is executed, if not, the configured default value is stored in the LIST LIST, if the code stream file exists, the code stream splitting module is executed, if not, the verification is not executed, and the code stream file written in the result file does not exist;
a parameter retrieval module configured to retrieve configuration controller parameters;
the code stream splitting module is configured to split the code stream according to a code stream protocol;
the configuration result comparison module is configured to compare and check the code stream file and the value of the configuration controller and generate a result file;
the code stream splitting module is used for executing the following steps:
(6.1) splitting the code stream according to the rule given by the code stream protocol, and storing each value into a corresponding variable until the code stream file is completely fetched;
(6.2) displaying the variables in the result log according to the sequence of the code stream protocol;
in the step (6.1), if the code stream starts from the HEAD, the HEAD of the code stream protocol rule is 32 bits, then the 32 bits are taken out from the HEAD of the code stream file and stored into the HEAD variable, the 32 bits are removed from the code stream file, then the address and the value of the COR register are taken down according to the code stream protocol, the address of the COR register is found to be 32 bits, the value is 32 bits, then the 32 bits are taken out from the code stream file and are stored as the address of the COR register, then the 32 bits are taken as the value of the COR register and are stored, and the 64 bits are removed from the code stream file;
the configuration result comparison module is used for executing the following steps:
(7.1) matching the value of the extracted configuration controller into a corresponding split register code stream according to a code matching rule, selecting the 29 th bit of the value of a COR register to be 1 when the CRC_BYPASS is skipped and to be 0 when the COR register is turned ON and the 29 th bit of the value of the COR register is turned OFF, comparing the 29 th bit of the value of the COR register with the 29 th bit of the value of the CRC_BYPASS obtained from a configuration file, checking that the configuration is correct when the configuration is ON, and recording a correct result log when the configuration is OFF, otherwise prompting failure, recording the cause of the error into the result log, and the other configuration items are analogized in turn, and checking the same;
(7.2) if the configuration codes of all the configuration items to which the COR belongs are correct, recording that the COR register is correct, writing the correct configuration codes into a result log, otherwise, the COR register is failed.
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| CN102779194A (en) * | 2011-05-10 | 2012-11-14 | 中国科学院微电子研究所 | Code stream generating method and device based on FPGA (Field Programmable Gate Array) of SOI (Silicon On Insulator) |
| CN103686316A (en) * | 2013-11-13 | 2014-03-26 | 数源久融技术有限公司 | Data broadcasting code stream split method |
| CN107911714A (en) * | 2017-11-28 | 2018-04-13 | 北京数码视讯科技股份有限公司 | Code stream method for splitting, device and bit stream equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102779194A (en) * | 2011-05-10 | 2012-11-14 | 中国科学院微电子研究所 | Code stream generating method and device based on FPGA (Field Programmable Gate Array) of SOI (Silicon On Insulator) |
| CN103686316A (en) * | 2013-11-13 | 2014-03-26 | 数源久融技术有限公司 | Data broadcasting code stream split method |
| CN107911714A (en) * | 2017-11-28 | 2018-04-13 | 北京数码视讯科技股份有限公司 | Code stream method for splitting, device and bit stream equipment |
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