CN111417233A - Lamp and method for eliminating L ED display low-gray jitter - Google Patents
Lamp and method for eliminating L ED display low-gray jitter Download PDFInfo
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- CN111417233A CN111417233A CN201911130998.6A CN201911130998A CN111417233A CN 111417233 A CN111417233 A CN 111417233A CN 201911130998 A CN201911130998 A CN 201911130998A CN 111417233 A CN111417233 A CN 111417233A
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Abstract
The invention relates to a lamp and a method for eliminating L ED display low-gray jitter, wherein a L ED lamp unit comprises a power module, a decoding module and a display module, the decoding module receives data sent by a controller end and generates a PWM control signal, the PWM control signal outputs a duty ratio, and the duty ratio is switched back and forth between two PWM outputs of previous frame data and current data so as to smooth transition between two levels of gray scales, thereby eliminating the problem of L ED display low-gray jitter.
Description
Technical Field
The invention relates to the technical field of L ED lighting display, in particular to a lamp and a method for eliminating L ED display low-gray jitter.
Background
The existing L ED has been widely used in the fields of stage lighting, urban landscape lighting, etc. because of its advantages of long service life, energy saving, environmental protection, pure and thick color, etc. among them, the project lamps in the field of stage lighting and landscape lighting need to adopt high power L ED to meet the requirement of high brightness of the lamp, the brightness of the lamp is improved, the brightness difference between two adjacent gray scales is increased correspondingly, especially in the low gray scale, even if the brightness of the gamma correction 65536 gray scale lamp is small, the same brightness change is easy to be caught by human eyes, which causes that when the low gray scale lamp is gradually displayed, human eyes can feel that the light has slight shake, and the display effect is affected.
The current solutions are two of the following:
1. processing at the controller end, and implementing smooth transition of two gray scale changes by inserting more data frames between two display data frames, but this may bring new problems, and the display end cannot respond to the change of data in real time due to the insertion of the data frames, and produces a smear phenomenon, as shown in fig. 4, it is a schematic diagram of a general output mode of data frame update PWM;
2. and processing is carried out at the lamp end, and a special 16-bit gray scale decoding chip or a high-performance single chip microcomputer is selected to insert more gray scale steps between two levels of gray scales. But this results in a doubling of the controller transmitted data and, under frame rate constraints, a reduction in the number of payloads.
In addition, a 16-bit decoding chip or a single chip microcomputer capable of realizing 16-bit PWM output is expensive, so that the product cost is increased and the market competitiveness is lacked. And the problems of display jitter and smear are difficult to solve.
Therefore, there is a need to develop a lamp and method that eliminates L ED display low gray jitter.
Disclosure of Invention
The invention aims to solve the technical problem of eliminating the L ED low-gray-scale display jitter problem under the conditions of not increasing the lamp cost and not causing the smear problem by implementing the lamp and the method for solving the L ED low-gray-scale jitter at the L ED lamp end.
In order to solve the technical problem, the invention provides a lamp and a method for eliminating L ED display low-gray jitter, including a L ED lamp unit, wherein the L ED lamp unit includes a power module, a decoding module and a display module, the power module is used for supplying power to the decoding module and the display module, the decoding module includes a decoding chip U1, a capacitor C1 and resistors R1, R2 and R3, the decoding chip U1 includes a data frame interval measuring unit, a data frame decoding unit, a PWM refresh frequency configuration unit, a PWM duty ratio configuration unit and a PWM output switching unit, the decoding module receives data sent by a controller terminal and generates a PWM control signal, the PWM control signal outputs a duty ratio, and the duty ratio is switched back and forth between two PWM outputs of previous frame data and current data to smooth transition between two levels of gray scales;
the method for eliminating L ED display low gray jitter is as follows:
a. energizing the L ED lighting unit, the power module, decoding module, and display module being electrically connected together;
b. the decoding chip U1 forms an AB differential data port and is connected with a controller data bus through resistors R2 and R3;
c. the controller end sends display data to a data port of the decoding chip U1 through a data line, and the data frame decoding unit converts the display data into PWM duty ratio data and sends the PWM duty ratio data to the PWM duty ratio configuration unit;
d. the decoding module generates the PWM output when receiving the gray scale change of the display data sent by the controller;
e. a plurality of display driving ports OUT of the decoding chip U1 are provided, and PWM waveforms are respectively output to control the display module;
f. meanwhile, the data frame interval detection unit feeds back the measured data frame interval time to the PWM refreshing frequency configuration unit so as to ensure that the PWM can output enough times within the data frame interval time;
g. then the PWM refreshing frequency configuration unit and the PWM duty ratio configuration unit feed back data to the PWM output switching unit;
h. finally, the PWM output switching unit distributes the switching rule of two data frame PWM duty ratios according to the data frame interval time and the PWM refreshing frequency so as to realize L ED display smooth change;
i. the above steps a to h are repeated until L ED is eliminated showing low gray jitter.
The display module is composed of L ED lamp beads and can be directly connected with a plurality of OUT output ports of the decoding module.
The further scheme is that the PWM control signal is used for controlling the display module to realize different display effects according to the display data requirement sent by the controller.
Further, the PWM output is switched between the previous frame data and the current data, and the switching time is less than or equal to the interval of two data frames.
The further scheme is that the output of the PWM control signal is switched step by step, and the PWM refreshing frequency configuration module ensures that the implementation is finished in a data frame interval, namely the whole processing process is finished before the display of the next frame.
Further, the decoding chip U1 can add a driving module to drive L ED display, where the driving module is connected to the OUT output port of the decoding module and is controlled by the PWM waveform output from the OUT port of the decoding module.
Further, the number of the display driving ports of the decoding chip U1 is multiple, and the number of the display driving ports connected to the display modules is adjusted as needed.
Further, one end of the resistor R1 is used as a power input end of the decoding module, the other end of the resistor R1 and one end of the capacitor C1 are connected to the power port VDD of the decoding chip U1, and the other end of the capacitor C1 and the GND of the decoding chip U1 are connected to ground.
The scheme is that one end of the resistor R2 is connected with a data input port DIN of the decoding chip, and the other end of the resistor R2 is used as a data input port of the decoding module and is connected with the controller in a data mode.
Compared with the prior art, the L ED lamp unit has the advantages that the decoding module receives data sent by the controller and generates PWM control signals, the PWM control signals output duty ratio which is switched back and forth between the two PWM outputs of the previous frame data and the current data so as to smooth the transition between two levels of gray scales, the problem of low gray jitter of L ED display is solved, the cost of a high-power product can be reduced, the display quality is improved, and the reliability is improved, and the L ED lamp unit has the following main beneficial effects:
1. the problem of jitter when the high-power L ED changes gradually in low ash is solved on the premise of not increasing the cost;
2. the problem of smear caused by a common data frame interpolation method is solved;
3. the solution is implemented on L ED lamps, and the controller does not need to do special processing, can be compatible with general controller.
Drawings
Fig. 1 is a schematic structural diagram of an L ED lamp unit according to an embodiment of the invention;
FIG. 2 is a schematic diagram of a decoding module and a display module according to an embodiment of the present invention;
FIG. 3 is a diagram of a decoding chip U1 according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating a general output manner of data frame update PWM;
fig. 5 is a schematic diagram illustrating an output manner of implementing PWM for updating data frames according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1 to 5, in an embodiment of the present invention, a luminaire and a method for eliminating L ED display low gray jitter include a L ED luminaire unit, a L ED luminaire unit includes a power module, a decoding module and a display module, the power module is configured to supply power to the decoding module and the display module, the decoding module includes a decoding chip U1, a capacitor C1 and resistors R1, R2, and R3, the decoding chip U1 includes a data frame interval measuring unit, a data frame decoding unit, a PWM refresh frequency configuring unit, a PWM duty ratio configuring unit and a PWM output switching unit, the decoding module receives data sent by a controller and generates a PWM control signal, the PWM control signal outputs a duty ratio, and the duty ratio switches back and forth between two PWM outputs of previous frame data and current data to smooth transition between two levels of gray scales;
lamps and methods to eliminate L ED display low gray jitter methods to eliminate L ED display low gray jitter are as follows:
a. the L ED lamp unit is electrified, and the power supply module, the decoding module and the display module are electrically connected together;
b. the decoding chip U1 forms an AB differential data port and is connected with a controller data bus through resistors R2 and R3;
c. the controller end sends display data to a data port of a decoding chip U1 through a data line, and a data frame decoding unit converts the display data into PWM duty ratio data and sends the PWM duty ratio data to a PWM duty ratio configuration unit;
d. the decoding module generates PWM output when receiving the gray scale change of the display data sent by the controller;
e. a plurality of display driving ports OUT of the decoding chip U1 are provided, and PWM waveforms are respectively output to control the display module;
f. meanwhile, the data frame interval detection unit feeds back the measured data frame interval time to the PWM refreshing frequency configuration unit so as to ensure that the PWM can output enough times within the data frame interval time;
g. then the PWM refreshing frequency configuration unit and the PWM duty ratio configuration unit feed back data to the PWM output switching unit;
h. finally, the PWM output switching unit distributes the switching rule of two data frame PWM duty ratios according to the data frame interval time and the PWM refreshing frequency so as to realize the smooth change of L ED display;
i. the above steps a to h are repeated until L ED is eliminated showing low gray jitter.
Furthermore, the display module is composed of L ED lamp beads and can be directly connected with a plurality of OUT output ports of the decoding module.
Further, the PWM control signal is used to control the display module to achieve different display effects according to the display data requirements sent by the controller.
Further, the PWM output switches between the previous frame data and the current data for a switching time less than or equal to the interval of the two data frames.
Further, the output of the PWM control signal is switched step by step, and the PWM refresh frequency configuration module ensures that the processing is completed within one data frame interval, i.e. the whole processing is completed before the next frame is displayed.
Furthermore, the decoding chip U1 can add a driving module to drive the L ED display, where the driving module is connected to the OUT output port of the decoding module and controlled by the PWM waveform output from the OUT port of the decoding module.
Furthermore, the number of the display driving ports of the decoding chip U1 is multiple, and the number of the display driving ports connected to the display modules is adjusted as required.
Furthermore, one end of the resistor R1 is used as a power input end of the decoding module, the other end and one end of the capacitor C1 are connected to the power port VDD of the decoding chip U1, and the other end of the capacitor C1 and GND of the decoding chip U1 are connected to ground.
Further, one end of the resistor R2 is connected to the data input port DIN of the decoding chip, and the other end is used as the data input port of the decoding module and is connected to the controller data.
As shown in FIG. 1, the whole L ED lamp unit is composed of a power module, a decoding module and a display module, wherein the power module is used for supplying power to the decoding module and the display module, the decoding module receives data sent by a controller end and generates PWM control signals for controlling the display module to achieve different display effects according to the display data requirements sent by the controller, when the decoding module receives gray scale changes of the display data sent by the controller, PWM output is not directly output according to the duty ratio of new data in a normal mode, but is switched back and forth between two PWM outputs of previous frame data and current data according to a certain rule to smooth transition between two levels of gray scale, which is equivalent to achieving output of more PWM gray scale levels under the condition of not increasing byte number of the display data.
As shown in fig. 2, the L ED luminaire decoding module and display module includes:
the decoding chip U1, the capacitor C1, the resistors R1, R2, R3, the resistor R1, the capacitor C1, the resistor R1, the capacitor C1, the resistor R2, the capacitor C1, the capacitor C1, the capacitor C1, the resistor R2, the capacitor C1, the capacitor C6325, the capacitor C1, the capacitor C1, the resistor R2, the capacitor C1, the capacitor C6345, the capacitor C1, the capacitor C4636, the capacitor C1, the capacitor C1, the capacitor C63V, the capacitor C.
As shown in fig. 3, the decoding chip U1 includes:
the device comprises a data frame interval measuring unit, a data frame decoding unit, a PWM refreshing frequency configuration unit, a PWM duty ratio configuration unit and a PWM output switching unit.
The control end sends display data to a data port of a decoding chip U1 through a data line, a data frame decoding unit converts the display data into PWM duty ratio data and sends the PWM duty ratio data to a PWM duty ratio configuration unit, meanwhile, a data frame interval detection unit feeds measured data frame interval time back to a PWM refreshing frequency configuration unit to ensure that PWM can output enough times within the data frame interval time, then the PWM refreshing frequency configuration unit and the PWM duty ratio configuration unit feed the data back to a PWM output switching unit, and finally the PWM output switching unit distributes the switching rule of two data frame PWM duty ratios according to the data frame interval time and the PWM refreshing frequency to realize the smooth change of L ED display.
As shown in fig. 4, a general data frame update PWM output mode is shown, and after a data frame is updated, the PWM output is immediately updated from the previous frame output waveform a to the output B corresponding to the current data frame.
As shown in fig. 5, in the output mode for implementing data frame update PWM according to the present invention, in the whole data frame interval, the duty ratio of the output waveform a of the previous frame gradually decreases and disappears, and the duty ratio of the PWM output waveform B corresponding to the current data frame gradually increases to the last 100% for output.
The process of PWM output gradual switching is ensured to be completed in a data frame interval through a PWM refreshing frequency configuration module, namely the whole processing process is completed before the next frame is displayed, so that the problem of smear caused by a controller frame insertion mode is solved, meanwhile, the byte number of display data supported by a decoding chip is not increased, but the output of more PWM gray scale levels is realized, and the problem of display jitter of the low gray scale L ED is solved under the condition of not increasing the cost.
In summary, the technical solution of the present invention mainly includes the following points:
1. the PWM output duty ratio of the decoding chip U1 adopts a control method of gradual switching;
the number and time of the PWM output in a step-by-step switching mode can be configured;
3. the data frame interval detection, PWM refreshing frequency control and PWM switching output are carried out in a whole control method.
Compared with the prior art, the L ED lamp unit has the advantages that the decoding module receives data sent by the controller and generates PWM control signals, the PWM control signals output duty ratio which is switched back and forth between the two PWM outputs of the previous frame data and the current data so as to smooth the transition between two levels of gray scales, the problem of low gray jitter of L ED display is solved, the cost of a high-power product can be reduced, the display quality is improved, and the reliability is improved, and the L ED lamp unit has the following main beneficial effects:
1. the problem of jitter when the high-power L ED changes gradually in low ash is solved on the premise of not increasing the cost;
2. the problem of smear caused by a common data frame interpolation method is solved;
3. the solution is implemented on L ED lamps, and the controller does not need to do special processing, can be compatible with general controller.
The above description is only a preferred embodiment of the present patent, and not intended to limit the scope of the present patent, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the specification and the drawings, and which are directly or indirectly applied to other related technical fields, belong to the scope of the present patent protection.
Claims (9)
1. The lamp and the method for eliminating L ED display low gray jitter are characterized by comprising a L ED lamp unit, wherein the L ED lamp unit consists of a power supply module, a decoding module and a display module, the power supply module is used for supplying power to the decoding module and the display module, the decoding module comprises a decoding chip U1, a capacitor C1 and resistors R1, R2 and R3, the decoding chip U1 comprises a data frame interval measuring unit, a data frame decoding unit, a PWM refreshing frequency configuration unit, a PWM duty ratio configuration unit and a PWM output switching unit, the decoding module receives data sent by a controller end and generates PWM control signals, the PWM control signals output duty ratios, and the duty ratios are switched back and forth between two PWM outputs of previous frame data and current data to smooth transition between two levels of gray scales;
the method for eliminating L ED display low gray jitter is as follows:
a. energizing the L ED lighting unit, the power module, decoding module, and display module being connected together;
b. the decoding chip U1 forms an AB differential data port and is connected with a controller data bus through resistors R2 and R3;
c. the controller end sends display data to a data port of the decoding chip U1 through a data line, and the data frame decoding unit converts the display data into PWM duty ratio data and sends the PWM duty ratio data to the PWM duty ratio configuration unit;
d. the decoding module generates the PWM output when receiving the gray scale change of the display data sent by the controller;
e. a plurality of display driving ports OUT of the decoding chip U1 are provided, and PWM waveforms are respectively output to control the display module;
f. meanwhile, the data frame interval detection unit feeds back the measured data frame interval time to the PWM refreshing frequency configuration unit so as to ensure that the PWM can output enough times within the data frame interval time;
g. then the PWM refreshing frequency configuration unit and the PWM duty ratio configuration unit feed back data to the PWM output switching unit;
h. finally, the PWM output switching unit distributes the switching rule of two data frame PWM duty ratios according to the data frame interval time and the PWM refreshing frequency so as to realize L ED display smooth change;
i. the above steps a to h are repeated until L ED is eliminated showing low gray jitter.
2. The lamp and the method for eliminating L ED display low gray jitter of claim 1, wherein the display module is composed of L ED lamp beads and can be directly connected to a plurality of OUT output ports of the decoding module.
3. The lamp and method for eliminating L ED display low gray jitter of claim 1, wherein the PWM control signal is used to control the display module to achieve different display effects according to the display data requirements sent by the controller.
4. The light fixture and method for eliminating L ED display low gray jitter of claim 1, wherein the PWM output is switched between a previous frame data and a current data with a switching time less than or equal to the interval of two data frames.
5. The light fixture and method for eliminating L ED display low gray jitter of claim 1, wherein the output of the PWM control signal is switched step by step, and the PWM refresh frequency configuration module ensures that the whole process is completed within one data frame interval before the next frame is displayed.
6. The lamp and the method for eliminating L ED display low gray jitter of claim 1, wherein the decoding chip U1 can add a driving module to drive L ED display, the driving module is connected to the OUT output port of the decoding module and is controlled by the PWM waveform outputted from the OUT port of the decoding module.
7. The lamp and the method for eliminating L ED display low gray jitter as claimed in claim 1, wherein the number of the display driver ports of the decoding chip U1 is plural, and the number of the display driver ports connected to the display modules is adjusted according to the requirement.
8. The lamp and the method for eliminating L ED display low gray jitter as claimed in claim 1, wherein the resistor R1 has one end as the power input terminal of the decoding module, the other end connected to the power port VDD of the decoding chip U1 in common with one end of the capacitor C1, and the other end of the capacitor C1 connected to ground in common with the GND of the decoding chip U1.
9. The lamp and method for eliminating L ED display low gray jitter as claimed in claim 1, wherein the resistor R2 has one end connected to the data input port DIN of the decoding chip and the other end connected to the controller as the data input port of the decoding module.
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| WO2009154797A2 (en) * | 2008-06-20 | 2009-12-23 | Rambus, Inc. | Frequency responsive bus coding |
| CN103024516A (en) * | 2012-12-07 | 2013-04-03 | 福建星网视易信息系统有限公司 | Method and device for outputting videos synchronously |
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