CN103024516A - Method and device for outputting videos synchronously - Google Patents
Method and device for outputting videos synchronously Download PDFInfo
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- CN103024516A CN103024516A CN2012105286398A CN201210528639A CN103024516A CN 103024516 A CN103024516 A CN 103024516A CN 2012105286398 A CN2012105286398 A CN 2012105286398A CN 201210528639 A CN201210528639 A CN 201210528639A CN 103024516 A CN103024516 A CN 103024516A
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Abstract
The invention discloses a method for outputting videos synchronously. The method comprises that S101: a first main board detects whether a video is input, if yes, turning to S102, and if no, circulating the S101; S102, the first main board decodes the video, outputs the decoded video to a high-definition multimedia interface (HDMI) and a composite video broadcast signal (CVBS) output interface after decoding and displays the video through the HDMI directly; S103: a second main board initializes an input source and a system of a video input module and video input frequencies; S104, the second main board starts the video input module and receives a video source of a CVBS display interface of the first main board; and S105, the second main board outputs the received video to a video graphics array (VGA) display interface directly in a window form. According to the method and a system for outputting video synchronously, the video output of the first main board is connected to the video output of the second main board directly through a hardware video input module, and the progress of the video displayed at two ends is guaranteed to be completely consistent. Simultaneously, the second main board need not decode the video, so that the system overhead can be reduced, and the system operation efficiency is improved.
Description
Technical field
The present invention relates to the digital entertainment product scope, relate in particular to the method for the audio video synchronization output that the display effect that is applicable to video playback and multi-screen audio video synchronization show and based on the audio video synchronization output device of the method work.
Background technology
Continuous progress and development along with science and technology, in the application of digital entertainment industry, particularly in the digital entertainment VOD system, product form trends towards high definition and multi-screen shows, not only show current in progress video on TV, broadcast that simultaneously also can this video of simultaneous display on the program request interface.The user not only can experience the visual effect of large-screen, also can reach multiple user and experience optional purpose from the in-plant video of watching of video on-demand station, and the mode of this audio video synchronization output is that so-called video Ghosted synchronization is play.
But existing chip solution does not support the high definition of multi-screen to show on the market, so common scheme is to utilize respectively decoded video of two master chips at present, and is shown to respectively TV and video on-demand station.This has just brought more problem, how in the situation that two master chips move respectively, and the Ghosted synchronization of video playback between keeping showing separately.What extensively adopt is decode respectively separately video source of two chips, and by the time of control video Broadcast Control, namely master chip uses the control command operation from the play operation of chip, comprises broadcasts, time-out etc.Also having another simultaneous techniques is by the master chip receive data, and is distributed to from chip according to self playing progress rate, thereby reaches control from the purpose of chip playing progress rate.
Technique scheme, the mode of employing control command is because the difference in chip solution code performance and the time control will inevitably cause the frequent asynchrony phenomenon of both progresses.When progress was inconsistent, master chip need constantly send the order that suspends, plays, and for the playing progress rate that furthers between the two, but frequent control causes the video playback Caton phenomenon from chip, greatly reduces undoubtedly user's sensory experience; Secondly, the master chip receive data also is distributed to from chip, and by the broadcasting speed of data flow con-trol from chip, but there is the situation of transmission and operation delay in data flow in network.Particularly in the larger situation of system load, delay phenomenon can be further obvious, even might cause can not obtaining for a long time from chip the situation of decoded data, so the poor shortcoming of this scheme real-time can only be applicable to the not high occasion of time requirement; In addition, such scheme all can't be accomplished the smooth effect of video playback, increases easily the operating load of master chip.
Be in the application documents of [audio and video synchronization playing method] of 200610062804.X in the patent No., the cross characteristic that utilizes the audio frame in the played file intersects correction dynamically to Media Stream so that result of broadcast reach audio frequency and video synchronously.The synchronous broadcast of this scheme indication refers to the synchronous broadcast between the Audio and Video.
Be in the application documents of 201010295599.8 [a kind of multi-screen synchronized video play method and system] in the patent No., the method and system that provides a kind of multi-screen synchronized video to play, the method comprises: the webserver is sent to each playback terminal with video file; When webserver playing video file, playing progress rate information is sent to each playback terminal; Each playback terminal is aligned in the synchronous broadcast of carrying out video file on the local screen according to the video file and the playing progress rate information that receive by the location.Can reduce the cost of system resource by the present invention, and realize preferably audio video synchronization effect.This technical scheme is to adopt the method for software to control multi-screen synchronous broadcast demonstration, float or slack phenomenon can occur with the control of progress msg sign.
Summary of the invention
The method that the technical problem that the present invention mainly solves provides a kind of audio video synchronization output is in order to realize the synchronous broadcast of two shown videos of mainboard, i.e. the audio video synchronization of two mainboards broadcast in the same terminal.
For solving the problems of the technologies described above, the technical scheme that the present invention adopts is: a kind of method of audio video synchronization output is provided, may further comprise the steps:
S101: whether the first mainboard detects video input; If then turn S102; If not, circulation step S101 then;
S102: the first mainboard is with video decode, and decoded video outputs to HDMI and two display interfaces of CVBS simultaneously; The first mainboard is presented at video on the display interface by the HDMI display interface;
S103: the input source of the second mainboard initialization video input module, the frequency of standard and video input;
S104: the second mainboard starts video input module, receives the video source of the CVBS display interface of the first mainboard;
S105: the video that the second mainboard receives the first mainboard directly with the formal output of window to the VGA display interface;
Concrete, among the step S102, described detection method is: the memory by the video input interface configuration reads current configuration status.
Wherein, described memory is based on I
2The eeprom memory of C bus.
Wherein, described configuration status comprises the sample frequency of configuration.
Further, among the step S104, described standard comprises Phase Alternation Line system.
The technical program also provides a kind of device of audio video synchronization output, and described the first mainboard comprises CVBS output interface, HDMI display interface and the first processing module; CVBS output interface and HDMI interface all are arranged on the first processing module, external the first video window of HDMI interface; The CVBS output interface is connected with the video input interface of the second mainboard; Described the first processing module is used for the video source that the first mainboard receives is decoded and decoded video is sent to the video input interface of the second mainboard through the CVBS output interface, the vision signal of described CVBS output interface the first processing module is sent to the second mainboard, and described HDMI interface is used for that the decoded vision signal of the first processing module is sent to the first video window and shows.The second mainboard comprises video input interface, VGA end, conversion chip and the second processing module; Conversion chip comprises signal input part and signal output part, and the VGA end is arranged on the second processing module; VGA holds external the second video window, and the second processing module of the second mainboard is connected with the signal output part of conversion chip, and the conversion chip signal input part is connected with video input interface; The video source of described conversion chip receiver, video input interface transmission, and be converted to the vision signal of standard, give the second processing module with the video signal transmission after the conversion; The second processing module is sent to the second video window by the VGA end and shows after vision signal is decoded.
Concrete, the video content of described the first mainboard and the second mainboard is play synchronously by video window separately.
Wherein, described the second processing module is passed through I
2The C bus is connected with conversion chip.
Wherein, described conversion chip is the CCIR656 conversion chip.
The beneficial effect of technical solution of the present invention is to be different from the mode that tradition adopts control command, because the difference in set top box main decoding performance and the time control causes the frequent asynchrony phenomenon of both progresses.When progress is inconsistent, the first mainboard needs constantly to send the order that suspends, plays, be used for furthering the first mainboard and the second mainboard playing progress rate between the two, but frequent control causes the video playback Caton phenomenon of the second mainboard, greatly reduce undoubtedly user's sensory experience; Secondly, the first mainboard receive data also is distributed to the second mainboard, and by the broadcasting speed of data flow con-trol the second mainboard, but there is the situation of transmission and operation delay in data flow in network.Particularly in the larger situation of system load, delay phenomenon can be further obvious, even might cause the second mainboard can not obtain for a long time the situation of decoded data, and this scheme real-time is poor, can only be applicable to the not high occasion of time requirement.Traditional technical scheme can't be accomplished the smooth effect of video playback, increases easily the operating load of the first mainboard.
Technical scheme of the present invention is decoded video source by the first mainboard, and the first mainboard directly is presented at external the first video window with decoded video.Meanwhile, the first mainboard is exported to video input interface with decoded video source through the CVBS output interface, behind the video input interface receiver, video source of the second mainboard, by conversion chip video source is converted to standard compliant video, and being transferred to the second processing module, the video after the second processing module will be processed holds external the second video window that this video is shown on the display interface through VGA.The technical program, interconnection by the first mainboard and the second mainboard, the video output of the first mainboard is directly connected to the video input of the second mainboard, utilize the first processing module of set-top box and the ardware feature of the second processing module, open Video Output at software, the first mainboard and the second mainboard all directly show video source by video window, guarantee that the video progress that two ends show is in full accord.Simultaneously, the second mainboard does not need to carry out video decode, can reduce overhead, increases the operational efficiency of system.
Description of drawings
Fig. 1 is the flow chart of method of the audio video synchronization output of the embodiment of the invention;
Fig. 2 is the structured flowchart of device of the audio video synchronization output of the embodiment of the invention.
Embodiment
By describing technology contents of the present invention, structural feature in detail, realized purpose and effect, below in conjunction with execution mode and cooperate that accompanying drawing is detailed to give explanation.
See also Fig. 1, the method of audio video synchronization output disclosed by the invention, in the art, people also export the method for audio video synchronization output usually referred to as Ghosted synchronization, it generally is applied on the equipment such as set-top box, described set-top box comprises the first mainboard and the second mainboard, and the method may further comprise the steps:
S101: whether the first mainboard detects video input; If then turn S102; If not, circulation step S101 then; Described detection method is: the memory by the video input interface configuration reads current configuration status, and this configuration status comprises the sample frequency of configuration.Concrete, described memory is based on I
2The eeprom memory of C bus.
S102: the first mainboard is with video decode, and decoded video outputs to HDMI and two display interfaces of CVBS simultaneously; The first mainboard is presented at video on the display interface by the HDMI display interface;
S103: the input source of the second mainboard initialization video input module, the frequency of standard and video input; Described standard comprises Phase Alternation Line system, and pal mode is a kind of method of color-code in the television broadcasting.Full Phase Alternating Line by name, i.e. line-by-line inversion." PAL " also is used to refer to 625 lines sometimes, per second 25 lattice, alternate-line scanning, the television system of PAL color-code.
S104: the second mainboard starts video input module, receives the video source of the CVBS display interface of the first mainboard;
S105: the video that the second mainboard receives the first mainboard directly with the formal output of window to the VGA display interface.
Further, in order to realize audio video synchronization output, namely realize the effect of video Ghosted synchronization, another technical scheme that the present invention adopts provides a kind of device of audio video synchronization output, and described the first mainboard comprises CVBS output interface, HDMI display interface and the first processing module; CVBS output interface and HDMI interface all are arranged on the first processing module, external the first video window of HDMI interface; The CVBS output interface is connected with the video input interface of the second mainboard; Described the first processing module is used for the video source that the first mainboard receives is decoded and decoded video is sent to the video input interface of the second mainboard through the CVBS output interface, the vision signal of described CVBS output interface the first processing module is sent to the second mainboard, and described HDMI interface is used for that the decoded vision signal of the first processing module is sent to the first video window and shows.
The second mainboard comprises video input interface, VGA end, conversion chip and the second processing module; Conversion chip comprises signal input part and signal output part, and the VGA end is arranged on the second processing module; VGA holds external the second video window, and the second processing module of the second mainboard is connected with the signal output part of conversion chip, and the conversion chip signal input part is connected with video input interface; The video source of described conversion chip receiver, video input interface transmission, and be converted to the vision signal of standard, give the second processing module with the video signal transmission after the conversion; The second processing module is sent to the second video window by the VGA end and shows after vision signal is decoded.
The technical program, by described the first mainboard and the second mainboard, the realization video content is play synchronously by video window, can not produce the phenomenons such as hysteresis, card machine.
As improved, described the second processing module is passed through I
2The C bus is connected with conversion chip.
Secondly, this technical scheme, the second mainboard is by I2C bus configuration CCIR656 conversion chip, and controls its whether receiver, video input signal; The video of the first mainboard is exported the input interface that is connected to the second mainboard by the CVBS interface, and transfers the ITU656 vision signal of standard to by the CCIR656 conversion chip, and is connected to the input pin of the second processing module of the second mainboard; At last, the second mainboard utilizes 656 video signal processing module of chip internal, and the signal of inputting is shown on the screen as video source.
What the device of described audio video synchronization output was concrete can be set-top box, described set-top box is directly connected to the output of the first mainboard the input of the second mainboard, mode by the hardware input, the video source of the synchronous device of exporting of input video is processed by the first processing module and the second processing module, make the vision signal simultaneous display on video window, guarantee that the video progress that two ends show is consistent fully, simultaneously, the second mainboard does not need to carry out video decode, can reduce overhead, increase the operational efficiency of system.The technical program can improve the fault-tolerance of decoding, and is low to system resources consumption, and the present invention has realized the synchronization video broadcast, compared with prior art more quick on the basis of hardware supports, precisely.
The above only is embodiments of the invention; be not so limit claim of the present invention; every equivalent structure transformation that utilizes specification of the present invention and accompanying drawing content to do, or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.
Claims (9)
1. the method for an audio video synchronization output is characterized in that, may further comprise the steps:
S101: whether the first mainboard detects video input; If then turn S102; If not, circulation step S101 then;
S102: the first mainboard is with video decode, and decoded video outputs to HDMI display interface and CVBS output interface simultaneously; The first mainboard is presented at video on the display interface by the HDMI display interface;
S103: the frequency of input source, standard and the video input of the second mainboard initialization video input module;
S104: the second mainboard starts video input module, receives the video source of the CVBS output interface of the first mainboard;
S105: the video that the second mainboard receives the first mainboard directly with the formal output of window to the VGA display interface.
2. the method for audio video synchronization according to claim 1 output, it is characterized in that: among the step S102, described detection method is: the memory by the video input interface configuration reads current configuration status.
3. the method for audio video synchronization according to claim 2 output is characterized in that: described memory is for based on I
2The eeprom memory of C bus.
4. the method for audio video synchronization according to claim 2 output, it is characterized in that: described configuration status comprises the sample frequency of configuration.
5. the method for audio video synchronization according to claim 1 output, it is characterized in that: among the step S104, described standard comprises Phase Alternation Line system.
6. the device of an audio video synchronization output is characterized in that: comprise the first mainboard and the second mainboard;
Described the first mainboard comprises CVBS output interface, HDMI display interface and the first processing module; CVBS output interface and HDMI interface all are arranged on the first processing module, external the first video window of HDMI interface; The CVBS output interface is connected with the video input interface of the second mainboard; Described the first processing module is used for the video source that the first mainboard receives is decoded and decoded video is sent to the video input interface of the second mainboard through the CVBS output interface, the vision signal of described CVBS output interface the first processing module is sent to the second mainboard, and described HDMI interface is used for that the decoded vision signal of the first processing module is sent to the first video window and shows;
The second mainboard comprises video input interface, VGA end, conversion chip and the second processing module; Conversion chip comprises signal input part and signal output part, and the VGA end is arranged on the second processing module; VGA holds external the second video window, and the second processing module of the second mainboard is connected with the signal output part of conversion chip, and the conversion chip signal input part is connected with video input interface; The video source of described conversion chip receiver, video input interface transmission, and be converted to the vision signal of standard, give the second processing module with the video signal transmission after the conversion; The second processing module is sent to the second video window by the VGA end and shows after vision signal is decoded.
7. the device of audio video synchronization according to claim 6 output, it is characterized in that: the video content of described the first mainboard and the second mainboard is play synchronously by video window separately.
8. the device of audio video synchronization according to claim 6 output, it is characterized in that: described the second processing module is passed through I
2The C bus is connected with conversion chip.
9. according to claim 6 to the device of the described audio video synchronization output of 8 any one, it is characterized in that: described conversion chip is the CCIR656 conversion chip.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103475928A (en) * | 2013-08-30 | 2013-12-25 | 福建星网视易信息系统有限公司 | Method and device for realizing one-machine multi-screen output based on RGB (Red, Green, Blue) synchronization technology |
| CN104243853A (en) * | 2014-08-25 | 2014-12-24 | 青岛歌尔声学科技有限公司 | High-definition multimedia interface (HDMI) double-display device and display method |
| WO2014205992A1 (en) * | 2013-06-28 | 2014-12-31 | 京东方科技集团股份有限公司 | Multi-terminal synchronous display method, display apparatus, and display apparatus cascading system |
| CN111417233A (en) * | 2019-11-19 | 2020-07-14 | 深圳智芯半导体科技有限公司 | Lamp and method for eliminating L ED display low-gray jitter |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101000755A (en) * | 2006-12-21 | 2007-07-18 | 康佳集团股份有限公司 | Multi-screen display splicing controller |
| CN101937667A (en) * | 2010-09-19 | 2011-01-05 | 深圳市中庆微科技开发有限公司 | Multi-screen synchronous display controlling system |
| JP2012142716A (en) * | 2010-12-28 | 2012-07-26 | Funai Electric Co Ltd | Video audio output device |
-
2012
- 2012-12-07 CN CN201210528639.8A patent/CN103024516B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101000755A (en) * | 2006-12-21 | 2007-07-18 | 康佳集团股份有限公司 | Multi-screen display splicing controller |
| CN101937667A (en) * | 2010-09-19 | 2011-01-05 | 深圳市中庆微科技开发有限公司 | Multi-screen synchronous display controlling system |
| JP2012142716A (en) * | 2010-12-28 | 2012-07-26 | Funai Electric Co Ltd | Video audio output device |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014205992A1 (en) * | 2013-06-28 | 2014-12-31 | 京东方科技集团股份有限公司 | Multi-terminal synchronous display method, display apparatus, and display apparatus cascading system |
| CN103475928A (en) * | 2013-08-30 | 2013-12-25 | 福建星网视易信息系统有限公司 | Method and device for realizing one-machine multi-screen output based on RGB (Red, Green, Blue) synchronization technology |
| CN103475928B (en) * | 2013-08-30 | 2017-02-01 | 福建星网视易信息系统有限公司 | Method and device for realizing one-machine multi-screen output based on RGB (Red, Green, Blue) synchronization technology |
| CN104243853A (en) * | 2014-08-25 | 2014-12-24 | 青岛歌尔声学科技有限公司 | High-definition multimedia interface (HDMI) double-display device and display method |
| CN111417233A (en) * | 2019-11-19 | 2020-07-14 | 深圳智芯半导体科技有限公司 | Lamp and method for eliminating L ED display low-gray jitter |
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