CN111400979A - SOC simulation method, system, electronic device and storage medium - Google Patents

SOC simulation method, system, electronic device and storage medium Download PDF

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Publication number
CN111400979A
CN111400979A CN202010214577.8A CN202010214577A CN111400979A CN 111400979 A CN111400979 A CN 111400979A CN 202010214577 A CN202010214577 A CN 202010214577A CN 111400979 A CN111400979 A CN 111400979A
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soc
creating
tested
file
simulation
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Inventor
邵扬帆
潘永斌
胡志卷
陈科
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Hangzhou Boya Hongtu Video Technology Co ltd
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Hangzhou Boya Hongtu Video Technology Co ltd
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Abstract

The application discloses a simulation method, a system, an electronic device and a storage medium of SOC, wherein the simulation method of SOC comprises the following steps: reading information of the SOC to be tested; constructing an engineering directory structure according to the read information of the SOC to be tested, and providing a uniform command interface for the engineering directory structure; creating a script of the engineering directory structure, wherein the script is used for executing a simulation process; setting file attributes of files in the engineering directory structure; setting the attribute of the parameter in the file; and transmitting the set parameters to a unified command interface, inputting a simulation execution command, and simulating the SOC to be tested. According to the SOC simulation method, the engineering directory structure is established, the unified command interface is provided, the script is established, the file attribute is set, the attribute of the parameter in the file is set, and the like, so that the simulation system is constructed and completed, the simulation system can flexibly achieve various compiling and simulation functions, the functions are rich, and the simulation result is accurate.

Description

SOC simulation method, system, electronic device and storage medium
Technical Field
The present application relates to the field of electronic simulation technologies, and in particular, to a method and a system for simulating an SOC, an electronic device, and a storage medium.
Background
At present, the main purpose of System-on-a-Chip (SOC) digital simulation is to confirm whether the functions of the design specifications are completely implemented and whether all the functions are correct. The research, development and analysis of the SOC in the electronic field need to be simulated by using computer simulation software, and the key of the simulation is to establish a required simulation model through the software. Most simulation software in the prior art has single function, poor simulation effect, inaccurate simulation result and larger error, and simulation software with different command interfaces cannot receive and execute the same simulation command, so that the working efficiency of hardware research and development is greatly influenced due to the defects, and a solution is urgently needed.
Disclosure of Invention
The application aims to provide a simulation method and system of an SOC, an electronic device and a storage medium. The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview and is intended to neither identify key/critical elements nor delineate the scope of such embodiments. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.
According to an aspect of an embodiment of the present application, there is provided a simulation method of an SOC, including:
reading information of the SOC to be tested;
constructing an engineering directory structure according to the read information of the SOC to be tested, and providing a uniform command interface for the engineering directory structure;
creating a script of the engineering directory structure, wherein the script is used for executing a simulation process;
setting file attributes of files in the engineering directory structure;
setting the attribute of the parameter in the file according to the read information of the SOC to be tested;
and transmitting the set parameters to the unified command interface, inputting a simulation execution command, and simulating the SOC to be tested.
Further, the reading of the information of the SOC to be tested comprises reading an RT L code of the SOC to be tested, and extracting the name, the type, the bit width and the transmission direction of each port of the SOC to be tested from the RT L code.
Further, the constructing an engineering directory structure according to the read information of the SOC to be tested includes:
creating an engineering space;
creating a plurality of static libraries under the engineering space;
creating a plurality of directory object units under each static library;
creating a plurality of view classes under each directory object unit;
creating a plurality of file lists under each view class;
and creating a plurality of files under each file list, wherein the files correspond to the read information of the SOC to be tested.
Further, the file attribute includes a file name and a file type.
Further, the attributes of the parameter include a name, a data type, a unit, and a default value of the parameter.
Further, the script includes a document and platform code.
According to another aspect of an embodiment of the present application, there is provided a simulation system of an SOC, including:
the reading module is used for reading the information of the SOC to be tested;
the construction module is used for constructing an engineering directory structure according to the read information of the SOC to be tested and providing a uniform command interface for the engineering directory structure;
the creating module is used for creating a script of the engineering directory structure, and the script is used for executing a simulation process;
the first setting module is used for setting the file attributes of the files in the project directory structure;
the second setting module is used for setting the attribute of the parameter in the file according to the read information of the SOC to be tested;
and the operation module is used for transmitting the set parameters to the unified command interface, inputting a simulation execution command and simulating the SOC to be tested.
Further, the building module comprises:
means for creating an engineering space;
a module for creating a number of static libraries under the engineering space;
a module for creating a number of catalog object units under each of the static libraries;
a module for creating view classes under each of said directory object units;
a module for creating a number of file lists under each said view class;
and the module is used for creating a plurality of files under each file list, and the files correspond to the read information of the SOC to be tested.
According to another aspect of the embodiments of the present application, there is provided an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor executes the program to implement the simulation method of the SOC described above.
According to another aspect of embodiments of the present application, there is provided a non-transitory computer-readable storage medium having stored thereon a computer program, which is executed by a processor, to implement the simulation method of the SOC described above.
The technical scheme provided by one aspect of the embodiment of the application can have the following beneficial effects:
according to the SOC simulation method provided by the embodiment of the application, the simulation system is constructed and completed by the steps of establishing the project directory structure, providing the unified command interface, creating the script, setting the file attribute, setting the attribute of the parameter in the file and the like, the simulation system can flexibly achieve various compiling and simulation functions, is rich in function and accurate in simulation result, can well meet the simulation detection requirement of a hardware system in practical application, and greatly improves the work efficiency of hardware research and development.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the embodiments of the application, or may be learned by the practice of the embodiments. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 shows a flow diagram of a method for simulating an SOC of an embodiment of the present application;
FIG. 2 illustrates a block diagram of the structure of an engineering catalog structure of one embodiment of the present application;
FIG. 3 illustrates a flow diagram for building an engineering catalog structure, according to one embodiment of the present application.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers, and relative sizes and positional relationships therebetween shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, as actually required.
As shown in fig. 1, an embodiment of the present application provides a simulation method of an SOC, including:
and S0, reading the information of the SOC to be tested.
The reading of the information of the SOC to be tested comprises the steps of reading an RT L code of the SOC to be tested, and extracting the name, the type, the bit width and the transmission direction of each port of the SOC to be tested from the RT L code.
After the RT L code of the SOC to be tested is read, the information keywords (such as input, output, inout, etc.) of each port included in the RT L code are identified, and the information such as the name, type, bit width, transmission direction, etc. of each port of the SOC is extracted.
S1, constructing an engineering directory structure according to the read information of the SOC to be tested, and providing a uniform command interface for the engineering directory structure.
As shown in fig. 2, the engineering directory structure constructed by the present embodiment includes: the system comprises an engineering space, a plurality of static libraries, a plurality of directory object units, a plurality of view classes, a plurality of file lists and a plurality of files.
As shown in fig. 3, the building of the project directory structure in step S1 includes:
s11, creating an engineering space;
such as the engineering space works in fig. 2 (the directory name may be consistent with the project name).
S12, creating a plurality of static libraries in the engineering space;
the project space Workspace includes 1 or more lib static libraries.
For example, four lib static libraries may be set up:
(1)VERIFY,testbench/testcase;
(2) a platform script;
(3) IP, IP used in all socs (containing rtl and file list description);
(4) ASIC, all IP above hierarchical RT L code.
S13, creating a plurality of directory object units under each static library;
the lib static library (named generally ip _ xxx) includes 1 or more cells (target object units). Cell is the most basic unit, and the name of Cell is generally in the form of xxx and cannot be repeated throughout the whole works space.
For example, 1 cell can be set below VERIFY: verify. A plurality of views are arranged under the verify directory, and the following views are sequentially arranged:
(1) cfg, presence profile;
(2) env, environment variable setting script;
(3) fg, file group: a set of file lists;
(4)testbench,TB;
(5) testcase, test case;
(6) work, temporary working directory.
The Nemo is followed by a cell Nemo, a view script is followed by the Nemo, and scripts of the platform are followed.
S14, creating a plurality of view classes (namely view classes) under each directory object unit;
each cell includes multiple view classes, such as rtl/fg/env/cfg, etc.
S15, creating a plurality of file lists (filelist) under each view class (namely view class);
for example, the directory of rtl may store a file list (filelist) of functions, such as SoC, dc, etc. for simulation.
The fg, i.e. the file group, fg, stores various file lists (not only lists, but also macros, include), wherein the most basic list includes 3 file lists:
py, list of documents related to the design;
py, test environment-related file list, if there are multiple test environments, the file list can be added, e.g., tb _1. pl;
py, library-related file list.
S16, create several files under each file list.
For example, the file under the directory of env is cshrc, which is mainly used to define the environment variable PROJ. Before the environment is used, it needs to be executed under the directory: source cshrc.
Cfg is used for profile xxx.cfg;
and configuring file examples for specifying information such as file lists, macros and the like (the files need to be analyzed by scripts).
Cfg, for example, sim:
#sim config
[sim]
defines=+define+A+define+B
[fg]
fg_top=../fg/tb.py#top level fg
fg_lib=../fg/lib.py#library
fg_view=../cfg/view/abc.view
view is as follows:
[file]
file=../cfg/view/rtl.view#read default rtl view
[view]
gra=fake#override previous setting,and use cell’s fake view
jpg=fake
cfg can also be similar to soc.
File list definition (fg for short)
Whatever format is used, it is required to accurately describe all verilog files, macro definitions, include relationships, and sub-IP containment relationships in the entire cell (e.g., some common cell may be used, and a module in this cell may be called by other cells).
File list reference
The following is only implemented with perl (not the best choice, as an example) and it can be seen that some information needs to be given by the IP integrator.
Dictionary
Whatever the list, each list is composed of 6 dictionaries (hash):
####get project setting#####
$PROJ=$ENV{PROJ};
####dict####
%VlgFiles=();#verilog file list
%SvFiles=();#Sv file list
%Options=();#Option list
%Tops=();#Top level
%Subs=();#Sub cells
%Mems=();#memory file list
view, each view is defined in each dictionary. View can be extended, and base View has the following:
default, Default view
12####default view####
13$VlgFiles{default}=[
14″$PROJ/ip_xxx/xxx/rtl/xxx_top.v″,
15″$PROJ/ip_xxx/xxx/rtl/xxx_core.v″,
16];
17$SvFiles{default}=[];
18$Options{default}=[
19″+incdir+$PROJ/ip_xxx/xxx/rtl/config_sim″,
20″+define+RTL_sIM″];
21$Tops{default}=[];
22$Subs{default}=[″sub1″,″sub2″];
23$Mems{default}=[];
rtl for simulation
25####rtl view####
26$VlgFiles{rtl}=$VlgFiles{default};
27$SvFiles{rtl}=$SvFiles{default};
28$Options{rtl}=$Options{default};
29$Tops{rtl}=$Tops{default};
30$Subs{rtl}=$Subs{default};
31$Mems{rtl}=$Mems{default};
FPGA view for FPGA;
33####fpga view####
34$VlgFiles{fpga}=$VlgFiles{default};#use
35$SvFiles{fpga}=$SvFiles{default};
36$Options{fpga}=[
37″+incdir+$PROJ/ip_xxx/xxx/rtl/config_fpga″,
38″+define+RTL_FPGA″];
39$Tops{fpga}=$Tops{default};
4Θ$Subs{fpga}=$Subs{default};
41$Mems{fpga}=$Mems{default};
dc view for dc synthesis;
43####dc view####
44$VlgFiles{dc}=$VlgFiles{default};#use t
45$SvFiles{dc}=$SvFiles{default};
46$Options{dc}=[
47″+incdir+$PROJ/ip_xxx/xxx/rtl/config_bkd″,
48″+define+RTL_Backend″];
49$Tops{dc}=$Tops{default};
5Θ$Bubs{dc}=$Bubs{default};
51$Mems{dc}=$Mems{default};
fake view for replacing some modules with empty cases: accelerating the simulation; or when the fpga resource is in shortage, the layout and wiring are performed.
53####fake view####
54$VlgFiles{fake}=[″$PROJ/ip_xxx/xxx/fake/xxx_top.v″];
55$SvFiles{fake}=[];
56$Options{fake}=[];
57$Tops{fake}=[];
58$Subs{fake}=[];
59$Mems{fake}=[];
S2, creating a script of the project directory structure, wherein the script is used for executing the simulation process.
All functions are specified by run commands, each function having a sub-script and a function script. The function script generates a final execution script by calling a common function. Common scripts are used to handle problems encountered by all functions, such as filelist generation, cfg parsing, etc. (DC temporarily not needed). In some embodiments, the script utilizes the python inheritance feature to facilitate expansion. The basic purpose of Run scripts is option resolution and passing parameters to function scripts.
The script includes a document and platform code.
In some embodiments, the document includes:
design Spec (need to be provided firstly, and then the next step is carried out after the review passes);
designing a document in detail;
userguide, contains the user to use and add tools, such as how to add palladium.
In some embodiments, the platform code comprises:
python source code, and makefile for the test template, simple driver.
Other source codes of the platform, such as all source codes on tb, model.
Platform cases, 2 cases (one for each of C case and UVM case) need to be provided per IP.
And S3, setting the file attribute of the file in the project directory structure. The file attribute of each file includes file attributes such as a file name and a file type.
S4, setting the attribute of the parameter in the file according to the read information of the SOC to be tested;
the attributes of a parameter include the name, data type, unit, and default values of the parameter. The values of the parameters may be set according to the performance requirement value of the SOC to be measured (not to be set again while maintaining the default values).
And S5, transmitting the set parameters to the unified command interface (the unified command interface can accept the same type of simulation commands), inputting a simulation execution command, and simulating the SOC to be tested.
The simulation result is obtained through the above steps S0-S5.
Another embodiment of the present application also provides a simulation system of an SOC, including:
the reading module is used for reading the information of the SOC to be tested;
the construction module is used for constructing an engineering directory structure according to the read information of the SOC to be tested and providing a uniform command interface for the engineering directory structure;
the creating module is used for creating a script of the engineering directory structure, and the script is used for executing a simulation process;
the first setting module is used for setting the file attributes of the files in the project directory structure;
the second setting module is used for setting the attribute of the parameter in the file according to the read information of the SOC to be tested;
and the operation module is used for transmitting the set parameters to the unified command interface, inputting a simulation execution command and simulating the SOC to be tested.
The emulation system includes the following VIPs: synopsys Amba for performing performance simulation, analysis, bandwidth analysis, etc.; IPSOC is compatible, and IPcase can be seamlessly moved to the soc platform for testing.
The building module comprises:
means for creating an engineering space;
a module for creating a number of static libraries under the engineering space;
a module for creating a number of catalog object units under each of the static libraries;
a module for creating view classes under each of said directory object units;
a module for creating a number of file lists under each said view class;
and the module is used for creating a plurality of files under each file list, and the files correspond to the read information of the SOC to be tested.
Another embodiment of the present application provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the simulation method of the SOC.
Another embodiment of the present application provides a non-transitory computer-readable storage medium having stored thereon a computer program, which is executed by a processor, to implement the simulation method of the SOC described above.
The SOC simulation method provided by the embodiment of the application constructs and completes the simulation system by establishing the engineering directory structure with the cell (IP) as the basic unit, providing the unified command interface, creating the script, setting the file attribute, setting the attribute of the parameter in the file and other steps, and the simulation system can flexibly realize the functions of VCS compiling and simulating, SOC compiling, DC compiling, palladium simulating and the like, has rich functions and accurate simulation result, can well meet the simulation detection requirement of a hardware system in practical application, and greatly improves the work efficiency of hardware research and development.
The term "module" is not intended to be limited to a particular physical form. Depending on the particular application, a module may be implemented as hardware, firmware, software, and/or combinations thereof. Furthermore, different modules may share common components or even be implemented by the same component. There may or may not be clear boundaries between the various modules.
It should be understood that, although the steps in the flowcharts of the figures are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and may be performed in other orders unless explicitly stated herein. Moreover, at least a portion of the steps in the flow chart of the figure may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed alternately or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
This application is not directed to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of the present application as described herein, and any descriptions of specific languages are provided above to disclose the best modes of the present application.
The embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the present disclosure, and such alternatives and modifications are intended to be within the scope of the present disclosure.

Claims (10)

1. A simulation method of an SOC, comprising:
reading information of the SOC to be tested;
constructing an engineering directory structure according to the read information of the SOC to be tested, and providing a uniform command interface for the engineering directory structure;
creating a script of the engineering directory structure, wherein the script is used for executing a simulation process;
setting file attributes of files in the engineering directory structure;
setting the attribute of the parameter in the file according to the read information of the SOC to be tested;
and transmitting the set parameters to the unified command interface, inputting a simulation execution command, and simulating the SOC to be tested.
2. The method of claim 1, wherein the reading the information of the SOC to be tested comprises reading an RT L code of the SOC to be tested, and extracting the name, type, bit width and transmission direction of each port of the SOC to be tested from the RT L code.
3. The method of claim 1, wherein the constructing an engineering directory structure according to the read information of the SOC under test comprises:
creating an engineering space;
creating a plurality of static libraries under the engineering space;
creating a plurality of directory object units under each static library;
creating a plurality of view classes under each directory object unit;
creating a plurality of file lists under each view class;
and creating a plurality of files under each file list, wherein the files correspond to the read information of the SOC to be tested.
4. The method of claim 1, wherein the file attributes comprise a file name and a file type.
5. The method of claim 1, wherein the attributes of the parameter include a name, a data type, a unit, and a default value of the parameter.
6. The method of claim 1, wherein the script comprises a document and platform code.
7. A simulation system for an SOC, comprising:
the reading module is used for reading the information of the SOC to be tested;
the construction module is used for constructing an engineering directory structure according to the read information of the SOC to be tested and providing a uniform command interface for the engineering directory structure;
the creating module is used for creating a script of the engineering directory structure, and the script is used for executing a simulation process;
the first setting module is used for setting the file attributes of the files in the project directory structure;
the second setting module is used for setting the attribute of the parameter in the file according to the read information of the SOC to be tested;
and the operation module is used for transmitting the set parameters to the unified command interface, inputting a simulation execution command and simulating the SOC to be tested.
8. The system of claim 7, wherein the building module comprises:
means for creating an engineering space;
a module for creating a number of static libraries under the engineering space;
a module for creating a number of catalog object units under each of the static libraries;
a module for creating view classes under each of said directory object units;
a module for creating a number of file lists under each said view class;
and the module is used for creating a plurality of files under each file list, and the files correspond to the read information of the SOC to be tested.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the program to implement the method of any one of claims 1-6.
10. A non-transitory computer readable storage medium having stored thereon a computer program, characterized in that the program is executed by a processor to implement the method according to any one of claims 1-6.
CN202010214577.8A 2020-03-24 2020-03-24 SOC simulation method, system, electronic device and storage medium Pending CN111400979A (en)

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