CN111399292A - Array substrate, preparation method thereof and touch liquid crystal display device - Google Patents
Array substrate, preparation method thereof and touch liquid crystal display device Download PDFInfo
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- CN111399292A CN111399292A CN202010274220.9A CN202010274220A CN111399292A CN 111399292 A CN111399292 A CN 111399292A CN 202010274220 A CN202010274220 A CN 202010274220A CN 111399292 A CN111399292 A CN 111399292A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/042—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1251—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
- G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
- G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
Abstract
The invention provides an array substrate and a preparation method thereof, wherein the array substrate comprises a plurality of sub-pixels which are arranged in an array manner, each sub-pixel comprises a display pixel area and a photosensitive pixel area, a switch thin film transistor and a pixel electrode which are electrically connected are arranged in the display pixel area, and a photosensitive thin film transistor is arranged in the photosensitive pixel area. The invention provides a touch liquid crystal display device which comprises the array substrate. According to the array substrate, the preparation method thereof and the touch liquid crystal display device provided by the invention, the switch thin film transistor and the pixel electrode which are electrically connected are formed in the display pixel area of the array substrate, and the photosensitive thin film transistor is formed in the photosensitive pixel area of the array substrate, so that the manufacturing process of the photosensitive thin film transistor is compatible with that of the switch thin film transistor, and the cost is reduced while the remote sensing is realized.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a preparation method thereof and a touch liquid crystal display device.
Background
In recent years, hydrogenated amorphous silicon thin film transistor (a-Si: H TFT) technology is widely applied to L CD switching elements.
Further, a-Si: the high photosensitivity of H TFTs also provides potential for optical sensor applications. With a-Si: the electro-optical characteristics of the H thin film can be such that a-Si: the H TFT realizes multiple value-added functions such as X-ray image sensing, fingerprint and optical touch display. Among these new TFT technologies, an ultra-large-sized interactive screen with a remote touch function is highly appreciated in conference rooms and conference room applications, in which case a light emitting diode or a laser pointer is generally used to provide a multi-point optical input function. How to embed the photosensitive thin film transistor into the touch liquid crystal display device and to be compatible with the TFT switching process of the touch liquid crystal display device is a problem to be solved urgently.
Disclosure of Invention
The invention aims to provide an array substrate, a preparation method thereof and a touch liquid crystal display device, and aims to solve the problem that a photosensitive thin film transistor cannot be compatible with a manufacturing process of the touch liquid crystal display device when the existing touch liquid crystal device realizes remote touch.
The technical problem to be solved by the invention is realized by adopting the following technical scheme.
The invention provides an array substrate which comprises a plurality of sub-pixels arranged in an array mode, wherein each sub-pixel comprises a display pixel area and a photosensitive pixel area, a switch thin film transistor and a pixel electrode which are electrically connected are arranged in the display pixel area, and a photosensitive thin film transistor is arranged in the photosensitive pixel area.
In one embodiment of the present invention, the array substrate includes a first data line and a first scan line electrically connected to the switching thin film transistor and a second data line and a second scan line electrically connected to the photosensitive thin film transistor.
The invention also provides a touch liquid crystal display device which comprises the array substrate.
In an embodiment of the invention, the touch-control liquid crystal display device includes a color filter substrate disposed opposite to the array substrate, the color filter substrate includes a first color resistance region, a second color resistance region and a third color resistance region, and each color resistance region is disposed corresponding to a sub-pixel on the array substrate.
The invention also provides a method for preparing the array substrate, which comprises the following steps:
synchronously forming a switch thin film transistor and a photosensitive thin film transistor in a display pixel area and a photosensitive pixel area on the substrate of the array substrate;
forming a pixel electrode and a common electrode which are insulated from each other on the switching thin film transistor, wherein the pixel electrode is electrically connected with the switching thin film transistor;
in one embodiment of the present invention, the step of forming the switching thin film transistor and the photosensitive thin film transistor in synchronization with the display pixel region and the photosensitive pixel region on the base of the array substrate includes:
forming a first gate and a second gate on the display pixel region and the photosensitive pixel region of the substrate, respectively, and forming an insulating layer on the substrate on which the first gate and the second gate are formed.
In one embodiment of the present invention, the step of forming an insulating layer on the substrate on which the first and second gates are formed includes:
after forming a second channel layer on the second gate electrode on which the insulating layer is formed, a first channel layer is formed on the first gate electrode on which the insulating layer is formed.
In one embodiment of the present invention, the step after forming the first channel layer on the first gate electrode of the insulating layer further includes: and forming a light resistance layer on the first channel layer, and forming a source drain metal layer on the second channel layer and the first channel layer formed with the light resistance layer.
In an embodiment of the present invention, the source-drain metal layer above the second channel layer is etched to form a second source electrode and a second drain electrode of the photosensitive thin film transistor.
In an embodiment of the present invention, after the photoresist layer above the first channel layer is stripped by a stripping process, the source drain metal layer above the first channel layer forms a first source electrode and a first drain electrode of the switching thin film transistor; the distance between the first source and the first drain is less than or equal to the distance between the second source and the second drain.
In one embodiment of the present invention, the switching thin film transistor is an oxide thin film transistor, and the photosensitive thin film transistor is a hydrogenated amorphous silicon thin film transistor.
According to the array substrate and the preparation method thereof provided by the invention, the switch thin film transistor and the pixel electrode which are electrically connected are formed in the display pixel area of the array substrate, and the photosensitive thin film transistor is formed in the photosensitive pixel area of the array substrate, so that the manufacturing process of the photosensitive thin film transistor is compatible with the manufacturing process of the switch thin film transistor, and the cost is reduced while the remote sensing is realized.
Drawings
Fig. 1 is a cross-sectional view of a liquid crystal touch display device according to a first embodiment of the invention.
Fig. 2 is a schematic plan view of a color filter substrate according to a first embodiment of the invention.
Fig. 3 is a schematic plan view of an array substrate according to a first embodiment of the invention.
Fig. 4a to 4m are flow charts of a manufacturing process of an array substrate according to a first embodiment of the invention.
Fig. 5 is a cross-sectional view of an array substrate according to a second embodiment of the invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description of the embodiments, structures, features and effects of the present invention will be made with reference to the accompanying drawings and examples.
[ first embodiment ]
Fig. 1 is a cross-sectional view of a liquid crystal touch display device according to a first embodiment of the invention, fig. 2 is a schematic plan structure view of a color filter substrate according to the first embodiment of the invention, and fig. 3 is a schematic plan structure view of an array substrate according to the first embodiment of the invention. Referring to fig. 1 to 3, an embodiment of the invention provides a liquid crystal touch display device, which includes an array substrate 100, where the array substrate 100 includes a plurality of sub-pixels SP (sub-pixels) arranged in an array, a first data line 41, a first scan line 51, a second data line 42, and a second scan line 52, each sub-pixel SP includes a display pixel area SP1 and a photosensitive pixel area SP2, a switching thin film transistor 10 and a pixel electrode 31 are electrically connected in the display pixel area SP1, and a photosensitive thin film transistor 20 is disposed in the photosensitive pixel area SP 2; the first data line 41 and the first scan line 51 are electrically connected to the switching thin film transistor 10, respectively, and the second data line 42 and the second scan line 52 are electrically connected to the photosensitive thin film transistor 20, respectively. In this embodiment, the sub-pixels SP are, for example, red R, green G or blue B sub-pixels, and a plurality of adjacent sub-pixels SP constitute one display pixel (pixel). For example, one display pixel may include three subpixels SP of red R, green G, and blue B.
Referring to fig. 1 to 3, the first data line 41 and the second data line 42 are disposed adjacent to each other and in parallel, and the first scan line 51 and the second scan line 52 are disposed adjacent to each other and in parallel. The switching thin film transistor 10 includes a first gate electrode 11, a first channel layer 13, a first source electrode 14, and a first drain electrode 15, the first gate electrode 11 being connected to the first scan line 51, the first channel layer 13 being disposed over the first gate electrode 11 and being electrically connected to the first source electrode 14 and the first drain electrode 15, respectively, one of the first source electrode 14 and the first drain electrode 15 being electrically connected to the first data line 41, and the other of the first source electrode 14 and the first drain electrode 15 being connected to the pixel electrode 31. For example, the first source electrode 14 is connected to the first data line 41, and the first drain electrode 15 is connected to the pixel electrode 31.
The photosensitive thin film transistor 20 includes a second gate electrode 21, a second channel layer 23, a second source electrode 24, and a second drain electrode 25, the second gate electrode 21 is connected to the second scan line 52, and the second channel layer 23 is disposed above the second gate electrode 21 and electrically connected to the second source electrode 24 and the second drain electrode 25, respectively. One of the second source electrode 24 and the second drain electrode 25 is connected to the second data line 42, and the other of the second source electrode 24 and the second drain electrode 25 is connected to the second scan line 52 through a contact hole, for example, the second source electrode 24 is connected to the second data line 42, and the second drain electrode 25 is connected to the second scan line 52 through a contact hole. In this embodiment, the first scan line 51 and the second scan line 52 may be connected to the same signal terminal to receive the same electrical signal.
Referring to fig. 1 to fig. 3, the liquid crystal touch display device further includes a color filter substrate 200 disposed opposite to the array substrate 100, wherein the color filter substrate 200 includes a first color resistance region 201, a second color resistance region 202, and a third color resistance region 203, for example: the first color resistance region 201 is a red color resistance region, the second color resistance region is a green color resistance region, and the third color resistance region 203 is a blue color resistance region. Each color resistance region is disposed corresponding to one sub-pixel SP on the array substrate 100.
When L ED light or laser light is irradiated on the liquid crystal touch display device, L ED light or laser light is irradiated on the array substrate 100 through the color filter substrate 200, and the light-sensitive thin film transistor 20 of the array substrate 100 can convert the light intensity into an electrical signal, so that non-contact remote touch can be realized.
In the present embodiment, the distance between the first source electrode 14 and the first drain electrode 15 is equal to the distance between the second source electrode 24 and the second drain electrode 25.
Fig. 4a to 4m are flow charts of a manufacturing process of an array substrate according to a first embodiment of the present invention, and referring to fig. 4a to 4m, a method for manufacturing an array substrate according to an embodiment of the present invention includes:
forming a switching thin film transistor 10 and a photosensitive thin film transistor 20 in synchronization with the display pixel region SP1 and the photosensitive pixel region SP2 on the base 110 of the array substrate 100;
a pixel electrode 31 and a common electrode 32 are formed on the switching thin film transistor 10 to be insulated from each other, and the pixel electrode 31 is electrically connected to the switching thin film transistor 10.
The switching thin film transistor 10 is an oxide thin film transistor, and the photosensitive thin film transistor 20 is a hydrogenated amorphous silicon thin film transistor.
The following describes a manufacturing flow of the array substrate 100 in detail.
Referring to fig. 4a, a substrate 110 is provided, and a first gate 11 and a second gate 21 are simultaneously formed on the substrate 110, wherein the first gate 11 is located in the display pixel region SP1, and the second gate 21 is located in the photosensitive pixel region SP 2. Then, a gate insulating layer 101 and an insulating layer 12 are sequentially formed on the substrate 110 on which the first gate 11 and the second gate 21 are formed. The material of the insulating layer 12 is, for example, silicon oxide.
Referring to fig. 4b, a second channel layer 23 is formed on the second gate 21 on which the insulating layer 12 is formed. The second channel layer 23 is an a-Si: H thin film layer.
Referring to fig. 4c, a first channel layer 13 is formed on the first gate 11 on which the insulating layer 12 is formed, and the first channel layer 13 and the second channel layer 23 are disposed on the same layer. Then, a photoresist layer 102 is formed on the first channel layer 13. In this embodiment, the material of the first channel layer 13 is Indium Gallium Zinc Oxide (IGZO), and IGZO is used as the material of the first channel layer 13, so that the problem of excessive leakage current of the transistor caused by using conventional silicon oxide can be effectively reduced. Forming the photoresist layer 102 on the first channel layer 13 may improve the liquid erosion resistance of the IGZO thin film transistor and improve the stability of the device.
Referring to fig. 4d, after forming a photoresist layer 102 on the first channel layer 13, a source-drain metal layer 16 is formed on the second channel layer 23 and the first channel layer 13 with the photoresist layer.
Referring to fig. 4e, the source-drain metal layer 16 on the second channel layer 23 is etched to form a second source 24 and a second drain 25 of the photosensitive thin film transistor 20.
Referring to fig. 4f, after the photoresist layer 102 on the first channel layer 13 is stripped by a stripping process, the photoresist layer 102 is stripped off together with a portion of the metal of the source-drain metal layer 16, and the source-drain metal layer 16 on the first channel layer 13 forms the first source 14 and the first drain 15 of the switching thin film transistor 10, wherein the stripping (L ift-off) process is to glue and photo-etch the substrate first, and then prepare a metal film, where the photoresist is present, the metal film is formed on the photoresist, and where the photoresist is absent, the metal film is directly formed on the substrate.
Referring to fig. 4g, a first passivation layer 103 is formed on the substrate 110 having the first source electrode 14 and the first drain electrode 15 formed thereon and the second source electrode 24 and the second drain electrode 25 formed thereon, wherein the first passivation layer 103 covers the display pixel region SP1 and the photosensitive pixel region SP 2.
Referring to fig. 4h to 4j, an organic planarization layer 104 is formed on the substrate 110 with the first passivation layer 103, and the organic planarization layer 104 covers the display pixel region SP1 and the photosensitive pixel region SP 2. After the organic planarization layer 104 is etched, a first contact hole 106 is formed to expose a portion of the first passivation layer 103, and a common electrode 32 is formed over the first passivation layer 103. The common electrode 32 is formed only in the display pixel area SP 1.
Referring to fig. 4k, a second passivation layer 105 is formed over the substrate 110 with the common electrode 32 formed thereon, and the second passivation layer 105 contacts the first passivation layer 103 at the first contact hole 106. The second protective layer 105 covers the display pixel region SP1 and the photosensitive pixel region SP 2.
Referring to fig. 4l to fig. 4m, the second passivation layer 105 is etched to expose the first source 14, and a pixel electrode 31 is formed on the second passivation layer 105, wherein the pixel electrode 31 is in contact with the first source 14. Here, the pixel electrode 31 is formed only above the display pixel area SP 1.
According to the array substrate and the preparation method thereof provided by the invention, the switch thin film transistor 10 and the pixel electrode 31 which are electrically connected are formed in the display pixel area SP1 of the array substrate 100, the photosensitive thin film transistor 20 is formed in the photosensitive pixel area SP2 of the array substrate 100, meanwhile, the second data line and the second scanning line are added on the array substrate, and the touch induction of the photosensitive thin film transistor 20 is optimized through the second data line and the second scanning line; in addition, the switching thin film transistor 10 is an oxide thin film transistor, IGZO is used as a material of the first channel layer 13, the photosensitive thin film transistor 20 is a hydrogenated amorphous silicon thin film transistor, and a-Si is used as a material of the second channel layer 23; the present invention innovatively makes the process of the photosensitive thin film transistor 20 compatible with the process of the switching thin film transistor 10, so that the cost can be reduced while the remote sensing is realized.
[ second embodiment ]
Fig. 5 is a cross-sectional view of an array substrate according to a second embodiment of the invention. Each sub-pixel SP of the array substrate 100 includes a display pixel region SP1 and a photosensitive pixel region SP2, an electrically connected switching thin film transistor and pixel electrode 31 are disposed in the display pixel region SP1, a common electrode 32 is further included, the common electrode 32 and the pixel electrode 31 are insulated by a second protective layer 105, and a photosensitive thin film transistor is disposed in the photosensitive pixel region SP 2. The first gate 11 is located at the display pixel region SP1, and the second gate 21 is located at the light sensitive pixel region SP 2. A second source electrode 24 and a second drain electrode 25 of the photosensitive thin film transistor are formed over the second channel layer 23. A first source electrode 14 and a first drain electrode 15 of the switching thin film transistor are formed over the first channel layer 13.
The present embodiment differs from the first embodiment in that the distance between the first source electrode 14 and the first drain electrode 15 is smaller than the distance between the second source electrode 24 and the second drain electrode 25. Such a design may increase an exposed area of the second channel layer 23 of the photosensitive thin film transistor 20, so that the second channel layer 23 may sense light more easily, thereby enabling to improve the sensitivity of the photosensitive thin film transistor 20.
As used herein, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, including not only those elements listed, but also other elements not expressly listed.
In this document, the terms front, back, upper and lower are used to define the components in the drawings and the positions of the components relative to each other, and are used for clarity and convenience of the technical solution. It is to be understood that the use of the directional terms should not be taken to limit the scope of the claims.
The features of the embodiments and embodiments described herein above may be combined with each other without conflict.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. An array substrate (100), wherein the array substrate (100) comprises a plurality of sub-pixels (SP) arranged in an array, each sub-pixel (SP) comprises a display pixel region (SP1) and a photosensitive pixel region (SP2), a switching thin film transistor (10) and a pixel electrode (31) which are electrically connected are arranged in the display pixel region (SP1), and a photosensitive thin film transistor (20) is arranged in the photosensitive pixel region (SP 2).
2. The array substrate (100) of claim 1, wherein the array substrate (100) comprises a first data line (41) and a first scan line (51) electrically connected to the switching thin film transistor (10) and a second data line (42) and a second scan line (52) electrically connected to the photosensitive thin film transistor (20).
3. A touch-sensitive liquid crystal display device, comprising the array substrate (100) according to any one of claims 1 to 2.
4. The touch-sensitive liquid crystal display device according to claim 3, further comprising a color filter substrate (200) disposed opposite to the array substrate (100), wherein the color filter substrate (200) comprises a first color-resist region (201), a second color-resist region (202), and a third color-resist region (203), each color-resist region being disposed corresponding to a sub-pixel (SP) on the array substrate (100).
5. A method for preparing an array substrate comprises the following steps:
synchronously forming a switching thin film transistor (10) and a photosensitive thin film transistor (20) in a display pixel region (SP1) and a photosensitive pixel region (SP2) on a substrate (110) of an array substrate (100);
forming a pixel electrode (31) and a common electrode (32) which are insulated from each other on the switching thin film transistor (10), wherein the pixel electrode (31) is electrically connected with the switching thin film transistor (10);
wherein the step of forming the switching thin film transistor (10) and the light sensitive thin film transistor (20) in synchronization with the display pixel region (SP1) and the light sensitive pixel region (SP2) on the base (110) of the array substrate (100) comprises:
forming a first gate electrode (11) and a second gate electrode (21) in the display pixel region (SP1) and the photosensitive pixel region (SP2) of the substrate (110), respectively, and forming an insulating layer (12) on the substrate (110) where the first gate electrode (11) and the second gate electrode (21) are formed.
6. The method of fabricating the array substrate of claim 5, wherein the step after forming the insulating layer (12) on the base (110) where the first gate electrode (11) and the second gate electrode (21) are formed comprises:
after forming a second channel layer (23) on the second gate (21) on which the insulating layer (12) is formed, a first channel layer (13) is formed on the first gate (11) on which the insulating layer (12) is formed.
7. The method of fabricating the array substrate of claim 6, wherein the step after forming the first channel layer (13) on the first gate electrode (11) where the insulating layer (12) is formed further comprises: and forming a light resistance layer (102) on the first channel layer (13), and forming a source-drain metal layer (16) on the second channel layer (23) and the first channel layer (13) formed with the light resistance layer (102).
8. The method for manufacturing the array substrate according to claim 7, wherein the source-drain metal layer (16) above the second channel layer (23) is etched to form a second source electrode (24) and a second drain electrode (25) of the photosensitive thin film transistor (20).
9. The method for manufacturing the array substrate according to claim 7, wherein the source drain metal layer (16) above the first channel layer (13) forms a first source electrode (14) and a first drain electrode (15) of the switching thin film transistor (10) after the photoresist layer (102) above the first channel layer (13) is stripped through a stripping process; the distance between the first source (14) and the first drain (15) is smaller than or equal to the distance between the second source (24) and the second drain (25).
10. The method of fabricating an array substrate of claim 5, wherein the switching thin film transistor (10) is an oxide thin film transistor and the photosensitive thin film transistor (20) is a hydrogenated amorphous silicon thin film transistor.
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