CN111384905B - Phase modulator control method and device, offset circuit and feedforward power amplifier - Google Patents

Phase modulator control method and device, offset circuit and feedforward power amplifier Download PDF

Info

Publication number
CN111384905B
CN111384905B CN201811640252.5A CN201811640252A CN111384905B CN 111384905 B CN111384905 B CN 111384905B CN 201811640252 A CN201811640252 A CN 201811640252A CN 111384905 B CN111384905 B CN 111384905B
Authority
CN
China
Prior art keywords
cancellation
traversal
coefficient
phase modulator
offset
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201811640252.5A
Other languages
Chinese (zh)
Other versions
CN111384905A (en
Inventor
冯志成
俞启进
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hebi Tianhai Electronic Information System Co Ltd
Original Assignee
Hebi Tianhai Electronic Information System Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hebi Tianhai Electronic Information System Co Ltd filed Critical Hebi Tianhai Electronic Information System Co Ltd
Priority to CN201811640252.5A priority Critical patent/CN111384905B/en
Publication of CN111384905A publication Critical patent/CN111384905A/en
Application granted granted Critical
Publication of CN111384905B publication Critical patent/CN111384905B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Abstract

The application discloses a control method and device of a phase modulator, a cancellation circuit and a feedforward power amplifier. Wherein the method comprises the following steps: acquiring a current cancellation coefficient of a cancellation circuit; determining a traversal step length matched with the current offset coefficient; obtaining a plurality of groups of traversal control amounts which enable the counteracting coefficient of the counteracting circuit to change differently and enable the changing amount of the counteracting coefficient not to be larger than the traversal step length; the phase modulator is controlled by utilizing a plurality of groups of traversal control amounts to carry out amplitude modulation and/or phase modulation on the input signal so as to obtain a plurality of corresponding traversal offset coefficients; selecting a minimum traversal offset coefficient of a plurality of traversal offset coefficients, and controlling the phase modulator with a traversal control amount corresponding to the minimum traversal offset coefficient; repeating the steps until the current counteracting coefficient of the counteracting circuit is lower than the preset threshold value. According to the scheme, convergence of the cancellation coefficient of the cancellation circuit is achieved.

Description

Phase modulator control method and device, offset circuit and feedforward power amplifier
Technical Field
The present application relates to the field of phase adjustment, and in particular, to a method and apparatus for controlling a phase modulator, a cancellation circuit, and a feed forward power amplifier.
Background
Currently, in many circuits, a phase modulator is required to adjust the amplitude and phase of a signal, and the phase modulator is often required to be controlled to align the amplitude and phase of the signal. For example, in order to achieve linearization of the power amplifier, a feedforward circuit is used to cancel a distortion signal generated by the power amplifier, and the feedforward circuit specifically includes a phase modulator to divide an input signal into two paths, where one path of input signal is phase modulated by the phase modulator and then is subjected to distortion signal cancellation with the other path of input signal. In order to realize effective cancellation of the distortion signals, two paths of input circuits are required to accurately perform the same-amplitude inversion, namely, the alignment of amplitude and phase is required.
Disclosure of Invention
The application mainly solves the technical problem of providing a control method and a control device of a phase modulator, a cancellation circuit and a feedforward power amplifier, and can realize convergence of a cancellation coefficient of the cancellation circuit.
In order to solve the above problems, a first aspect of the present application provides a method for controlling a phase modulator, the method being applied to a cancellation circuit including the phase modulator, the cancellation circuit being configured to perform signal cancellation on an input signal or a cancellation signal after performing amplitude modulation and/or phase modulation on the input signal or the cancellation signal by the phase modulator, to obtain an output signal, the method comprising:
Acquiring a current cancellation coefficient of the cancellation circuit, wherein the current cancellation coefficient is a ratio between output signal power and input signal power of the cancellation circuit;
determining a traversal step length matched with the current offset coefficient;
obtaining a plurality of groups of traversal control amounts which enable the counteracting coefficient of the counteracting circuit to change differently and enable the changing amount of the counteracting coefficient not to be larger than the traversal step length;
the phase modulator is controlled to carry out amplitude modulation and/or phase modulation on the input signal by utilizing the multiple groups of traversal control amounts respectively so as to obtain a plurality of corresponding traversal offset coefficients;
selecting a minimum traversal offset coefficient of the plurality of traversal offset coefficients, and controlling the phase modulator with a traversal control quantity corresponding to the minimum traversal offset coefficient;
repeating the steps until the current counteracting coefficient of the counteracting circuit is lower than the preset threshold value.
In order to solve the above problem, a second aspect of the present application provides a control device for a phase modulator, including a processor and a memory, wherein the memory stores program data, and the processor is configured to execute the program instructions stored in the memory to perform the above method.
In order to solve the above problems, a third aspect of the present application provides a cancellation circuit, which includes a phase modulator, a combiner, and a processor, wherein an output terminal of the phase modulator is connected to one of input terminals of the combiner, and the processor is connected to a control terminal of the phase modulator;
the phase modulator is used for carrying out amplitude modulation and/or phase modulation on one path of signals of the combiner;
the combiner is used for carrying out signal cancellation on the two paths of signals;
the processor is configured to perform the method described above to control the phase modulator.
In order to solve the above-mentioned problems, a fourth aspect of the present application provides a feedforward power amplifying circuit including a carrier cancellation loop, a distortion cancellation loop, and a processor; the carrier cancellation loop includes a first phase modulator; the distortion cancellation loop includes a second phase modulator;
the processor is configured to perform the method described above to control the first and/or second phase modulators.
In the above scheme, the current cancellation coefficient of the cancellation circuit is used for determining the traversing step length, so that the conversion amount of the cancellation coefficient is not larger than the traversing control amount of the traversing step length, the phase modulator is controlled in sequence, so that the cancellation circuit obtains a plurality of traversing cancellation coefficients, the traversing control amount corresponding to the smallest traversing cancellation coefficient is selected to control the phase modulator, the phase modulator is controlled to perform amplitude modulation and/or phase modulation for a plurality of times in a traversing mode, the cancellation coefficient of the cancellation circuit is enabled to generate different changes, so that the smallest cancellation coefficient is obtained, the phase modulator is controlled by the control amount for generating the cancellation coefficient, at the moment, the cancellation coefficient of the cancellation circuit is reduced, the mode is repeated continuously, the cancellation coefficient in the cancellation circuit is reduced continuously, and finally, the target cancellation coefficient is finally reached, namely the optimal cancellation coefficient smaller than the preset threshold value, and convergence of the cancellation coefficient is realized.
Drawings
FIG. 1 is a schematic diagram of a feed forward power amplifier circuit according to an embodiment of the present application;
FIG. 2 is a flow chart of an embodiment of a method for controlling a phase modulator according to the present application;
FIG. 3 is a schematic diagram of a cancellation circuit in an application scenario of the present application;
FIG. 4 is a schematic diagram of signal cancellation in a cancellation circuit in an application scenario of the present application;
FIG. 5 is a schematic diagram of a cancellation curve of a cancellation circuit of a polar coordinate system in an application scenario of the present application;
FIG. 6 is a schematic diagram of a point of traversal of a cancellation circuit of a polar coordinate system in an application scenario of the present application;
FIG. 7 is a flowchart of step S230 in another embodiment of a method for controlling a phase modulator according to the present application;
FIG. 8 is a flow chart of a method of controlling a phase modulator according to another embodiment of the present application;
FIG. 9 is a schematic diagram of a convergence procedure in an application scenario employing the control method of the present application;
FIG. 10 is a schematic diagram of a feed-forward linearization test without employing the control method of the application;
FIG. 11 is a schematic diagram of a feed-forward linearization test using the control method of the application;
FIG. 12 is a schematic diagram of an embodiment of a control device for a phase modulator;
FIG. 13 is a schematic diagram of a memory device according to an embodiment of the present application;
FIG. 14 is a schematic diagram of an embodiment of a cancellation circuit of the present application
Fig. 15 is a schematic view of another embodiment of the control device of the phase modulator of the present application.
Detailed Description
The following describes embodiments of the present application in detail with reference to the drawings.
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, interfaces, techniques, etc., in order to provide a thorough understanding of the present application.
The terms "system" and "network" are often used interchangeably herein. The term "and/or" is herein merely an association relationship describing an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
The phase pair method of the application can be used in any cancellation circuit needing phase alignment, such as a cancellation circuit in a feedforward power amplification circuit, a zero intermediate frequency direct current calibration circuit, a Cartesian loop circuit and the like. In the following, a feed forward power amplifier is exemplified.
To facilitate an understanding of the present application, a feed forward power amplification circuit of the present application will be described.
Referring to fig. 1, fig. 1 is a schematic diagram of a feed-forward power amplifying circuit according to an embodiment of the application. In this embodiment, the feed forward power amplification circuit includes a carrier cancellation loop 110, a distortion cancellation loop 120, and a processor 130.
The carrier cancellation loop 110 includes, among other things, a phase modulator 111, a power amplifier (i.e., AMP) 112, and a combiner 113. The carrier cancellation loop 110 will input the signal S i Is divided into two paths, one of which is input with signal S i Amplitude modulation and/or phase modulation as input signal by phase modulator 111 and power amplification by power amplifier 112 to obtain power amplification mixed signal S' i And outputs to the combiner 113, another input signal S i As a carrier cancellation signal, is directly output to the combiner 113. Power amplifier mixed signal S i Except that it includes the original input signal S i In addition to (i.e., the carrier signal), also includes a distortion signal due to the power amplifier 112. Since the phase modulator 111 amplifies the mixed signal S' i Is adjusted to be in phase with the carrier cancellation signal S i To or approach the same amplitude inversion (i.e., amplitude and/or phase is closer to the same amplitude inversion than before adjustment), the combiner 113 outputs the input power amplifier mixed signal S' i And carrier cancellation signal S i Adding to cancel carrier signals in the same amplitude and opposite phase to output distortion signals S v 。
The distortion cancellation loop 120 includes a phase modulator 121, a power amplifier 122. Distorted signal S output by carrier cancellation loop 110 v Amplitude modulation and/or phase modulation as distortion cancellation signal by phase modulator 121 and power amplification by power amplifier 122 to obtain distortion cancellation signal S' v . The phase modulator 121 cancels the distortion cancellation signal S' v Is adjusted to be mixed with the power amplifier signal S' i To approach or approach the same amplitude and phase inversion, the power amplifier mixed signal S 'is amplified' i And a distortion cancellation signal S' v Adding to cancel the distortion signal in the same amplitude and opposite phase to output carrier signal S after power amplification o 。
The application adopts the feedforward power amplifying circuit to realize the power amplification, and the feedforward power amplifying circuit can be realized by adopting an analog device, is fast and stable, and can keep up with the change of the environment in real time. In addition, the processor can convert the digital signal into the analog signal by using the digital-to-analog converter and control the analog signal as the control quantity of the phase modulator, and can realize high precision and good linearization capacity by controlling the digital signal, for example, linearization with the bandwidth of 15MHz and 40dB can be realized.
It can be understood that the combiner is collectively referred to as any device capable of achieving signal cancellation. The carrier cancellation loop and the distortion cancellation loop in the feed forward power amplification circuit may be embodied as other existing carrier cancellation loop and distortion cancellation loop, and are not limited herein.
Further, since the amount of change in amplitude and/or phase of the signal in the circuit is implemented by a phase modulator. Therefore, in order to achieve the optimal cancellation effect of the cancellation circuit of the feedforward power amplifying circuit, the processor 130 of the present application controls the phase modulators 111 and 121 by an adaptive method (as shown in fig. 1, a control signal C is input to the phase modulator 111 1 To the phase modulator 121 is input control signal C 2 ) So that the signals after amplitude modulation and/or phase modulation by the phase modulators 111 and 121 can be inverted with the other signal in or approaching the same amplitude, and the optimal counteracting effect can be realized.
Specifically, processor 130 implements phase modulator control and thus amplitude phase alignment using the methods of the embodiments described below. Optionally, to implement the method of the embodiment described below, the feed forward power amplification circuit may further include a power detector for detecting the input signal power of the carrier cancellation loop (i.e., signal S i Power of (d) and output signal power (i.e. signal S) v Power of (a) and detecting the input signal power in the distorted carrier loop (i.e. signal S' i Power of (d) and output signal power (i.e. signal S) o And input the detected power to the processor).
The phase shifter adopted by the application has the control principle that: the phase modulator is controlled to carry out amplitude modulation and/or phase modulation for a plurality of times in a traversing way, so that the offset coefficient of the offset circuit generates different changes to obtain the smallest offset coefficient, the phase modulator is controlled by the control quantity for generating the offset coefficient, at the moment, the offset coefficient of the offset circuit is reduced, the way is repeated continuously, the offset coefficient in the offset circuit is reduced continuously, and finally, the target offset coefficient (namely, the optimal offset coefficient) is reached, so that convergence of the offset coefficient is realized.
The control method of the phase modulator will be further clarified by the following detailed description of the method embodiments.
Referring to fig. 2, fig. 2 is a flow chart illustrating an embodiment of a method for controlling a phase modulator according to the present application. In this embodiment, the method is applied to a cancellation circuit, where the cancellation circuit includes a phase modulator, and the cancellation circuit is configured to perform signal cancellation on an input signal or a cancellation signal after performing amplitude modulation and/or phase modulation on the input signal or the cancellation signal through the phase modulator, so as to obtain an output signal. That is, the cancellation circuit may be, but is not limited to, specifically a carrier cancellation loop and a distortion cancellation loop as shown in fig. 1.
In this embodiment, the method is performed by a control device of the phase modulator, specifically, a processor as shown in fig. 1, or a control device as shown in fig. 12. The method comprises the following steps:
s210: the current cancellation coefficient of the cancellation circuit is obtained.
To characterize the cancellation capability of the cancellation circuit, the cancellation coefficient of the cancellation circuit is defined as the ratio between the output signal power and the input signal power of the cancellation circuit, i.e. the current cancellation coefficient is the cancellation coefficient c=output signal power/input signal power.
In this embodiment, the current output signal power and the current input signal power of the cancellation circuit are obtained, and the ratio of the current output signal power and the current input signal power is used as the current cancellation coefficient. Taking the carrier cancellation loop of the feedforward power amplifying circuit shown in fig. 1 as an example, the received power detector detects the input signal power and the output signal power of the carrier cancellation loop, and takes the ratio between the output signal power and the input signal power as the current cancellation coefficient.
To better analyze the cancellation convergence process of the cancellation circuit, a model of the cancellation circuit may be created, as shown in FIG. 3, wherein the input signal and the cancellation signal before signal cancellation are represented as two vectors, i.e., the input signal is represented as The cancellation signal is denoted +.>Wherein t represents time, a represents a constant, A 1 And A 2 Respectively represent the amplitude of the signal, tau 1 And τ 2 Represents the time delay, phi of the signal 1 And phi 2 Representing the phase of the signal. So that the mathematical relationship of the cancellation is like the addition of two vectors, and the output vector power, namely the output signal S, can be obtained o (t) is shown in FIG. 4. The best cancellation is achieved when the input signal is in phase opposition to the cancellation signal. From the cancellation coefficient c=output signal power/input signal power, the following equation (1) can be obtained:
wherein let the input signal S i (t) and cancellation signal S d The degree of amplitude difference between (t) is expressed as ρ=a 2 /A 1 Let the input signal S i (t) and cancellation signal S d The degree of phase difference between (t) is expressed as θ=Φ 1 -φ 2 -180°。
Since the delay can be precisely compensated by the coaxial line or the filter, the analysis process can be considered as follows: τ 2 ＝τ 1 。
Therefore, according to the formula (1), the relationship between the cancellation coefficient C and the amplitude difference degree ρ and the phase difference degree θ is simplified to obtain the following formula (2):
[ρ cos(θ)-1] 2 +ρ 2 sin 2 (θ)＝C 2 (2)
that is, in a polar coordinate system in which polar coordinates are expressed as (ρ, θ), C and ρ, θ satisfy (1, 0) as a center, and C as a radius. Therefore, the offset curves of different offset coefficients C in the polar coordinate system are circles with different radii with (1, 0) as the center. For example, the cancellation curves for the cancellation coefficient c= 0.1,0.05,0.032,0.018,0.01 (i.e., the power cancellation is: -20dB, -25dB, -30dB, -35dB, -40 dB) are shown in fig. 5.
After obtaining the current cancellation coefficient C, only the current cancellation point (ρ 0 ，θ 0 ) In FIG. 5, C is a circle of radius, and the specific coordinates on the circle cannot be determined, where ρ 0 ，θ 0 Respectively representing the amplitude difference degree and the phase difference degree obtained after the current phase modulator is modulated.
Therefore, the phase modulator can be tested by selecting a plurality of traversal control amounts, and the phase modulator can be controlled by selecting one traversal control amount according to the value of the corresponding cancellation coefficient under different tests of the phase modulator, thereby gradually converging towards the target cancellation coefficient.
S220: a traversal step is determined that matches the current cancellation coefficient.
After the current offset coefficient is obtained, selecting a traversing step length matched with the current offset coefficient according to the size of the current offset coefficient. Wherein, the smaller the offset coefficient, the smaller the traversing step length of the matching. In an embodiment, a plurality of traversal steps respectively matched with different cancellation coefficients can be pre-stored, so that after the current cancellation coefficient is obtained, the traversal step matched with the current cancellation coefficient is found out from pre-stored information. Of course, in another embodiment, the traversal step of its match may be calculated on the fly from the current cancellation coefficient.
In particular, different traversal steps may be configured for different cancellation coefficient ranges. The S220 specifically includes: determining a preset counteracting coefficient range to which the current counteracting coefficient belongs, and acquiring a traversing step length matched with the preset counteracting coefficient range. For example, the preset cancellation coefficient range includes:
Greater than-20 dB (converted into a numerical value, namely, greater than 0.10);
-20dB to-25 dB (i.e. 0.10 to 0.05);
-25dB to-30 dB (i.e. 0.05 to 0.32);
-30dB to-35 dB (i.e. 0.32 to 0.018);
-35dB to-40 dB (i.e. 0.018 to 0.01);
-40dB to-50 dB (i.e. 0.01 to 0).
It will be appreciated that, in this embodiment, in order to achieve efficient and stable convergence, the difference between the minimum cancellation coefficients of adjacent preset cancellation coefficient ranges may be set to 5dB-10dB, that is, the preset cancellation coefficient range is 5dB-10dB (difference between upper and lower limits). For example, the minimum cancellation coefficients in the two ranges are-20 dB and-25 dB, respectively, differing by 5dB. However, in other embodiments, different cancellation coefficient ranges may be set according to practical situations, and the difference between the minimum cancellation coefficients of adjacent preset cancellation coefficient ranges is not limited to 5dB to 10dB, for example, in embodiments where the efficiency requirement is not high but the convergence effect is better, the difference may be set to be smaller, or in embodiments where the efficiency requirement is better but the convergence effect is not high, the difference may be set to be larger. Further, the preset cancellation coefficient range including the cancellation coefficient larger may be set wider than the preset cancellation coefficient range including the cancellation coefficient smaller. For example, the range of the cancellation coefficient from-40 dB to-50 dB where the cancellation coefficient is already near the optimal state is set to 10dB, while the other cancellation coefficient ranges are set to 5dB.
In some implementations, the larger the assigned traversal step for the preset cancellation coefficient range with a larger cancellation coefficient, e.g., the traversal step for the preset cancellation coefficient range of-20 dB to-25 dB is greater than the traversal step for the preset cancellation coefficient range of-25 dB to-30 dB.
Next, this embodiment exemplifies the implementation process of canceling convergence in conjunction with polar coordinates.
Specifically, please refer to fig. 6 in conjunction with explaining the cancellation convergence principle, in the polar coordinate system shown in fig. 5, after determining the current cancellation coefficient C of the cancellation circuit, the cancellation curve of the current cancellation coefficient C on the polar coordinate system may be determined, for example, the current cancellation coefficient C is 0.10, the current cancellation curve is a circle with a radius of 0.10, andoffset point (ρ) 0 ，θ 0 ) I.e. points on a circle of radius 0.10.
Continuing on the polar coordinate system with the current cancellation point (ρ 0 ，θ 0 ) Taking the traversing step r as a radius to make a circle as the center of the circle, taking n points on the circle as n traversing offset points, wherein the included angle between the radius of each point and the polar axis direction of the polar coordinate is a corresponding preset traversing angleN is an integer of 1 or more, in this embodiment, n is 4 or more, for example, n is 4, 8, 16, or the like. In the n traversal offset points, a point relatively close to the center of a circle and a point relatively far from the center of the circle are necessarily generated, the offset circuit is enabled to obtain n offset coefficients corresponding to the n traversal offset points respectively through controlling the phase modulator, and the point closest to the center of the circle in the n traversal offset points can be found through comparing the n offset coefficients. Therefore, convergence can be achieved by gradually approaching the cancellation coefficient of the cancellation circuit to the center of the circle.
To achieve this convergence, and from the current cancellation point to the traversal step that can be used to determine a match for each preset cancellation coefficient range, equation 3 below. At this time, the circle intersection of two traversal points and the offset curve where the smallest offset coefficient of the preset offset coefficient range is located is equivalent to ensure that at least two traversal points fall on the offset curve of the smallest offset coefficient of the preset offset coefficient range, and at this time, the offset curve of the largest offset coefficient of the adjacent preset offset coefficient range is also ensured.
Where r represents the traversal step. C (C) max Representing the maximum cancellation coefficient in the preset cancellation coefficient range, C min Representing the minimum cancellation coefficient in the preset cancellation coefficient range. Beta represents the difference between the largest adjacent preset traversal angles, i.e. at n preset traversal anglesAnd comparing the differences between each set of adjacent preset traversal angles to obtain a maximum difference.
In some embodiments, the traversal points may be taken on a circle in equal phase, i.e., the differences between each set of adjacent traversal angles are uniform. Taking n as 8 as an example, i.e., n preset traversal angles are {0,45 °,90 °,135 °,180 °,225 °,270 °,315 ° }, so β is the difference of 45 ° between any adjacent preset traversal angles. C for a preset cancellation coefficient range of-20 dB to-25 dB max 0.1, C min 0.05. The above equation 3 becomes:
by using the above formula, the preset cancellation coefficient range is-20 dB to-25 dB, and the traversing step length is as follows: 0.068 And r is more than or equal to 0.06.
Similarly, the following can be obtained:
the preset cancellation coefficient ranges from-25 dB to-30 dB, and the traversing step length is as follows: 0.032 R is more than or equal to 0.02;
the preset cancellation coefficient ranges from-30 dB to-35 dB, and the traversing step length is as follows: 0.022 R is more than or equal to 0.0083;
the preset cancellation coefficient ranges from-35 dB to-40 dB, and the traversing step length is as follows: 0.015 More than or equal to r more than or equal to 0.0025;
the preset cancellation coefficient ranges from-40 dB to-50 dB, and the traversing step length is as follows: 0.009 Not less than r not less than 0.001.
The number of the traversal steps corresponding to each preset cancellation coefficient range obtained by the formula 3 is multiple, at this time, one traversal step corresponding to the current cancellation coefficient can be selected at will, or a smaller traversal step in the plurality of traversal steps can be selected preferentially. For example, for a preset cancellation coefficient range of-20 dB to-25 dB, any value between 0.06 and 0.063 may be selected, or the minimum value of 0.06 may be taken directly.
It can be understood that the traversal step length can be obtained by calculating in real time by using the formula 3 after the current cancellation coefficient is obtained, or the traversal step length of each cancellation coefficient range is obtained by using the formula 3 in advance and is pre-stored, and after the current cancellation coefficient is obtained, the traversal step length matched with the preset cancellation coefficient range where the current cancellation coefficient is located is obtained from pre-stored information.
S230: and obtaining a plurality of groups of traversal control amounts which enable the counteracting coefficient of the counteracting circuit to change differently and enable the changing amount of the counteracting coefficient not to be larger than the traversal step length.
In this embodiment, in order to achieve convergence, that is, achieve gradual decrease of the cancellation coefficient of the cancellation circuit, and finally achieve the optimum, multiple changes of the cancellation coefficient of the cancellation circuit are required to occur, so as to select a control amount with the most decrease of the cancellation coefficient from the control amount to control the phase modulator, and the steps are repeated to gradually decrease the cancellation coefficient until the target state is reached.
Therefore, according to the relation between the change of the offset coefficient and the traversal control quantity, a plurality of groups of traversal control quantity can be obtained, so that the offset coefficient of the offset circuit is changed differently, the change quantity of the offset coefficient is not larger than the preset traversal step length, and the change quantity of the offset coefficient is the change quantity of the offset coefficient before and after the phase regulator is controlled by the traversal control quantity.
Further, the present embodiment continues to exemplify the process of obtaining the traversal control amount in conjunction with the polar coordinates. That is, a plurality of traversal offset points are determined by using the relation between the amplitude difference and the phase difference between the input signal of the offset circuit and the offset coefficient in the polar coordinate system as shown in fig. 6, and the corresponding traversal control amount is obtained. Wherein the polar diameter of the point on the polar coordinate system represents the amplitude difference degree rho between the input signal and the offset signal when the signals are offset, and the polar angle of the point on the polar coordinate system represents the phase difference degree theta between the input signal and the offset signal when the signals are offset. Specifically, referring to fig. 7 in combination, the present S230 includes the following sub-steps:
S231: information of a plurality of traversal offset points of the polar coordinate system is obtained.
Wherein the plurality of traversal offset points are a plurality of points on a circle with the current offset point as a center and the traversal step length as a radius, and the information of the plurality of traversal offset points comprises the radius of the circle and the information used for determining the plurality of traversal offset points respectivelyAnd traversing a plurality of preset traversal angles of the positions of the counteraction points on the circle. As described above, the information of n traversal point offset points is obtained, that is, r and n preset traversal angles obtained in S220 are obtainedAs shown in fig. 6, n is 8, and n preset traversal angles are {0,45 °,90 °,135 °,180 °,225 °,270 °,315 °.
S232: and obtaining a plurality of groups of traversal control amounts corresponding to the traversal offset points according to a preset relation between the information of the traversal offset points and the control amounts of the phase modulators.
Specifically, the preset relationship between the information of the traversal offset point and the control quantity of the phase modulator may be: and obtaining a first relation between the traversal offset point, the current offset point, the polar diameter and the polar angle and the traversal offset point information and a second relation between the amplitude difference degree rho and the phase difference degree theta and the control quantity of the phase modulator.
For example, with continued reference to FIG. 6, each traversal point (ρ, θ) is traversed with the current cancellation point (ρ 0 ，θ 0 ) The first relationship between the two is as follows equation 4:
meanwhile, the second relationship between the amplitude difference degree ρ and the phase difference degree θ of the phase modulator and the cancellation circuit can be analyzed as follows.
In this embodiment, the mathematical model of the phase modulator is shown in FIG. 7, i.e., the mathematical model of the phase modulator may be k (V I +j * V Q ). k is a parameter of the phase modulator, which is a parameter of the phase modulator itself. The control device outputs two first control voltages V to the phase modulator I And a second control voltage V Q To control the phase modulator's variation of the amplitude and/or phase of the input signal. The phase modulator may be an IQ modulator. In addition, the first control voltage V I And a second control voltage V Q Can be a direct current control voltage, andthe two control voltages can be generated by a digital-to-analog converter (DAC for short), namely the control device generates the control voltages by the digital-to-analog converter, so that digital amplitude loudness conversion is converted into analog direct-current voltage variation, and higher precision can be obtained. The higher the number of bits of the digital-to-analog converter, the higher the accuracy can be obtained. In some embodiments, a digital-to-analog converter may be employed as a 12-bit converter.
Thus, a second relationship between the magnitude difference degree ρ and the phase difference degree θ and the control amount of the phase modulator can be obtained as in the following equation 5:
the following equation 6 can be derived from the equation:
when the control voltage changes, the resulting amplitude and phase changes, i.e. from the current cancellation point of the cancellation circuit to the traversal cancellation point, the control amount of the phase modulator is required to satisfy the following equation 7:
wherein V is I1 To cancel the first control voltage of the phase shifter when the circuit is at the traversal canceling point, V I0 To cancel the first control voltage of the phase shifter when the circuit is at the current cancellation point, V Q1 To cancel the first control voltage of the phase shifter when the circuit is at the traversal canceling point, V Q0 To cancel the first control voltage of the phase shifter when the circuit is at the current cancellation point, deltaV I In order to change the offset circuit from the current offset point to the first control voltage change of the phase shifter when traversing the offset point, deltaV Q In order to change the cancellation circuit from the current cancellation point to the amount of change in the second control voltage to the phase modulator while traversing the cancellation point.
Thus, by combining the above equations 4, 6 and 7, the conversion amount (Δv) of the control signal corresponding to each of the traversal offset points can be obtained I ，ΔV Q ) Preset traversal angle corresponding to traversal step r and traversal offset point And a relational expression between the two. Thus, due to the traversal step r and the preset traversal angle ∈of each traversal offset point>Is obtained in step S231, so that the control amount (DeltaV) of the phase modulator corresponding to each traversal offset point can be obtained by using the relation I ，ΔV Q ) As a set of traversal control quantities.
In an application scenario, taking a preset cancellation coefficient range of-20 dB to-25 dB as an example:
the parameters k=0.316 v, n is 8, the preset cancellation coefficient range corresponds to a traversal radius r=0.062,according to the control quantity (DeltaV) corresponding to each traversal offset point I ，ΔV Q ) And the traversing step length r and the preset traversing angle +.>The relation between the 8 traversal offset points is calculated, and the corresponding traversal control quantity is as follows:
(ΔV I ,ΔV Q )＝(+0.196,+0)，(+0.138,+0.138)，(+0,+0.196)，(-0.138,+0.138)，(-0.196,+0)，(-0.138,-0.138)，(+0,-0.196)，(+0.138,-0.138)；
if the control quantity is generated by a 12-bit digital-to-analog converter, a 4-bit 16-system control word of the digital-to-analog converter can be obtained as follows:
(ΔD I ，ΔD Q )＝(+0280,+0000),(+01c0,+01c0),(+0000,+0280),(-01c0,+01c0),(-0280,+0000),(-01c0,-01c0),(+0000,-0280),(+01c0,-01c0)。
wherein the method comprises the steps of，ΔD I Is DeltaV I Is a digital signal, Δd Q Is DeltaV Q Is a digital signal of (a).
S240: and respectively utilizing the plurality of groups of traversal control quantity to control the phase modulator to carry out amplitude modulation and/or phase modulation on the input signal so as to obtain a plurality of corresponding traversal offset coefficients.
Obtaining a plurality of groups of traversal control amounts (DeltaD) via S230 I ，ΔD Q ) And then, respectively inputting the multiple groups of traversal control quantities into the phase modulator to control the phase modulator to adjust the amplitude and/or the phase of the input signal, wherein the cancellation circuit generates a corresponding traversal cancellation coefficient corresponding to each group of traversal control quantities, and the traversal cancellation coefficient is the ratio between the output signal power and the input signal power after amplitude modulation and/or phase modulation by the phase modulator controlled by the traversal control quantities. For example, in the above-described embodiment where n is 8, 8 traversal offset coefficients are obtained, and the 8 traversal offset coefficients correspond to the 8 traversal offset points shown in fig. 6.
S250: a minimum traversal cancellation coefficient of a plurality of traversal cancellation coefficients is selected, and the phase modulator is controlled with a traversal control quantity corresponding to the minimum traversal cancellation coefficient.
Continuing with the example of n=8, after obtaining 8 traversal offset coefficients with S240, the smallest traversal offset coefficient is selected from among them, e.g., the 3 rd traversal offset coefficient. And selecting the 3 rd traversal control quantity of the traversal control quantity corresponding to the minimum traversal offset coefficient again, and continuously controlling the phase modulator to modulate and/or modulate the amplitude by using the traversal control quantity. At this time, the current cancellation coefficient of the cancellation circuit becomes the minimum traversal cancellation coefficient.
The above steps S210 to S250 are repeated until the current cancellation coefficient of the cancellation circuit is below the preset threshold. That is, the above step S210 is repeated, and whether the current cancellation coefficient of the cancellation circuit is lower than a preset threshold value is compared; if the current value is lower than the preset value, the convergence coefficient of the counteracting circuit reaches the preset optimization, so that convergence is realized, and the flow is ended; if not, continuing to execute S220 to S250, and continuing to circulate the steps until the current cancellation coefficient of the cancellation circuit is lower than a preset threshold. The preset threshold may be preset by a user, or the control device may be determined according to experience or user requirements, and in an embodiment, the preset threshold is 0.001.
For a clearer understanding of the present application, one example of a scenario is set forth below in conjunction with FIG. 8:
in the application scene, a plurality of counteracting coefficient ranges are preset, and the method comprises the following steps:
s801: and judging whether the current cancellation coefficient C is smaller than-20 dB. If not, S802-S803 are executed, and if yes, S804 is executed.
S802: the traversal step r is determined to be 0.06, and the phase modulator is controlled using the 8 traversal control amounts.
Wherein the 8 traversal control amounts are phase modulator control amounts corresponding to 8 traversal offset points obtained by using the above formulas 4, 6 and 7, the 8 traversal offset points are 8 traversal offset points on a circle with the current offset point as a center and the traversal step r as a radius in a polar coordinate system, and
s803: from 8 cancellation coefficients corresponding to 8 traversal control amounts, the traversal control amount corresponding to the smallest cancellation coefficient is selected to control the phase modulator. And re-executes S801.
At this time, the current cancellation coefficient of the cancellation circuit is the minimum cancellation coefficient.
S804: it is determined whether the current cancellation coefficient C is less than-25 dB. If not, S805 to S806 are performed, and if yes, S807 is performed.
S805: the traversal step r is determined to be 0.032, and the phase modulator is controlled using the 8 traversal control amounts.
The 8 traversal control amounts are the same as those in S802, and are not described here.
S806: from 8 cancellation coefficients corresponding to 8 traversal control amounts, the traversal control amount corresponding to the smallest cancellation coefficient is selected to control the phase modulator. And re-executes S804.
At this time, the current cancellation coefficient of the cancellation circuit is the minimum cancellation coefficient.
S807: and judging whether the current cancellation coefficient C is smaller than-30 dB. If not, S808-S809 are performed, and if so, S810 is performed.
S808: the traversal step r is determined to be 0.017, and the phase modulator is controlled using the 8 traversal control amounts.
The 8 traversal control amounts are the same as those in S802, and are not described here.
S809: from 8 cancellation coefficients corresponding to 8 traversal control amounts, the traversal control amount corresponding to the smallest cancellation coefficient is selected to control the phase modulator. And re-performs S807.
S810: and judging whether the current cancellation coefficient C is smaller than-35 dB. If not, S811-S812 are performed, and if yes, S813 is performed.
S811: the traversal step r is determined to be 0.012 and the phase modulator is controlled using the 8 traversal control amounts.
The 8 traversal control amounts are the same as those in S802, and are not described here.
S812: from 8 cancellation coefficients corresponding to 8 traversal control amounts, the traversal control amount corresponding to the smallest cancellation coefficient is selected to control the phase modulator. And re-executes S810.
S813: it is determined whether the current cancellation coefficient C is less than-40 dB. If not, S814-S815 is performed, and if so, S816 is performed.
S814: the traversal step r is determined to be 0.004, and the phase modulator is controlled by using the 8 traversal control amounts.
The 8 traversal control amounts are the same as those in S802, and are not described here.
S815: from 8 cancellation coefficients corresponding to 8 traversal control amounts, the traversal control amount corresponding to the smallest cancellation coefficient is selected to control the phase modulator. And re-executes S813.
S816: it is determined whether the current cancellation coefficient C is less than-50 dB. If not, execution proceeds to S817-S818, and if so, execution proceeds to S819.
S817: the traversal step r is determined to be 0.001, and the phase modulator is controlled using the 8 traversal control amounts.
The 8 traversal control amounts are the same as those in S802, and are not described here.
S818: from 8 cancellation coefficients corresponding to 8 traversal control amounts, the traversal control amount corresponding to the smallest cancellation coefficient is selected to control the phase modulator. And re-executes S816.
S819: and delaying for a preset time.
After the preset time is reached, S801 is repeatedly executed to monitor the modulation of the phase modulator in real time, so as to realize long-term adaptive control and ensure long-term stable optimization of the cancellation coefficient of the cancellation circuit.
The preset time may be, but is not limited to, 1ms, or 5ms, or 10ms.
The method of the present application will be described below with further reference to another application scenario.
In this embodiment, initially, the digital control amount (D I ，D Q ) For (3 a90,3 d 0), the cancellation coefficient is-20 dB. The state of the phase modulator was then controlled four times using the control method of the above example, the numerical control amounts of which each time the phase modulator was controlled and the cancellation coefficients thereof are shown in table 1 below.
TABLE 1
Correspondingly, through the four above-mentioned controls of the phase modulator, the convergence process is realized as shown by the dashed arrow in fig. 9. In the application scene, the points close to the center of the circle and the points far away from the center of the circle are necessarily generated by taking the points at equal phase intervals, and the point closest to the center of the circle can be judged by acquiring the traversal offset coefficient, so that convergence is carried out along the fastest descending direction, the center of the circle is successively approximated, and the convergence process is shorter.
Taking a singlechip experiment as an example in the whole convergence process, the clock period of the singlechip is about 10us, the time used in the whole convergence process is 4.16ms, about 416 clock periods are needed, and the time used in the whole convergence process is very short.
In yet another embodiment, in the feedforward power amplifying circuit shown in fig. 1, if the control method is not adopted, the feedforward linearization test is performed on the circuit, and the output frequency spectrum is shown in fig. 10. If the control method is adopted, the feedforward linearization test of the circuit is performed, and the output frequency spectrum is shown in fig. 11. Therefore, the 15MHz bandwidth and the nonlinear cancellation of more than 40dB can be realized; wherein intermodulation distortion (IMD) is-73.8 dBc.
Referring to fig. 12, fig. 12 is a schematic diagram of a phase modulator control device according to an embodiment of the application. In this embodiment, the control device 1200 is applied to a cancellation circuit (such as the cancellation circuit shown in fig. 1) including a phase modulator, where the cancellation circuit is configured to perform amplitude modulation and/or phase modulation on an input signal or a cancellation signal through the phase modulator, and perform signal cancellation on the input signal and the cancellation signal, so as to obtain an output signal. The control device 1200 includes a memory 1201 and a processor 1202. The components of the control device 1200 may be coupled together by a bus, or the processor of the control device 1200 may be connected to other components one by one, respectively.
The memory 1201 is used for storing program instructions executed by the processor 1202 and data during processing by the processor 1202, wherein the memory 1201 comprises a non-volatile storage section for storing the program instructions. In another embodiment, the memory 1201 may serve only as a memory of the processor 1202 to cache the program instructions executed by the processor 1202, where the program instructions are actually stored in a device external to the terminal, and the processor 1202 may execute the corresponding process by calling the externally stored program instructions by connecting to the external device.
The processor 1202 controls the operation of the control device 1200, and the processor 1202 may also be referred to as a CPU (Central Processing Unit ). The processor 1202 may be an integrated circuit chip with signal processing capabilities. The processor 1202 may also be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The processor 1202 may be integrated with an application processor and a baseband processor, or simply an application processor.
In this embodiment, the processor 1202 is configured to call the program instructions stored in the memory 1201 to: acquiring a current cancellation coefficient of a cancellation circuit, wherein the current cancellation coefficient is a ratio between output signal power and input signal power of the cancellation circuit; determining a traversal step length matched with the current offset coefficient; obtaining a plurality of groups of traversal control amounts which enable the counteracting coefficient of the counteracting circuit to change differently and enable the changing amount of the counteracting coefficient not to be larger than the traversal step length; the phase modulator is controlled to carry out amplitude modulation and/or phase modulation on the input signal by utilizing the multiple groups of traversal control amounts respectively so as to obtain a plurality of corresponding traversal offset coefficients; selecting a minimum traversal offset coefficient of the plurality of traversal offset coefficients, and controlling the phase modulator with a traversal control quantity corresponding to the minimum traversal offset coefficient; repeating the steps until the current counteracting coefficient of the counteracting circuit is lower than the preset threshold value.
In some embodiments, the processor 1202 performs the obtaining a plurality of sets of traversal control amounts that cause different changes in the cancellation coefficients of the cancellation circuit and the amount of change in the cancellation coefficients is not greater than the preset traversal step, including: acquiring information of a plurality of traversal offset points of a polar coordinate system, wherein the plurality of traversal offset points are a plurality of points on a circle with a current offset point as a circle center and the traversal step length as a radius, and the information of the plurality of traversal offset points comprises the radius of the circle and a plurality of preset traversal angles respectively used for determining the positions of the plurality of traversal offset points on the circle; obtaining a plurality of groups of traversal control amounts corresponding to the traversal offset points according to a preset relation between the information of the traversal offset points and the control amounts of the phase modulators; wherein the polar diameter of the point on the polar coordinate system represents the amplitude difference degree rho between the input signal and the offset signal when the signals are offset, and the polar angle of the point on the polar coordinate system represents the phase difference degree theta between the input signal and the offset signal when the signals are offset.
Further, the number of the traversal offset points may be greater than or equal to 4, and the angle difference between two adjacent preset traversal angles may be the same.
In some embodiments, the preset relationship between the information of the traversal offset point and the control quantity of the phase modulator is defined by: and obtaining a first relation between the traversal offset point, the current offset point, the polar diameter and the polar angle and the traversal offset point information and a second relation between the amplitude difference degree rho and the phase difference degree theta and the control quantity of the phase modulator.
Specifically, the control amount of the phase modulator comprises a first control voltage V I Variation of (2) and the second control voltage V Q Is a variable amount of (a); the first relationship may include equation 4 above; the second relationship may include equation 5 above.
In some embodiments, the processor 1202 performs the determining the traversal step that matches the current cancellation coefficient, including: determining a preset counteracting coefficient range to which the current counteracting coefficient belongs, and acquiring a traversing step length matched with the preset counteracting coefficient range.
In some embodiments, the processor 1202 performs the obtaining the traversal step that matches the preset cancellation coefficient range, including: obtaining a traversing step length matched with the preset counteracting coefficient range according to the formula 3; or obtaining the traversal step length matched with the preset counteracting coefficient range from the pre-stored information, wherein the pre-stored traversal step length is calculated and stored in advance by using the formula 3.
In some embodiments, when there are a plurality of traversal steps matching the preset cancellation coefficient range, the processor 1202 selects a traversal step of the plurality of traversal steps with a smaller step value.
In some embodiments, the difference between the smallest cancellation coefficients of adjacent said preset cancellation coefficient ranges is 5dB-10dB. Moreover, the preset cancellation coefficient range including the cancellation coefficient larger may be wider than the preset cancellation coefficient range including the cancellation coefficient smaller.
In another embodiment, the processor 1202 of the control apparatus 1200 is further configured to perform the method of any of the embodiments described above.
In yet another embodiment, the processor 1202 of the control apparatus 1200 may be the processor described in FIG. 1.
Referring to fig. 13, the present application further provides a schematic structure of an embodiment of a memory device. In this embodiment, the storage device 1300 stores a program instruction 1301 executable by a processor, where the program instruction 1301 is used to execute the method in the above embodiment.
The storage 1301 may be a medium such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, where program instructions may be stored, or may be a server storing the program instructions, where the server may send the stored program instructions to another device for execution, or may also self-execute the stored program instructions.
In an embodiment, the storage device 1300 may also be a memory 1201 as shown in fig. 12.
Referring to fig. 14, fig. 14 is a schematic diagram of a cancellation circuit according to an embodiment of the application. In this embodiment, the cancellation circuit includes a phase modulator 1401, a combiner 1402 and a processor 1403, wherein an output terminal of the phase modulator 1401 is connected to one of input terminals of the combiner 1402, and the processor 1403 is connected to a control terminal of the phase modulator 1401.
The phase modulator 1401 is used for amplitude modulation and/or phase modulation of one of the signals of the combiner 1402.
The combiner 1402 is configured to perform signal cancellation on the two signals.
Processor 1403 is configured to perform the methods of any of the embodiments described above to control the phase modulator. The processor 1403 may be specifically any of the above processors or control devices.
In some embodiments, the cancellation circuit may be specifically a carrier cancellation circuit or a distortion cancellation circuit as described in fig. 1. Alternatively, the cancellation circuit is a phase alignment circuit for direct current calibration in a zero intermediate frequency scheme, or the cancellation circuit is a phase alignment circuit in a cartesian loop.
Referring to fig. 15, fig. 15 is a schematic structural diagram of a control device of a phase modulator according to another embodiment of the present application. In this embodiment, the control device is applied to a cancellation circuit of the phase modulator, where the cancellation circuit is configured to perform signal cancellation on the input signal and the cancellation signal after performing amplitude modulation and/or phase modulation on the input signal or the cancellation signal by the phase modulator, so as to obtain an output signal. The cancellation circuit is specifically any one of the above-described cancellation circuits.
The control device includes an acquisition module 1510, a determination module 1520, an acquisition module 1530, a control module 1540, and a selection module 1550.
The obtaining module 1510 is configured to obtain a current cancellation coefficient of the cancellation circuit, where the current cancellation coefficient is a ratio between an output signal power and an input signal power of the cancellation circuit;
a determining module 1520 is configured to determine a traversal step size that matches the current cancellation coefficient;
the obtaining module 1530 is configured to obtain a plurality of sets of traversal control amounts that make the cancellation coefficient of the cancellation circuit change differently, where the amount of change of the cancellation coefficient is not greater than the traversal step;
the control module 1540 is configured to control the phase modulator to perform amplitude modulation and/or phase modulation on the input signal by using the multiple sets of traversal control amounts, so as to obtain multiple corresponding traversal cancellation coefficients;
the selecting module 1550 is configured to select a smallest traversal offset coefficient of the plurality of traversal offset coefficients, and control the phase modulator with a traversal control quantity corresponding to the smallest traversal offset coefficient;
the acquisition module 1510, the determination module 1520, the acquisition module 1530, the control module 1540, and the selection module 1550 repeat the above functions again until the current cancellation coefficient of the cancellation circuit is below a preset threshold.
In some embodiments, the obtaining module 1530 includes:
the obtaining unit 1531 obtains information of a plurality of traversal offset points of the polar coordinate system, where the plurality of traversal offset points are a plurality of points on a circle with a current offset point as a center and the traversal step length as a radius, and the information of the plurality of traversal offset points includes the radius of the circle and a plurality of preset traversal angles for determining positions of the plurality of traversal offset points on the circle respectively;
the obtaining unit 1532 is configured to obtain a plurality of sets of traversal control amounts corresponding to the plurality of traversal offset points according to a preset relationship between the information of the traversal offset points and the control amounts of the phase modulator;
wherein the polar diameter of the point on the polar coordinate system represents the amplitude difference degree rho between the input signal and the offset signal when the signals are offset, and the polar angle of the point on the polar coordinate system represents the phase difference degree theta between the input signal and the offset signal when the signals are offset.
In some embodiments, the number of the traversal offset points is greater than or equal to 4, and the angle difference between two adjacent preset traversal angles is the same.
In some embodiments, the preset relationship between the information of the traversal offset point and the control quantity of the phase modulator is defined by: and obtaining a first relation between the traversal offset point, the current offset point, the polar diameter and the polar angle and the traversal offset point information and a second relation between the amplitude difference degree rho and the phase difference degree theta and the control quantity of the phase modulator.
In some embodiments, the control amount of the phase modulator includes a first control voltage V I Variation of (2) and the second control voltage V Q Is a variable amount of (a); the first relationship may include equation 4 above; the second relationship may include equation 5 above.
In certain embodiments, the determining module 1520 is specifically configured to: determining a preset counteracting coefficient range to which the current counteracting coefficient belongs, and acquiring a traversing step length matched with the preset counteracting coefficient range.
In certain embodiments, the determining module 1520 is specifically configured to: obtaining a traversing step length matched with the preset counteracting coefficient range according to the formula 3; or obtaining the traversal step length matched with the preset counteracting coefficient range from the pre-stored information, wherein the pre-stored traversal step length is calculated and stored in advance by using the formula 3.
In some embodiments, when there are a plurality of traversal steps matching the preset cancellation coefficient range, a traversal step with a small step value among the plurality of traversal steps is selected.
In some embodiments, the difference between the smallest cancellation coefficients adjacent to the preset cancellation coefficient range is 5dB-10dB; the preset counteracting coefficient range with larger counteracting coefficient is wider than the preset counteracting coefficient range with smaller counteracting coefficient.
According to the scheme, the current offset coefficient of the offset circuit is utilized to determine the traversing step length, so that a plurality of groups of traversing control quantities with the conversion quantity of the offset coefficient not larger than the traversing step length are selected, the phase modulator is controlled in sequence, the offset circuit obtains a plurality of traversing offset coefficients corresponding to the traversing control quantities, the phase modulator is controlled by selecting the traversing control quantity corresponding to the smallest traversing offset coefficient, amplitude modulation and/or phase modulation are controlled for a plurality of times in a traversing mode, the offset coefficient of the offset circuit is enabled to generate different changes, the smallest offset coefficient is obtained, the phase modulator is controlled by utilizing the control quantity for generating the offset coefficient, at the moment, the offset coefficient of the offset circuit is reduced, the mode is repeated continuously, the offset coefficient in the offset circuit is reduced continuously, and finally, the target offset coefficient is finally achieved, namely the optimal offset coefficient smaller than a preset threshold value, and convergence of the offset coefficient is achieved.
Furthermore, the traversing offset point is a constant-phase point on a circle with the current offset point as a circle center and the traversing step length as a radius, so that the points which are close to the circle center relative to the current offset point are necessarily existed in a plurality of traversing offset system points obtained by each control, the constant convergence of the offset coefficient can be ensured through each control, a definite convergence path is provided, the rapid, efficient and stable convergence is realized, and the method can carry out corresponding self-adaptive control directly according to the actual offset coefficient of the offset circuit, and can rapidly carry out corresponding convergence along with the change of the external environment.
In addition, in the control method, only the size comparison and the addition and subtraction are performed, so that the occupied resources are small and the speed is high.
In the several embodiments provided in the present application, it should be understood that the disclosed method and apparatus may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of modules or units is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to execute all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

Claims (12)

1. A method for controlling a phase modulator, the method being applied to a cancellation circuit including a phase modulator, the cancellation circuit being configured to perform signal cancellation on an input signal or a cancellation signal through the phase modulator after performing amplitude modulation and/or phase modulation on the input signal and the cancellation signal, to obtain an output signal, the method comprising:
acquiring a current cancellation coefficient of the cancellation circuit, wherein the current cancellation coefficient is a ratio between output signal power and input signal power of the cancellation circuit;
determining a preset counteracting coefficient range to which the current counteracting coefficient belongs, and acquiring a traversing step length matched with the preset counteracting coefficient range;
acquiring information of a plurality of traversal offset points of a polar coordinate system, wherein the plurality of traversal offset points are a plurality of points on a circle with a current offset point as a circle center and the traversal step length as a radius, and the information of the plurality of traversal offset points comprises the radius of the circle and a plurality of preset traversal angles respectively used for determining the positions of the plurality of traversal offset points on the circle;
obtaining a plurality of groups of traversal control amounts corresponding to the traversal offset points according to a preset relation between the information of the traversal offset points and the control amounts of the phase modulators;
The phase modulator is controlled to carry out amplitude modulation and/or phase modulation on the input signal by utilizing the multiple groups of traversal control amounts respectively so as to obtain a plurality of corresponding traversal offset coefficients;
selecting a minimum traversal offset coefficient of the plurality of traversal offset coefficients, and controlling the phase modulator with a traversal control quantity corresponding to the minimum traversal offset coefficient;
repeating the steps until the current counteracting coefficient of the counteracting circuit is lower than the preset threshold value.
2. The method of claim 1, wherein a polar diameter of a point on the polar coordinate system represents a degree of amplitude difference ρ between the input signal and a cancellation signal at signal cancellation, and wherein a polar angle of a point on the polar coordinate system represents a degree of phase difference θ between the input signal and a cancellation signal at signal cancellation.
3. The method according to claim 2, wherein the number of the traversal offset points is greater than or equal to 4, and the angle difference between two adjacent preset traversal angles is the same.
4. The method of claim 2, wherein the predetermined relationship between the information of the traversal offset point and the control quantity of the phase modulator is defined by: and obtaining a first relation between the traversal offset point, the current offset point, the polar diameter and the polar angle and the traversal offset point information and a second relation between the amplitude difference degree rho and the phase difference degree theta and the control quantity of the phase modulator.
5. The method of claim 4, wherein the control amount of the phase modulator comprises a first control voltage V I Variation of (2) and the second control voltage V Q Is a variable amount of (a);
the first relationship includes
The second relationship includes
Wherein k is a parameter of the phase modulator, and the polar coordinate of the current cancellation point is (ρ 0 ，θ 0 ) The polar coordinates of the traversal offset point are (ρ, θ), r represents the traversal step,representing a preset traversal angle.
6. The method of claim 1, wherein the obtaining the traversal step that matches the predetermined cancellation coefficient range comprises:
obtaining a traversing step length matched with the preset counteracting coefficient range according to the following formula (1):
wherein r represents the step size of traversal, beta represents the difference between the largest adjacent preset traversal angles, C max Representing the maximum cancellation coefficient in the preset cancellation coefficient range, C min Representing the minimum counteracting coefficient in the preset counteracting coefficient range; or alternatively, the process may be performed,
and obtaining a traversing step length matched with the preset counteracting coefficient range from pre-stored information, wherein the pre-stored traversing step length is calculated and stored in advance by utilizing the formula (1).
7. The method of claim 6, wherein when there are a plurality of traversal steps matching the predetermined cancellation coefficient range, a traversal step of the plurality of traversal steps with a smaller step value is selected.
8. The method of claim 1, wherein a difference between minimum cancellation coefficients adjacent to the predetermined cancellation coefficient range is 5dB to 10dB;
the preset counteracting coefficient range with larger counteracting coefficient is wider than the preset counteracting coefficient range with smaller counteracting coefficient.
9. A control device for a phase modulator, comprising a processor and a memory, wherein the memory stores program data, and wherein the processor is configured to execute the program instructions stored in the memory to perform the method of any one of claims 1 to 8.
10. The cancellation circuit is characterized by comprising a phase modulator, a combiner and a processor, wherein the output end of the phase modulator is connected with one of the input ends of the combiner, and the processor is connected with the control end of the phase modulator;
the phase modulator is used for carrying out amplitude modulation and/or phase modulation on one path of signals of the combiner;
the combiner is used for carrying out signal cancellation on the two paths of signals;
the processor is configured to perform the method of any one of claims 1 to 8 to control the phase modulator.
11. A feed forward power amplifying circuit, comprising a carrier cancellation loop, a distortion cancellation loop and a processor; the carrier cancellation loop includes a first phase modulator; the distortion cancellation loop includes a second phase modulator;
The processor is configured to perform the method of any one of claims 1 to 8 to control the first and/or second phase modulators.
12. The feed forward power amplification circuit of claim 11, wherein,
the carrier cancellation loop further comprises a first power amplifier and a combiner; the carrier cancellation loop divides an input signal into two paths, wherein one path of input signal is subjected to amplitude modulation and/or phase modulation through a first phase modulator, and is subjected to power amplification through a first power amplifier and then is input into the combiner as a power amplification mixed signal; the combiner performs signal cancellation on the power amplifier mixed signal and the other input signal and outputs a distortion signal;
the distortion cancellation loop further comprises a second power amplifier; and the distortion cancellation loop performs amplitude modulation and/or phase modulation on the distortion signal through a second phase modulator, performs power amplification on the distortion signal through a second power amplifier, performs signal cancellation on the distortion signal and the power amplification mixed signal, and outputs a carrier signal.
CN201811640252.5A 2018-12-29 2018-12-29 Phase modulator control method and device, offset circuit and feedforward power amplifier Active CN111384905B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811640252.5A CN111384905B (en) 2018-12-29 2018-12-29 Phase modulator control method and device, offset circuit and feedforward power amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811640252.5A CN111384905B (en) 2018-12-29 2018-12-29 Phase modulator control method and device, offset circuit and feedforward power amplifier

Publications (2)

Publication Number Publication Date
CN111384905A CN111384905A (en) 2020-07-07
CN111384905B true CN111384905B (en) 2023-08-22

Family

ID=71218153

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811640252.5A Active CN111384905B (en) 2018-12-29 2018-12-29 Phase modulator control method and device, offset circuit and feedforward power amplifier

Country Status (1)

Country Link
CN (1) CN111384905B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1340934A (en) * 2000-09-02 2002-03-20 华为技术有限公司 Broadband data access circuit and its self-adaptive regulation method of channel
CN1507188A (en) * 2002-12-10 2004-06-23 深圳市中兴通讯股份有限公司 Adaptive carrier inhibiting method for multiple-carrier linear power amplifier
CN102915454A (en) * 2012-10-23 2013-02-06 深圳市华士精成科技有限公司 Counteracting method and counteracting circuit for carrier wave of ultrahigh-frequency radio frequency identification device (RFID) reader-writer
DE102013017985A1 (en) * 2012-12-20 2014-06-26 Nvidia Corporation Search algorithm for equalization coefficients

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004062091A1 (en) * 2002-12-18 2004-07-22 Powerwave Technologies, Inc. Feed forward amplifier system using penalties and floors for optimal control
US7157967B2 (en) * 2004-03-11 2007-01-02 Powerwave Technologies Inc. System and method for control of loop alignment in adaptive feed forward amplifiers

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1340934A (en) * 2000-09-02 2002-03-20 华为技术有限公司 Broadband data access circuit and its self-adaptive regulation method of channel
CN1507188A (en) * 2002-12-10 2004-06-23 深圳市中兴通讯股份有限公司 Adaptive carrier inhibiting method for multiple-carrier linear power amplifier
CN102915454A (en) * 2012-10-23 2013-02-06 深圳市华士精成科技有限公司 Counteracting method and counteracting circuit for carrier wave of ultrahigh-frequency radio frequency identification device (RFID) reader-writer
DE102013017985A1 (en) * 2012-12-20 2014-06-26 Nvidia Corporation Search algorithm for equalization coefficients

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
丁和平,余崇智.自适应格形联合滤波噪声抵消器及优化步长.声学学报(中文版).1988,(第01期),全文. *

Also Published As

Publication number Publication date
CN111384905A (en) 2020-07-07

Similar Documents

Publication Publication Date Title
US10141896B2 (en) Curve fitting circuit, analog predistorter, and radio frequency signal transmitter
US8374282B2 (en) Method and apparatus for improving digital predistortion correction with amplifier device biasing
US9876514B1 (en) Calibration of active electronically steered antennas using on-chip programming
US10374838B2 (en) Image distortion correction in a wireless terminal
CN107196617B (en) Intelligent power amplitude stabilizing loop based on dynamic self-adaptive algorithm and amplitude stabilizing method
US9112649B2 (en) Method and apparatus for predicting signal characteristics for a nonlinear power amplifier
JP5149963B2 (en) Amplifier stabilization method and system
US20120178389A1 (en) Systems, methods and devices for dual closed loop modulation controller for nonlinear rf amplifier
GB2427772A (en) Control of gain and bias current of a transmitter to improve linearity and efficiency
US20160248609A1 (en) Electro-absorption modulator adaptive equalizer systems and methods
US11082082B2 (en) Signal calibration method, and device generated based on imbalance of I path and Q path, and storage medium
US8094748B2 (en) Transceiver architecture with combined smart antenna calibration and digital predistortion
US3982115A (en) Electronically programmable function generator
CN111384905B (en) Phase modulator control method and device, offset circuit and feedforward power amplifier
US9667282B1 (en) Method and apparatus for adaptive gain control and antenna load compensation
JP7258406B2 (en) Sideband suppression method, apparatus, computer equipment and computer program
KR101567528B1 (en) system controlling the radio-frequency accelerator for decreasing latency and method for the same
EP3297160A1 (en) Method for calibrating an input circuit and system for calibrating an input circuit
WO2020133459A1 (en) Method and device for controlling phase modulator, cancellation circuit, and feedforward power amplifier
US11190283B2 (en) Polar system and delay difference calibration method
Pavlov et al. Evaluation of the applicability of neural networks to suppress harmonic distortion of HF power amplifiers
CN112332913A (en) Agile signal power pre-calibration method based on digital automatic power control circuit
JP2005203925A (en) Distortion compensated amplifier device
Jalili et al. Highly non‐linear and wide‐band mmWave active array OTA linearisation using neural network
EP3428674B1 (en) Comb signal generator, measuring device and method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant