CN111367129A - Fan-out routing structure and display panel - Google Patents
Fan-out routing structure and display panel Download PDFInfo
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- CN111367129A CN111367129A CN202010272960.9A CN202010272960A CN111367129A CN 111367129 A CN111367129 A CN 111367129A CN 202010272960 A CN202010272960 A CN 202010272960A CN 111367129 A CN111367129 A CN 111367129A
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- 239000000758 substrate Substances 0.000 claims description 35
- 239000000126 substance Substances 0.000 claims 4
- 239000010410 layer Substances 0.000 description 108
- 229910052751 metal Inorganic materials 0.000 description 31
- 239000002184 metal Substances 0.000 description 31
- 229910010272 inorganic material Inorganic materials 0.000 description 11
- 239000011147 inorganic material Substances 0.000 description 11
- 239000004973 liquid crystal related substance Substances 0.000 description 8
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- 230000000694 effects Effects 0.000 description 4
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- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
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- 229910052802 copper Inorganic materials 0.000 description 3
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- 238000000034 method Methods 0.000 description 3
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- 229910000679 solder Inorganic materials 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/13629—Multilayer wirings
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Abstract
The invention provides a fan-out wiring structure and a display panel, wherein the fan-out wiring structure is provided with fan-out wirings, and the fan-out wirings comprise a first wiring, a second wiring and a third wiring; the second routing is arranged above the first routing and is staggered with the first routing, and the third routing is correspondingly arranged above the second routing and has a projection on the first routing completely falling into the range of the first routing; or the second wire is arranged above the first wire and partially overlapped with the first wire, and the third wire is arranged above the second wire and partially overlapped with the second wire; or the second wire is arranged above the first wire and partially overlapped with the first wire, and the third wire is arranged above the first wire and partially overlapped with the first wire.
Description
Technical Field
The application relates to the technical field of display, especially, relate to a line structure and display panel are walked to fan-out.
Background
The liquid crystal panel is an important component of the liquid crystal display device, and can display images under the matching of the backlight module and the driving of the driving circuit.
A TFT array area is disposed on an array substrate of the liquid crystal panel, signal lines and TFTs are fully distributed in the TFT array area, the signal lines of the array substrate are connected to the solder pads of the driving circuit board through fanout lines (fanout lines), and a region where the fanout lines are disposed is called a fanout area (fanout area).
As shown in fig. 2, the single-layer metal routing structure of the conventional fan-out area includes: the passivation structure comprises a substrate 101, a plurality of first fanout lines 102 arranged on the substrate 101 at intervals in parallel, an insulating layer 103 covering the substrate 101 and the first fanout lines 102, a first passivation layer 104 arranged on the insulating layer 103, and a second passivation layer 105 arranged on the first passivation layer 104. As shown in fig. 1, fig. 1 is a plan view of a single-layer metal trace of a fan-out area, all first fanout lines 102 are located on the same metal layer, and any two adjacent first fanout lines 102 do not overlap with each other. However, the non-overlapping of the first fan-out lines 102 may increase the overall height of the fan-out structure, which is not favorable for the narrow frame of the lcd panel.
However, in the prior art, since the frame (border) space of the liquid crystal display panel with a narrow frame is limited, under the same process condition, the routing structure of the fan-out area adopts the same layer of metal, and the double-layer metal routing is selected to reduce the number of routing lines of the same film layer, relieve the routing pressure of the same film layer, and realize the compression of Fanout height. As shown in fig. 4, the single-layer metal routing structure of the conventional fan-out area includes most technical features of the single-layer metal routing structure, and is different from the single-layer metal routing structure in that the single-layer metal routing structure further includes a second fan-out line 106 disposed between the insulating layer 106 and the first passivation layer 104 and staggered with the first fan-out line 102. As shown in fig. 3, fig. 3 is a plan view of a double-layer metal wiring in a fan-out area, the number of wirings on the same film layer is reduced by adopting the double-layer metal wiring, the wiring pressure on the same film layer is relieved, and the whole height of the fan-out structure is favorably compressed.
In pursuit of extremely compact frames, the dual-layer metal routing design of the fan-out area has not been able to meet the requirement of extremely narrow frames.
Disclosure of Invention
The invention aims to provide a fan-out routing structure and a display panel, and aims to solve the technical problem that the existing double-layer metal routing design of a fan-out area cannot meet the extremely narrow compression of a display panel frame.
In order to achieve the above object, the present invention provides a fan-out routing structure, which has a fan-out routing, wherein the fan-out routing includes a first routing, a second routing and a third routing; the second routing is arranged above the first routing and is staggered with the first routing, and the third routing is correspondingly arranged above the second routing and has a projection on the first routing completely falling into the range of the first routing; or the second wire is arranged above the first wire and partially overlapped with the first wire, and the third wire is arranged above the second wire and partially overlapped with the second wire; or the second wire is arranged above the first wire and partially overlapped with the first wire, and the third wire is arranged above the first wire and partially overlapped with the first wire.
Further, when the third trace is correspondingly disposed above the second trace and the projection of the third trace on the first trace completely falls within the range of the first trace, the fan-out trace further includes: a first substrate; the first routing is arranged on the first substrate; the first insulating layer is arranged on the first routing wire and completely covers the first routing wire; the second wire is arranged on the first insulating layer and is positioned between the two first wires; the passivation layer is arranged on the second routing wire and completely covers the second routing wire; and the third wire is arranged on the first passivation layer, and the projection of the third wire on the first wire is completely overlapped with the first wire.
Further, the first insulating layer includes: the first bulge protrudes out of the surface of the first routing; the first groove is arranged between the two first bulges; the second routing wire is arranged in the first groove and attached to the bottom wall of the first groove.
Further, when the third trace is disposed above the second trace and partially overlaps the second trace, the fan-out trace further includes: a second substrate; the first routing is arranged on the second substrate; the second insulating layer is arranged on the first routing wire and completely covers the first routing wire; the second wire is arranged on the second insulating layer, and the projection of the second wire on the first wire is partially overlapped with the first wire; the second passivation layer is arranged on the second routing line and completely covers the second routing line; and the third wire is arranged on the second passivation layer.
Further, the second insulating layer includes: the second bulge protrudes out of the surface of the first routing; the second groove is arranged between the two second bulges; wherein the second trace extends from the top surface of the second bump to the bottom wall of the second groove.
Further, the second passivation layer includes: the third bulge protrudes out of the surface of the second routing; the third groove is arranged between the two third bulges, and the projection of the third groove on the second groove is overlapped with the second groove part; wherein the third trace extends from the top surface of the third bump to the bottom wall of the third groove.
Further, when the third trace is disposed above the first trace and partially overlaps the first trace, the fan-out trace further includes: a third substrate; the first routing is arranged on the third substrate; the third insulating layer is arranged on the first routing wire and completely covers the first routing wire; the second wire is arranged on the third insulating layer, and the projection of the second wire on the first wire is partially overlapped with the first wire; the third passivation layer is arranged on the second routing line; and the third wire is arranged on the third passivation layer.
Further, the third insulating layer includes: the fourth bulge protrudes out of the surface of the first routing; the fourth groove is arranged between the two fourth bulges; wherein the second trace extends from the top surface of the fourth bump to the bottom wall of the fourth groove.
Further, the third passivation layer includes: the fifth bulge protrudes out of the surface of the second routing; the fifth groove is arranged between the two fifth bulges; the third wire extends from the groove wall of the fifth groove to the bottom wall of the fifth groove, and the third wire and the second wire are arranged in a staggered manner.
In order to achieve the above object, the present invention further provides a display panel, which includes a fan-out area, where the fan-out area includes the fan-out trace mentioned above.
The invention has the technical effects that one layer of routing is added between the first passivation layer and the second passivation layer to realize the fan-out routing structure with three layers of routing, and the number of the other two layers of routing is shared by the routing, so that the height of the fan-out routing structure is further compressed, the narrow frame of the display panel with the fan-out structure is facilitated, and the opening rate of a fan-out area is not influenced.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a single metal layer of a fan-out routing structure in the prior art.
FIG. 2 is a cross-sectional view of the fan-out routing structure of FIG. 1 along direction A-A'.
Fig. 3 is a schematic structural diagram of a double-layer metal layer of a fan-out routing structure in the prior art.
FIG. 4 is a cross-sectional view of the fan-out routing structure of FIG. 3 along direction B-B'.
Fig. 5 is a schematic structural diagram of a display panel according to the present application.
Fig. 6 is a schematic structural diagram of the fan-out routing structure in embodiment 1.
FIG. 7 is a cross-sectional view of the fan-out routing structure of FIG. 6 along the direction C-C'.
Fig. 8 is a schematic structural diagram of a fan-out routing structure described in embodiment 2.
FIG. 9 is a cross-sectional view of the fan-out routing structure of FIG. 8 taken along direction D-D'.
Fig. 10 is a schematic structural diagram of a fan-out routing structure described in embodiment 3.
FIG. 11 is a cross-sectional view of the fan-out routing structure of FIG. 10 along direction E-E'.
The drawing figures are partially identified as follows:
101 a substrate; 102 a first fanout line; 103 an insulating layer;
104 a first passivation layer; 105 a second passivation layer; 106 second fanout line;
1000 a display panel; 11 a TFT array region; 12 a drive circuit board; 13 a fan-out region;
1 a first wire; 2, second routing; 3, third routing;
10 binding terminals; 20 an access terminal;
100 a first fan-out trace; 200 second fan-out traces; 300 a third fan-out trace;
110 a first substrate; 120 a first insulating layer; 130 a first passivation layer; 140 a fourth passivation layer;
1101 a first projection; 1102 a first groove;
210 a second substrate; 220 a second insulating layer; 230 a second passivation layer; 240 a fifth passivation layer;
2101 second projection; 2102 a second groove;
2301 a third projection; 2302 a third groove;
310 a third substrate; 320 a third insulating layer; 330 a third passivation layer; 340 a sixth passivation layer;
3201 a fourth protrusion; 3202 a fourth groove;
3301A fifth bump; 3302 fifth concave trough.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.
As shown in fig. 5, the present embodiment provides a display panel, which is a liquid crystal panel and includes a TFT array area, a driving circuit board, and a fan-out area. The liquid crystal display panel comprises a liquid crystal panel, a driving circuit board and a fan-out wire (fanout line), wherein a TFT array area is arranged on an array substrate of the liquid crystal panel, signal lines and TFTs are distributed in the TFT array area, the driving circuit board connects the signal lines of the array substrate with welding pins of the driving circuit board through the fan-out wire, and a setting area of the fan-out wire is called as a fan-out area.
Example 1
As shown in fig. 6, the present embodiment provides a fan-out trace structure having a first fan-out trace 100, wherein one end of the fan-out trace is connected to a bonding pad 10 of a driving circuit board, and the other end is connected to an access terminal 20 of a TFT array area. The first fan-out trace 100 includes a first trace 1, a second trace 2 and a third trace 3, the second trace 2 is disposed above the first trace 1 and is staggered with the first trace 1, and the third trace 3 is correspondingly disposed above the second trace 2 and has a projection on the first trace 1 completely falling within the range of the first trace 1. In other words, the first traces 1 and the second traces 2 are arranged in a staggered manner, and the vertical projection of the third traces 3 on the first traces 1 is overlapped with the first traces 1.
As shown in fig. 7, when the third trace 3 is correspondingly disposed above the second trace 2 and the projection on the first trace 1 completely falls within the range of the first trace 1, the first fan-out trace 100 includes a first substrate 110, a first insulating layer 120, a first passivation layer 130 and a fourth passivation layer 140.
The first substrate 110 is a glass substrate.
The first trace 1 is disposed on the first substrate 110. The first trace 1 is formed by patterning a metal layer.
The first insulating layer 110 is patterned on the first trace 1 and completely covers the first trace 1. The first insulating layer 110 includes a first protrusion 1101 and a first groove 1102. The first bump 1101 protrudes from the surface of the first trace 1. The first groove 1102 is disposed between the two first protrusions 1101. The first insulating layer 110 is made of an inorganic material, and is used for insulating the first trace 1 from the second trace 2 to prevent short circuit.
The second wire 2 is disposed on the first insulating layer 120 and located between the two first wires 1, and the second wire 2 is formed by patterning a metal layer. The second trace 2 is disposed in the first groove 1102 and attached to the bottom wall of the first groove 1102, such that the second trace 2 and the first trace 1 are staggered.
The first passivation layer 130 is patterned on the second trace 2 and completely covers the second trace 2. The first passivation layer 130 is made of an inorganic material and is used for insulating the third wire 3 from the second wire 2 to prevent a short circuit.
The third wire 3 is disposed on the first passivation layer 130, a projection of the third wire 3 on the first wire 1 completely falls within the range of the first wire 1, and a vertical projection of the third wire on the first wire completely overlaps with the first wire 1.
The fourth passivation layer 140 is patterned on the third trace 3, and completely covers the third trace 3, and is made of an inorganic material.
In this embodiment, the first trace, the second trace and the third trace are made of the same metal, and the metal is preferably copper, aluminum, molybdenum, or the like. The first insulating layer, the first passivation layer and the fourth passivation layer are made of inorganic materials, so that the insulating effect is achieved, water and oxygen can be separated, and the metal wiring is prevented from being corroded by the invasion of the water and oxygen.
Compared with the prior art, this embodiment provides a line structure and display panel are walked to fan-out, first line of walking, the second is walked line and third and is walked the line and be located the metal level of difference respectively, adopt first line of walking to walk line staggered arrangement with the second, the third is walked projection of line on first metal is walked line and is walked the wiring mode that the line overlaps completely with first, utilize the third to walk the line and share other two-layer walk the line quantity, thereby further compress the fan-out and walk the height of line structure, be favorable to having the narrow border of this fan-out structure's display panel, also can not influence the aperture ratio in fan-out district simultaneously.
Example 2
As shown in fig. 8, the present embodiment provides a fan-out trace structure having a second fan-out trace 200, wherein one end of the fan-out trace is connected to a bonding pad 10 of a driving circuit board, and the other end is connected to an access terminal 20 of a TFT array area. The second fan-out trace 200 includes a first trace 1, a second trace 2 and a third trace 3, the second trace 2 is disposed above the first trace 1 and partially overlapped with the first trace 1, and the third trace 3 is disposed above the second trace 2 and partially overlapped with the second trace 2.
As shown in fig. 9, when the third trace 3 is disposed above the second trace 2 and partially overlaps the second trace 2, the second fan-out trace 200 further includes a second substrate 210, a second insulating layer 220, a second passivation layer 230, and a fifth passivation layer 240.
The second substrate 210 is a glass substrate.
The first trace 210 is disposed on the second substrate 210. The first trace 210 is formed by patterning a metal layer.
The second insulating layer 220 is disposed on the first trace 210 and completely covers the first trace 210. The second insulating layer 220 includes a second protrusion 2101 and a second groove 2102. The second bump 2101 protrudes from the surface of the first trace 1. A second groove 2102 is provided between the two second protrusions 2101. The second insulating layer 210 is made of an inorganic material, and is used for insulating the first trace 1 from the second trace 2 to prevent a short circuit.
The second trace 2 is disposed on the second insulating layer 220, and a projection of the second trace 2 on the first trace 1 is partially overlapped with the first trace 1. Wherein, the second trace 2 extends from the top surface of the second bump 2101 to the bottom wall of the second groove 2102. Specifically, the second trace 2 covers part of the top surface of the second protrusion 2101 and extends to part of the bottom wall of the second groove 2102, so that the second trace 2 is partially overlapped with the first trace 1. The longitudinal section of the second trace 2 is a Z-shaped structure.
The second passivation layer 230 is disposed on the second trace 2 and completely covers the second trace 2. The second passivation layer 230 is made of an inorganic material, and is used for insulating the second wire 2 from the first wire 1 to prevent a short circuit. The second passivation layer 230 includes third protrusions 2301 and third grooves 2302. The third bump 2301 protrudes out of the surface of the second trace. Third groove 2302 is provided between two third protrusions 2301, and a projection of third groove 2302 onto second groove 2102 partially overlaps second groove 2102.
The third trace 3 is disposed on the second passivation layer 220. Wherein, the third trace 3 extends from the top surface of the third protrusion 2301 to the bottom wall of the third groove 2302. Specifically, the third trace 3 covers part of the top surface of the third protrusion 2301 and extends to part of the bottom wall of the third groove 2302, so that the projection of the third trace 3 on the second trace is partially overlapped with the second trace 2. The longitudinal section of the third trace 2 is a Z-shaped structure.
The fifth passivation layer 240 is patterned on the second passivation layer 230 and completely covers the third trace 3, and is made of an inorganic material.
In this embodiment, the first trace, the second trace and the third trace are made of the same metal, and the metal is preferably copper, aluminum, molybdenum, or the like. The second insulating layer, the second passivation layer and the fifth passivation layer are made of inorganic materials, so that the insulating effect is achieved, water and oxygen can be separated, and the metal wiring is prevented from being corroded by the water and oxygen.
Compared with the prior art, this embodiment provides a line structure and display panel are walked to fan-out, adopt the three-layer to walk the wiring mode of line part overlap, the second is walked projection and the first line part of walking on the line promptly, the third is walked projection and the second of walking on the line and is walked line part overlap, thereby avoid the three-layer to walk the line complete overlap and produce the segment difference (the segment difference indicates the difference in earth potential between the two-layer line of walking), overcurrent appears easily, walk phenomenons such as line short circuit, consequently, can effectively reduce fan-out's overall height, be favorable to having this fan-out's display panel's narrow border ization.
Example 3
As shown in fig. 10, the present embodiment provides a fan-out trace structure having a third fan-out trace 300, wherein one end of the fan-out trace is connected to a bonding pad 10 of a driving circuit board, and the other end is connected to an access terminal 20 of a TFT array area. The first fan-out trace 100 includes a first trace 1, a second trace 2 and a third trace 3, the second trace 2 is disposed above the first trace 1 and partially overlapped with the first trace 1, and the third trace 3 is disposed above the first trace 1 and partially overlapped with the first trace 1.
As shown in fig. 11, when the third trace 3 is disposed above the first trace 1 and partially overlaps the first trace 1, the first fan-out trace 100 further includes a third substrate 310, a third insulating layer 320, a third passivation layer 330 and a sixth passivation layer 340.
The third substrate 310 is a glass substrate.
The first trace 1 is disposed on the third substrate 310. The first trace 1 is formed by patterning a metal layer.
The third insulating layer 320 is patterned on the first trace 1 and completely covers the first trace 1. The third insulating layer 320 includes a fourth protrusion 3201 and a fourth groove 3202. The fourth bump 3201 protrudes from the surface of the first trace 1. The fourth groove 3202 is disposed between the two fourth protrusions 3201.
The second trace 2 is disposed on the third insulating layer 320, and a projection of the second trace 2 on the first trace 1 is partially overlapped with the first trace 1. Wherein, the second trace 2 extends from the top surface of the fourth protrusion 3201 to the bottom wall of the fourth groove 3202. Specifically, the second trace 2 covers part of the top surface of the fourth protrusion 3201 and extends to part of the bottom wall of the fourth groove 3202, so that the second trace 2 is partially overlapped with the first trace 1. The longitudinal section of the second trace 2 is a Z-shaped structure.
The third passivation layer 330 is patterned on the second trace 2. The third passivation layer 330 is made of an inorganic material and is used for insulating the first trace 1 from the second trace 2 to prevent a short circuit. The third passivation layer 330 includes a fifth bump 3301 and a fifth cavity 3302. The fifth bump 3301 protrudes from the surface of the second trace. The fifth cavity 3302 is disposed between the fifth protrusions 3301. The third trace 3 extends from the slot wall of the fifth cavity 3302 to the bottom wall of the fifth cavity 3302, and the third trace 3 and the second trace 2 are disposed in a staggered manner.
The third wire 3 is disposed on the third passivation layer 330, a projection of the third wire 3 on the first wire is partially overlapped with the first wire, and the third wire 3 and the second wire 2 are disposed in a staggered manner.
The sixth passivation layer 340 is patterned on the third trace 3, and completely covers the third trace 3, and is made of an inorganic material.
In this embodiment, the first trace, the second trace and the third trace are made of the same metal, and the metal is preferably copper, aluminum, molybdenum, or the like. The third insulating layer, the third passivation layer and the sixth passivation layer are made of inorganic materials, so that the insulating effect is achieved, water and oxygen can be separated, and the metal wiring is prevented from being corroded by the water and oxygen.
Compared with the prior art, this embodiment provides a line structure and display panel are walked to fan-out, first line of walking, the second is walked line and third and is walked the line and be located the metal level of difference respectively, adopt the third to walk projection and the first line partial coincidence of walking of line on first line, the third is walked line and the crisscross wiring mode that sets up of second line, thereby avoid the three-layer to walk the line overlap completely and produce the segment difference (the segment difference indicates the earth potential difference between the two-layer line of walking), the overcurrent appears easily, walk phenomenons such as line short circuit, consequently, can effectively reduce fan-out's overall height, be favorable to having this fan-out's display panel.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The fan-out routing structure and the display panel provided by the embodiment of the application are introduced in detail, a specific example is applied in the description to explain the principle and the implementation manner of the application, and the description of the embodiment is only used for helping to understand the technical scheme and the core idea of the application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A fan-out routing structure having a fan-out routing, the fan-out routing comprising:
the first wire, the second wire and the third wire;
wherein the content of the first and second substances,
the second routing is arranged above the first routing and is staggered with the first routing, and the third routing is correspondingly arranged above the second routing and has a projection on the first routing completely falling into the range of the first routing; or
The second routing is arranged above the first routing and partially overlapped with the first routing, and the third routing is arranged above the second routing and partially overlapped with the second routing; or
The second routing wire is arranged above the first routing wire and partially overlapped with the first routing wire, and the third routing wire is arranged above the first routing wire and partially overlapped with the first routing wire.
2. The fan-out routing structure of claim 1,
when the third trace is correspondingly disposed above the second trace and the projection on the first trace completely falls within the range of the first trace,
the fan-out routing further comprises:
a first substrate;
the first routing is arranged on the first substrate;
the first insulating layer is arranged on the first routing wire and completely covers the first routing wire;
the second wire is arranged on the first insulating layer and is positioned between the two first wires;
the first passivation layer is arranged on the second routing line and completely covers the second routing line; and
the third wire is arranged on the first passivation layer, and the projection of the third wire on the first wire is completely overlapped with the first wire.
3. The fan-out routing structure of claim 2,
the fan-out routing includes:
the first bulge protrudes out of the surface of the first routing; and
the first groove is arranged between the two first bulges;
wherein the content of the first and second substances,
the second routing wire is arranged in the first groove and attached to the bottom wall of the first groove.
4. The fan-out routing structure of claim 1,
when the third trace is disposed above the second trace and partially overlaps the second trace,
the fan-out routing further comprises:
a second substrate;
the first routing is arranged on the second substrate;
the second insulating layer is arranged on the first routing wire and completely covers the first routing wire;
the second wire is arranged on the second insulating layer, and the projection of the second wire on the first wire is partially overlapped with the first wire;
the second passivation layer is arranged on the second routing line and completely covers the second routing line; and
the third wire is arranged on the second passivation layer.
5. The fan-out routing structure of claim 4,
the second insulating layer includes:
the second bulge protrudes out of the surface of the first routing; and
the second groove is arranged between the two second bulges;
wherein the content of the first and second substances,
the second trace extends from the top surface of the second protrusion to the bottom wall of the second groove.
6. The fan-out routing structure of claim 5,
the second passivation layer includes:
the third bulge protrudes out of the surface of the second routing; and
the third groove is arranged between the two third bulges, and the projection of the third groove on the second groove is overlapped with the second groove part;
wherein the third trace extends from the top surface of the third bump to the bottom wall of the third groove.
7. The fan-out routing structure of claim 1,
when the third trace is disposed above the first trace and partially overlaps the first trace,
the fan-out routing further comprises:
a third substrate;
the first routing is arranged on the third substrate;
the third insulating layer is arranged on the first routing wire and completely covers the first routing wire;
the second wire is arranged on the third insulating layer, and the projection of the second wire on the first wire is partially overlapped with the first wire;
the third passivation layer is arranged on the second routing line; and
the third wire is arranged on the third passivation layer.
8. The fan-out routing structure of claim 7,
the third insulating layer includes:
the fourth bulge protrudes out of the surface of the first routing; and
the fourth groove is arranged between the two fourth bulges;
wherein the content of the first and second substances,
the second trace extends from the top surface of the fourth protrusion to the bottom wall of the fourth groove.
9. The fan-out routing structure of claim 8,
the third passivation layer includes:
the fifth bulge protrudes out of the surface of the second routing; and
the fifth groove is arranged between the two fifth bulges;
the third wire extends from the groove wall of the fifth groove to the bottom wall of the fifth groove, and the third wire and the second wire are arranged in a staggered manner.
10. A display panel, comprising:
a fan-out area comprising the fan-out routing structure of any of claims 1-9.
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| CN202010272960.9A CN111367129A (en) | 2020-04-09 | 2020-04-09 | Fan-out routing structure and display panel |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010272960.9A CN111367129A (en) | 2020-04-09 | 2020-04-09 | Fan-out routing structure and display panel |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023201692A1 (en) * | 2022-04-22 | 2023-10-26 | 京东方科技集团股份有限公司 | Display substrate, manufacturing method and display apparatus |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20140053626A (en) * | 2012-10-26 | 2014-05-08 | 삼성디스플레이 주식회사 | Display apparatus and organic luminescense display apparatus |
| CN108732837A (en) * | 2018-05-29 | 2018-11-02 | 武汉华星光电技术有限公司 | TFT array substrate and liquid crystal display panel |
| CN108878444A (en) * | 2018-06-07 | 2018-11-23 | 武汉天马微电子有限公司 | Display panel and display device |
| CN109300921A (en) * | 2018-11-15 | 2019-02-01 | 昆山龙腾光电有限公司 | Array substrate and display panel |
| CN209055780U (en) * | 2018-11-15 | 2019-07-02 | 昆山龙腾光电有限公司 | Array substrate and display panel |
| CN110211929A (en) * | 2018-12-04 | 2019-09-06 | 友达光电股份有限公司 | Array substrate and its manufacturing method |
| CN110379841A (en) * | 2019-07-25 | 2019-10-25 | 云谷（固安）科技有限公司 | A kind of display panel and display device |
-
2020
- 2020-04-09 CN CN202010272960.9A patent/CN111367129A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20140053626A (en) * | 2012-10-26 | 2014-05-08 | 삼성디스플레이 주식회사 | Display apparatus and organic luminescense display apparatus |
| CN108732837A (en) * | 2018-05-29 | 2018-11-02 | 武汉华星光电技术有限公司 | TFT array substrate and liquid crystal display panel |
| CN108878444A (en) * | 2018-06-07 | 2018-11-23 | 武汉天马微电子有限公司 | Display panel and display device |
| CN109300921A (en) * | 2018-11-15 | 2019-02-01 | 昆山龙腾光电有限公司 | Array substrate and display panel |
| CN209055780U (en) * | 2018-11-15 | 2019-07-02 | 昆山龙腾光电有限公司 | Array substrate and display panel |
| CN110211929A (en) * | 2018-12-04 | 2019-09-06 | 友达光电股份有限公司 | Array substrate and its manufacturing method |
| CN110379841A (en) * | 2019-07-25 | 2019-10-25 | 云谷（固安）科技有限公司 | A kind of display panel and display device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023201692A1 (en) * | 2022-04-22 | 2023-10-26 | 京东方科技集团股份有限公司 | Display substrate, manufacturing method and display apparatus |
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