CN111342836A - Two-bus code sending drive circuit with protection control function - Google Patents
Two-bus code sending drive circuit with protection control function Download PDFInfo
- Publication number
- CN111342836A CN111342836A CN202010260588.XA CN202010260588A CN111342836A CN 111342836 A CN111342836 A CN 111342836A CN 202010260588 A CN202010260588 A CN 202010260588A CN 111342836 A CN111342836 A CN 111342836A
- Authority
- CN
- China
- Prior art keywords
- circuit
- level
- module
- pole
- triode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
The embodiment of the invention provides a two-bus driving code sending circuit, which comprises: the bus driving circuit is used for outputting high-current power supply to the code sending circuit at the rear stage and the circuit for receiving the short-circuit signal and performing power-off protection. The bus driving circuit of the heavy current power supply output provides a heavy current bus level for the post-stage circuit, and the operation of the post-stage circuit is guaranteed; after the circuit receives the level signal with short-circuit fault, the circuit can effectively protect the rear-stage circuit from being burnt out in time.
Description
Technical Field
The invention relates to the technical field of intelligent fire-fighting patrol, in particular to a two-bus code-transmitting drive circuit with a protection control function.
Background
With the continuous acceleration of the modernization process, in the process of developing and constructing modern cities, some hidden danger problems are gradually revealed, especially fire safety is more and more emphasized by people, wherein due to the geographical isolation of various buildings, fire control management is dispersed, dangerous situations are not found timely, and therefore urban fire control for spreading fire situations also has many concerns. The intelligent fire-fighting system based on the new-generation information technology such as the Internet of things, cloud computing, big data and mobile internet can effectively integrate all the forces, find out fire danger, ensure fire safety and master the initiative of disaster relief.
Along with the development of the fire fighting industry, the original input/output module and the original acousto-optic alarm product are connected by a power line and a communication line through four wires, and along with the development of the prior art, the magnetic latching relay and the LED lamp are applied, so that the power consumption of the module and the acousto-optic product is greatly reduced, and the module and the acousto-optic belt load are possible on a fire fighting two-bus.
The power supply capacity of the fire-fighting two-bus adopting the existing T3 protocol is too weak to meet the requirements of modules and acousto-optic two-bus equipment. The power supply capacity of the two buses is improved by improving the circuit of the existing product and selecting the components with low power consumption. The bus loop card short circuit used by the T3 protocol is protected by a self-healing fuse. The general low-current bus loop card realizes short-circuit protection through a self-recovery fuse element. However, the self-recovery fuse can only realize the fast action when the bus short-circuit current is several times of the rated current, and the device cannot realize the fast action protection current network under the condition of smaller short-circuit current.
Disclosure of Invention
In view of the above problems, embodiments of the present invention are proposed to provide a two-bus code transmitting circuit with a protection control function that overcomes or at least partially solves the above problems.
In order to solve the above problem, an embodiment of the present invention discloses a two-bus code sending circuit with a protection control function, including:
the two buses transmit a code driving circuit module, a level signal conversion circuit module and a level signal turnover circuit module;
the two-BUS code sending driving circuit module is connected to the output end of the BUSP, receives a control signal and converts the control signal into a preset level through the level signal conversion circuit module, and controls the two-BUS code sending driving circuit module to output a BUS + level;
the level signal conversion circuit module receives a QDL level and a QDH level, converts the QDL level and the QDH level into a low level and a high level or a high level and a low level through the level signal conversion circuit module, and is connected to the control end of the two-bus driving code sending circuit module;
the level signal turning circuit module receives a START level sent by an external single chip microcomputer and a SHORT-CHECK level sent by an external SHORT circuit detection circuit; the second output of the level signal turnover circuit module is connected to the SHORT level position of the single chip microcomputer and connected with the input end of the first turnover module of the level signal turnover circuit module, and the first output of the level signal turnover circuit module is connected to the level signal conversion circuit module and connected with the input end of the second turnover module.
Preferably, the two-bus code sending driving circuit module is a high-current power supply circuit, and includes: PMOS transistor (PMOS) and NMOS transistor (NMOS), PMOS 'S S utmost point connection BUSP position, PMOS' S D utmost point and NMOS 'S D utmost point connect as the output of BUS + level, NMOS' S S ground connection in the return circuit, BUSP provides for external circuit, the control end of two BUS drive code sending circuit module includes: and the G pole of the PMOS and the G pole of the NMOS are connected.
Preferably, the bus driving code sending circuit according to claim 1, wherein the level signal flipping circuit module is a 74HC00 gate chip, which has at least 4 independent modules therein, and comprises: the first overturning module is arranged at the input end of the No. 1 pin, the input end of the No. 2 pin and the output end of the No. 3 pin, and the second overturning module is arranged at the input end of the No. 4 pin, the input end of the No. 5 pin and the output end of the No. 6 pin; the first output comprises: the output end of the first flipping module, the second output includes: the output end of the second overturning module; the output end of the 3 rd pin is connected with the input end of the 5 th pin, and the output end of the 6 th pin is connected with the input end of the 2 nd pin.
Preferably, the level signal conversion circuit module includes: the circuit comprises a first conversion module, a second conversion module and a clamping circuit module; wherein the first conversion module comprises: the first triode, second triode and third triode, the second conversion module contain: a fourth triode; the clamping circuit comprises: a first diode and a second diode.
Preferably, the first triode, the second triode and the fourth triode are NPN type triodes, the third triode is a PNP type triode, and according to the working characteristics of the triodes, the E poles of the NPN type triodes are all grounded in a loop; the first conversion module includes: the B pole of the first triode is connected with the QDL level output end and is connected with the output end of the first overturning module; the C electrode of the first triode is connected with the C electrode of the second triode in parallel and is connected to the B electrode of the third triode; the E pole of the third triode is connected with a power supply terminal DC36V in a loop, the C pole of the third triode is connected with the G pole of the PMOS tube, and the C pole of the fourth triode is connected with the G pole of the NMOS and the B pole of the second triode; the B pole of the fourth triode is connected with the QDH level output end, and the DC36V is a loop power supply end provided by the outside.
Preferably, the QDL level and the QDH level are provided by an external single chip microcomputer.
Preferably, the cathode of the first diode of the clamping circuit module is connected with the power supply terminal of the DC36V in the loop, the anode of the first diode is connected with the cathode of the second diode, and the anode of the second diode is grounded in the loop, so as to protect the voltage between the two diodes from exceeding the voltage range of the loop: 0-DC36V (without taking into account the voltage drop of the diode conduction).
Compared with the prior art, the invention has the beneficial effects that:
the MOS tube with low internal resistance and high power is controlled to provide a power supply level of high current for a subsequent circuit by sending a signal through the singlechip, and the power supply is normally carried out if no short circuit occurs by controlling short circuit detection in the circuit through a level signal of the singlechip; if a short circuit occurs, the rapid and timely control circuit enables the MOS tube to cut off the power supply output of the subsequent circuit, so that the protection circuit cannot be burnt out under the condition of the short circuit.
The circuit module directly composed of the single chip microcomputer signal end and some electronic components controls and protects the current circuit and the subsequent code sending circuit, and due to the fact that the electronic components are high in reaction speed, the protection circuit can be started in time by shutting down the output of the circuit at the highest speed after the received signals are received.
Drawings
FIG. 1 is a flow chart of an embodiment of a two-bus code transmitting circuit device with protection control function according to the present invention;
FIG. 2 is a circuit diagram of an embodiment of a two-bus code transmitting circuit device with protection control function according to the present invention;
FIG. 3 is a diagram of a gate circuit used in the present invention;
fig. 4 is a truth table for the gate junctions used in the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, the present invention is further described in detail with reference to the accompanying drawings and the detailed description, but the present invention is not limited thereto, and any limited number of modifications may be made within the scope of the claims.
Referring to fig. 1, a flowchart of an embodiment of a two-bus code sending circuit device with a protection control function according to the present invention is shown, which may specifically include:
when the circuit works normally, the two-bus code sending drive circuit has a first state of PMOS on and NMOS off or a second state of PMOS off and NMOS on, and supplies power for a subsequent circuit by controlling the two states to alternately act, and the specific steps are as follows:
s101, acquiring QDL, QDH level and START level of a first state sent by a single chip microcomputer:
QDL is low, QDH is high and START is high; the QDL low level is output to the B pole of the first triode [ T12] of the level signal conversion module to control the cut-off between the C pole and the E pole, so that the B pole current of the third triode [ T8] is controlled, the change of the B pole current of the third triode [ T8] at the moment is known according to the working characteristics of the PNP type triode to control the cut-off between the E pole and the C pole so as to enable the C pole to generate the low level, the G pole of the PMOS [ T11] of the two-bus code sending driving circuit module is connected to the C pole of the third triode [ T8], the S pole and the D pole are in a conducting state at the moment according to the working characteristics of the PMOS, and the PMOS and the NMOS are in a first state at the moment;
the QDH high level is output to the B pole of a fourth triode [ T14] of the level signal conversion module to control the conduction between the C pole and the E pole, the C pole level is changed into low level at the moment, the G pole of an NMOS [ T13] of the two-bus code sending driving circuit module is connected with the C pole of the fourth triode [ T14], and the cut-off state of the D pole and the S pole of NOMS at the moment can be known according to the working characteristics of the NMOS;
the START high level is output to the 4 th pin input end of a second overturning module [ U7B ] of the level signal overturning circuit module, and at the moment, the SHORT level is output by the 6 th pin output end, so that the single chip microcomputer is not interrupted; the input end of a 1 st pin of the first turnover module [ U7A ] is connected with an external SHORT-circuit detection circuit SHORT-CHECK to be a high level signal, the output end of a 3 rd pin outputs a low level to a B pole of a first triode [ T12], and the output low level does not change the working state of a PMOS;
in summary, when the PMOS and NMOS are in the first state, the two BUS code sending circuits output a BUS + level of large current.
S102, acquiring QDL, QDH level and START level of a second state sent by the single chip microcomputer:
QDL is high, QDH is low, START is low; the QDL high level is output to the B pole of the first triode [ T12] of the level signal conversion module to control the conduction between the C pole and the E pole, so that the B pole current of the third triode [ T8] is controlled, the current change of the B pole of the third triode [ T8] at the moment can be known according to the working characteristics of the PNP type triode to control the conduction between the E pole and the C pole to enable the C pole to generate high level, the S pole and the D pole are in a cut-off state at the moment according to the working characteristics of the PMOS, and the PMOS and the NMOS are in a second state at the moment;
the QDH low level is output to the B pole of a fourth triode [ T14] of the level signal conversion module to control the C pole and the E pole to be cut off, the C pole level is changed into high level at the moment, the G pole of an NMOS [ T13] of the two-bus code sending driving circuit module is connected with the C pole of the fourth triode [ T14], and the conducting state of the D pole and the S pole of NOMS at the moment can be known according to the working characteristics of the NMOS;
the START low level is output to the 4 th pin input end of a second overturning module [ U7B ] of the level signal overturning circuit module, at the moment, the SHORT level output by the 6 th pin output end can cause the interruption of a single chip microcomputer program, and the single chip microcomputer program interrupts to execute a SHORT-circuit signal in the detection circuit;
s103, detecting whether the circuit has a short circuit condition:
if no short circuit condition exists in the circuit, jumping to the S101 step to continue execution; when a short circuit is detected in the circuit, executing the following steps;
s104, protection is performed, and the steps are as follows:
the SHORT-CHECK level of the external detection circuit is set to be low level, is connected to the input end of the 1 st pin of the first flip module [ U7A ], and outputs high level to the B pole of a first triode [ T12] of the level signal conversion module through the first flip module;
the B pole of the first triode [ T12] is at high level, the C pole of the first triode [ T12] is conducted with the E pole, so that the B pole of the third triode [ T8] is connected to be low, the C pole of the third triode is conducted between the E pole and the C pole, so that the C pole becomes high level, and the G pole of the PMOS of the two-bus code sending circuit is connected to the C pole of the third triode [ T8] and also becomes high level;
according to the working characteristics of the PMOS, the S pole and the D pole of the PMOS are in a cut-off state at the moment, and the BUS + level output is stopped;
the steps are combined as follows: when no short circuit exists, the two BUS driving code sending circuit modules are controlled by the single chip microcomputer to output a BUS + level of a large current, and driving power supply is provided for subsequent circuits; when short circuit occurs, the circuit processes the short circuit level signal and shuts down the output of the PMOS in time to stop power supply output, so that the circuit is prevented from being burnt by large current power supply under the condition of short circuit, and the purpose of protection is achieved.
Referring to fig. 2-4, circuit diagrams of two-bus code transmitting circuit device with protection control function according to an embodiment of the present invention are shown.
One of the core concepts of the embodiments of the present invention is a two-bus code transmitting circuit device with protection control function, including:
the S pole of the PMOS [ T11] of the two-bus code sending drive circuit is connected with the position of an output BUSP, the G pole of the PMOS [ T11] of the two-bus code sending drive circuit module is connected with the C pole of the third triode [ T8] of the level signal conversion circuit module, and the level of the C pole is changed to control the conduction or the cut-off of the PMOS; the G pole of the NMOS [ T13] is connected with the C pole of a fourth triode [ T14] of the level signal conversion circuit module, and the cut-off or the conduction of the NMOS is controlled by controlling the level of the C pole; the G electrodes of the PMOS [ T11] and the NMOS [ T13] are connected with a 7 th resistor [ R41] in series; the D pole of the PMOS of the two-BUS code sending drive circuit module is connected with the D pole of the NMOS and is used as the output end of BUS + level;
the C-level of a first triode [ T12] of the level signal conversion circuit module is connected with the C pole of a second triode [ T15] and one end of a sixth resistor [ R40], the B pole of the first triode [ T12] is connected with two resistors of a first resistor [ R45] and a second resistor [ R49] in parallel, wherein the first resistor [ R45] is connected with the QDL level output end of the single chip microcomputer, and the second resistor [ R49] is connected with the output end of a first overturning module [ U7A ] of the level overturning circuit module [74HC00 ]; the B pole of a fourth triode [ T14] of the level signal conversion circuit module is connected with a third resistor [ R47] and a fourth resistor [ R50] in parallel, wherein the other end of the third resistor [ R47] is connected with the QDH level output end of the single chip microcomputer, the other end of the fourth resistor [ R50] is grounded in a loop, the E pole of the fourth triode [ T14] is grounded in the loop, and the C pole of the fourth triode [ T14] is connected with the G pole of the NMOS [ T13] of the bus code sending drive circuit module; the output of the E pole DC36V power supply of the third triode [ T8], and connect the fifth resistance [ R33] with B grade of the third triode [ T8] in parallel, the B pole of the third triode [ T8] connects the 6 th resistance [ R40], the other end of said 6 th resistance connects C pole of said first triode and C grade of the second triode; one end of the 8 th resistor [ R46] is connected to the G pole of the NMOS, the other end of the 8 th resistor [ R46] is connected to the B pole of the second triode [ T15], and the E pole of the second triode [ T15] is grounded in a loop;
the output end of a pin 3 of the level signal overturning circuit module, namely the first overturning module [ U7A ], is connected to the input end of a pin 5 of the second overturning module [ U7B ] and is connected with a second resistor [ R49], and the input end of a pin 1 of the first overturning module [ U7A ] is connected with the output end of a SHORT-circuit detection signal SHORT-CHECK of an external circuit; the output end of the 6 th pin of the second flip module [ U7B ] is connected to the input end of the 2 nd pin of the first flip module [ U7A ] and is connected with a 9 th resistor [ R53], the 9 th resistor [ R53] is connected to the receiving SHORT level end of the single chip microcomputer, and the input end of the 4 th pin of the second flip module [ U7B ] is connected with the START level signal transmission end of the single chip microcomputer.
The two-bus code sending drive circuit module is a high-current power supply circuit, and comprises: the PMOS transistor and the NMOS transistor with high power and low internal resistance can greatly reduce the voltage drop caused by the element when outputting large current; the S pole of the PMOS is connected with the BUSP position, the D pole of the PMOS and the D pole of the NMOS are connected as the output end of BUS + level, and the S pole of the NMOS is grounded in a loop.
The level signal flip circuit module is a 74HC00 gate circuit chip, and at least 4 independent modules are arranged in the level signal flip circuit module, and the level signal flip circuit module comprises: a first flip module [ U7A ] of a 1 st pin input end, a 2 nd pin input end and a 3 rd pin output end, and a second flip module [ U7B ] of a 4 th pin input end, a 5 th pin input end and a 6 th pin output end; the first output comprises: an output end of the first flipping module, the second output including: the output of second upset module, the 5 th pin input is connected to the 3 rd pin output, the 2 nd pin input is connected to the 6 th pin output, and the work efficiency of level signal upset module can be improved in this mode's connection, the 14 th pin of 74HC00 gate circuit chip is VCC5V power for the chip supply terminal connection, and the 7 th pin is the earthing terminal.
The level signal conversion circuit module includes: the first conversion submodule, the second conversion submodule and the clamping circuit module; wherein the first conversion module comprises: first triode, second triode and third triode, the second conversion module contains: a fourth triode; the clamp circuit includes: a first diode and a second diode.
The first triode, the second triode and the fourth triode are NPN type triodes, the third triode is a PNP type triode, and the E poles of the NPN type triodes are grounded in a loop according to the working characteristics of the triodes; the first conversion module is characterized in that: the B pole of the first triode is connected with the QDL level output end and the output end of the first overturning module, the C pole of the first triode is connected with the C pole of the second triode in parallel and is connected with the B pole of the third triode, the E pole of the third triode is connected with a power supply end DC36V in the loop, the C pole of the third triode is connected with the G pole of the PMOS tube, and the C pole of the fourth triode is connected with the G pole of the NMOS and the B pole of the second triode; and the B pole of the fourth triode is connected with the QDH level output end.
The QDL level and the QDH level are provided by an external singlechip.
The clamping circuit module comprises a first diode [ D7] and a second diode [ D11] which are connected in a loop; the positive pole of DC36V in the negative pole connecting loop of a first diode [ D7] is connected with the G pole of the PMOS of the two-bus code sending drive circuit, the negative pole of a second diode [ D11] is connected with the G pole of the NMOS of the two-bus code sending drive circuit, the positive pole of the second diode [ D11] is grounded, and a clamping circuit consisting of the first diode [ D7] and the second diode [ D11] can protect the level values of the G pole of the PMOS and the G pole of the NMOS from exceeding the power supply loop 0-DC36V (no consideration is given to the voltage drop of diode conduction).
It should be noted that, for simplicity of description, the device embodiments are described as a series of acts or combination, but those skilled in the art will recognize that the invention is not limited by the order of acts described, as some steps may be performed in other orders or in parallel according to the invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.
This embodiment can also in time discover the trouble in the circuit except can providing the drive level of heavy current for sending out the sign indicating number circuit, detects and has or not the short circuit condition to in time effectual protection sends out the sign indicating number circuit and can not burnt out.
For the circuit embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.
The embodiments in the present specification are described in a progressive manner, but the execution process and the timing sequence are not completely equivalent to the sequence of the described actions, and the sequence described in the embodiments is only for illustrating the implementation principle and does not limit the execution sequence of the actions.
It will be appreciated by those skilled in the art that embodiments of the invention may be provided as a circuit product. Embodiments of the invention are described with reference to methods, circuits, and circuit diagrams according to embodiments of the invention. Descriptions of such components, functional blocks, and basic circuit diagrams, and those skilled in the art who review this description will realize the functions specified.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it should be further noted that, in this document, relational terms such as transmission of a level signal from a first module or component to a second module or component and the like are used solely to express signal level transfer relationships and do not necessarily require or imply any direct connection relationships or order between the modules or components. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The two-bus code sending circuit with the protection control function provided by the invention is described in detail, a specific example is applied in the description to explain the principle and the implementation mode of the invention, and the description of the above embodiment is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Reference to fig. 3 and 4 is for the purpose of making the circuit diagram implementation easier to understand in conjunction with fig. 2, and is not intended to be used elsewhere.
Claims (7)
1. A bus driver code transmitting circuit, comprising:
the two buses transmit a code driving circuit module, a level signal conversion circuit module and a level signal turnover circuit module;
the two-BUS code sending driving circuit module is connected to the output end of the BUSP, receives a control signal and converts the control signal into a preset level through the level signal conversion circuit module, and controls the two-BUS code sending driving circuit module to output a BUS + level;
the level signal conversion circuit module receives a QDL level and a QDH level, converts the QDL level and the QDH level into a low level and a high level or a high level and a low level through the level signal conversion circuit module, and is connected to the control end of the two-bus driving code sending circuit module;
the level signal turning circuit module receives a START level sent by an external single chip microcomputer and a SHORT-CHECK level sent by an external SHORT circuit detection circuit; the second output of the level signal turnover circuit module is connected to the SHORT level position of the single chip microcomputer and is connected with the input end of the first turnover module of the level signal turnover circuit module, and the first output of the level signal turnover circuit module is connected to the level signal conversion circuit module and is connected with the input end of the second turnover module.
2. The bus driver code transmitting circuit of claim 1, wherein the two-bus code transmitting driver circuit module is a high current power supply circuit, the two-bus code transmitting driver circuit module comprising: PMOS transistor (PMOS) and NMOS transistor (NMOS), PMOS 'S S utmost point connection BUSP position, PMOS' S D utmost point and NMOS 'S D utmost point connect as the output of BUS + level, NMOS' S S ground connection in the return circuit, BUSP provides for external circuit, the control end of two BUS drive code sending circuit module includes: and the G pole of the PMOS and the G pole of the NMOS are connected.
3. The bus driving code transmitting circuit as claimed in claim 1, wherein the level signal flipping circuit module is a 74HC00 gate chip with at least 4 independent modules inside, comprising: the first overturning module is arranged at the input end of the No. 1 pin, the input end of the No. 2 pin and the output end of the No. 3 pin, and the second overturning module is arranged at the input end of the No. 4 pin, the input end of the No. 5 pin and the output end of the No. 6 pin; the first output comprises: the output end of the first flipping module, the second output includes: the output end of the second overturning module; the output end of the 3 rd pin is connected with the input end of the 5 th pin, and the output end of the 6 th pin is connected with the input end of the 2 nd pin.
4. The bus driving code sending circuit of claim 1, wherein the level signal converting circuit module comprises: the circuit comprises a first conversion module, a second conversion module and a clamping circuit module; wherein the first conversion module comprises: the first triode, second triode and third triode, the second conversion module contain: a fourth triode; the clamping circuit comprises: a first diode and a second diode.
5. The bus driving code transmitting circuit according to claims 1, 2, 3 and 4, wherein the first, second and fourth transistors are NPN transistors, the third transistor is PNP transistor, and according to the operating characteristics of the transistors, the E poles of the NPN transistors are all grounded in the loop; the first conversion module includes: the B pole of the first triode is connected with the QDL level output end and is connected with the output end of the first overturning module; the C electrode of the first triode is connected with the C electrode of the second triode in parallel and is connected to the B electrode of the third triode; the E pole of the third triode is connected with a power supply terminal DC36V in a loop, the C pole of the third triode is connected with the G pole of the PMOS tube, and the C pole of the fourth triode is connected with the G pole of the NMOS and the B pole of the second triode; the B pole of the fourth triode is connected with the QDH level output end, and the DC36V is a loop power supply end provided by the outside.
6. The bus driver code sending circuit of claim 1, wherein the QDL level and the QDH level are provided by an external single chip.
7. The bus driving code sending circuit of claim 4, wherein the cathode of the first diode of the clamping circuit module is connected to the DC36V power supply terminal in the loop, the anode of the first diode is connected to the cathode of the second diode, and the anode of the second diode is grounded in the loop.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010260588.XA CN111342836A (en) | 2020-04-03 | 2020-04-03 | Two-bus code sending drive circuit with protection control function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010260588.XA CN111342836A (en) | 2020-04-03 | 2020-04-03 | Two-bus code sending drive circuit with protection control function |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111342836A true CN111342836A (en) | 2020-06-26 |
Family
ID=71186337
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010260588.XA Pending CN111342836A (en) | 2020-04-03 | 2020-04-03 | Two-bus code sending drive circuit with protection control function |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111342836A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112491444A (en) * | 2020-11-16 | 2021-03-12 | 广州保得威尔电子科技股份有限公司 | Two bus signal repeaters |
-
2020
- 2020-04-03 CN CN202010260588.XA patent/CN111342836A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112491444A (en) * | 2020-11-16 | 2021-03-12 | 广州保得威尔电子科技股份有限公司 | Two bus signal repeaters |
| CN112491444B (en) * | 2020-11-16 | 2022-03-11 | 广州保得威尔电子科技股份有限公司 | Two bus signal repeaters |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10461556B2 (en) | Charger, electronic device, and charging method | |
| EP3287905A1 (en) | Circuit, method and apparatus for usb interface sharing | |
| CN111342836A (en) | Two-bus code sending drive circuit with protection control function | |
| CN211656124U (en) | Two bus drive code sending circuits | |
| CN111263892B (en) | Method, device and equipment for detecting functions of adapter and storage medium | |
| CN203161408U (en) | Control device of starter | |
| WO2021212307A1 (en) | Driving system and movable platform | |
| US11146088B2 (en) | Power control circuit and power control method | |
| CN112630648A (en) | High-side parallel contactor adhesion detection circuit of battery system | |
| CN107391411B (en) | Interface circuit based on switch working mode selection | |
| CN202548257U (en) | Fault diagnosis circuit and vehicle-mounted system | |
| CN210640869U (en) | Output circuit and servo driver | |
| CN202261229U (en) | Redundancy output terminal board | |
| CN102426452A (en) | Vehicle-mounted system with long-distance diagnostic function | |
| CN112688379A (en) | Charging method, device, equipment and medium | |
| CN104461999A (en) | Circuit for automatically implementing functions of USB (universal serial bus) boot disks and OTG (on-the-go) function | |
| CN106817052B (en) | Integrated module of starter current limiter and circuit breaker and automobile starting system thereof | |
| CN218940655U (en) | Protection circuit | |
| CN203876651U (en) | Indicating device of automobile stop lamp circuit system | |
| CN112069100B (en) | USB switching method of embedded equipment of Internet of things | |
| CN221842368U (en) | Intelligent circuit breaker | |
| CN209200922U (en) | A kind of intelligent power module isolation interlocking driving circuit | |
| CN219659733U (en) | Broadcasting line control device and fire-fighting broadcasting system | |
| CN213337961U (en) | Switch identification circuit and electric device | |
| CN109624735B (en) | Abnormal vehicle processing method and system applied to dynamic wireless charging system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |