CN111341842B - Heterojunction bipolar transistor structure with firmness - Google Patents
Heterojunction bipolar transistor structure with firmness Download PDFInfo
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- CN111341842B CN111341842B CN201911293346.4A CN201911293346A CN111341842B CN 111341842 B CN111341842 B CN 111341842B CN 201911293346 A CN201911293346 A CN 201911293346A CN 111341842 B CN111341842 B CN 111341842B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
- H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
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Abstract
A heterojunction bipolar transistor structure with firmness is provided, which comprises a substrate and a multilayer structure formed on the substrate, wherein a first emitter cap layer and a second emitter cap layer or only the emitter cap layer are formed between an emitter layer and an ohmic contact layer in the multilayer structure; in the case of providing the first emitter cap and the second emitter cap, the first emitter cap and the second emitter cap are formed over the emitter cap, and the robustness of the HBT is improved by changing the energy gap of the first emitter cap or the second emitter cap; in the case of an emitter cap, the emitter cap is interposed between the emitter and the ohmic contact layer, and the robustness of the HBT is improved by making at least a portion of the emitter cap have an electron affinity less than or equal to that of the emitter.
Description
Technical Field
The present invention relates to a transistor structure, and more particularly to a heterojunction bipolar transistor structure.
Background
The heterojunction bipolar transistor (Heterojunction Bipolar Transistor, HBT) is characterized in that the emitter layer and the base layer are formed by using different semiconductor materials, and a heterojunction is formed at the junction of the emitter layer and the base layer, which is beneficial in that the hole flow of the base layer flowing to the emitter layer is more difficult to cross over the Valence Band (DeltaEv) barrier between the base layer and the emitter layer, especially when the emitter material is InGaP, inGaAsP or InAlGaP, the Valence Band barrier between the emitter layer and the base layer is particularly large, so that the emitter injection efficiency (Emitter Injection Efficiency) is improved, and the current gain of the base can be improved under higher doping concentration, and the high-frequency response characteristic of the HBT is improved. When the HBT is used as a Power Amplifier (PA) for a handheld device, the efficiency of the Power Amplifier (Power Added Efficiency, PAE) is particularly important. In addition to improving the PAE by adjusting the epitaxial growth layer structure of the HBT, the operation voltage or current of the PA can be improved by a circuit design mode on the HBT element so as to effectively improve the PAE. However, HBT elements are susceptible to damage from excessive power when the HBT is operated at high voltage or high current, such as excessive power that bounces back when the PA and antenna are mismatched, resulting in robustness of the HBT and PA. (Ruggedness) is poor, and therefore, it is an important issue to effectively increase the robustness (Ruggedness) of heterojunction bipolar transistors under high voltage or high current (i.e., high power density) operation.
Fig. 1 is a schematic view of a HBT structure according to the prior art, which shows HBT structure 1 in which sub-collector layer 20, collector layer 30, base layer 40, emitter layer 50, emitter cap 60, and ohmic contact layer 70 are stacked in order from bottom to top on substrate 10. In general, emitter layer 50 is formed of InGaP and emitter cap 60 is formed of GaAs, and there is a large discontinuity (Δec) of the conductive band at the junction of the two, thus forming a large electron potential barrier, so that when electrons pass from emitter cap 60 to emitter layer 50, the potential barrier of the conductive band blocks the flow of electrons, resulting in a large emitter resistance (Re), as shown in fig. 3. To reduce this emitter resistance, high doping concentration of N-type GaAs is typically used in emitter cap 60. However, when the emitter cap 60 with high doping concentration is used, the breakdown voltage (BVebo) of the emitter-base junction is lowered and the capacitance (Cbe) of the emitter-base junction is raised, thereby adversely affecting the robustness and high frequency Response (RF) characteristics of the HBT. In order to increase the breakdown voltage of the emitter-base junction and reduce the emitter-base junction capacitance, the thickness of the emitter layer 50 is increased. However, this method not only increases the difficulty of the HBT process, but also increases the resistance of the emitter layer 50 with increasing thickness, thereby affecting the RF characteristics of the HBT.
Disclosure of Invention
The present invention has been made to overcome the above-mentioned problems, and provides a robust heterojunction bipolar transistor structure, which can effectively raise the breakdown voltage of the emitter-base junction and lower the capacitance of the emitter-base junction without increasing or slightly increasing the emitter resistance, and can further improve the overall performance and design flexibility of the PA by utilizing the characteristics that aluminum (Al) containing semiconductor materials such as aluminum gallium arsenide (AlGaAs) and the like have higher energy gaps and the resistivity rapidly increases with the temperature rise at high temperatures, so as to improve the robustness of the PA in high power density operation, improve the RF characteristics, and further improve the efficiency and Linearity (Linearity) of the PA by changing the HBT design mode, for example, reducing Re, and sacrificing the partially increased PA robustness.
In an embodiment of an HBT comprising a first emitter cap and a second emitter cap, a robust heterojunction bipolar transistor structure comprises: a substrate; a sub-collector layer comprising an N-type III-V semiconductor material on the substrate; a collector layer on the sub-collector layer, the collector layer comprising a III-V semiconductor material; a base layer on the collector layer, the base layer comprising a P-type III-V semiconductor material; an emitter layer on the base layer, the emitter layer comprising at least one of an N-type semiconductor material of InGaP, inGaAsP and InAlGaP; a first emitter cap, on the emitter layer, the first emitter cap comprising III-V semiconductor material; a second emitter cap, on the first emitter cap, the second emitter cap comprising III-V semiconductor material; and an ohmic contact layer comprising an N-type III-V semiconductor material on the second emitter cap, wherein a change in an energy gap of the first emitter cap or the second emitter cap in a direction of the second emitter cap toward the emitter layer comprises at least one of a gradual change in an energy gap from small to large and an energy gap leveling.
In an embodiment, the first emitter cap comprises at least one semiconductor material selected from the group consisting of: al (Al) x Ga 1-x As、Al x Ga 1-x As 1-y N y 、Al x Ga 1-x As 1-z P z 、Al x Ga 1-x As 1-w Sb w 、In r Al x Ga 1-x-r As and In r Al x Ga 1-x-r P, wherein x is 0 < x < 1; or the maximum value of x is 0.03-0.8; alternatively, the maximum value of x is 0.05.ltoreq.x.ltoreq.0.4 and y, z, r, w.ltoreq.0.1.
In an embodiment, the first emitter cap or the second emitter cap comprises at least one uniform layer.
In one embodiment, the first emitter cap or the second emitter cap comprises at least one graded layer, and the energy gap change of the graded layer comprises at least a gradual change from small to large in the direction of the second emitter cap toward the emitter layer.
In one embodiment, the first emitter cap or the second emitter cap comprises a combination of at least one uniform layer and at least one graded layer, and the energy gap change of the graded layer comprises at least a gradual change from small to large in the direction of the second emitter cap toward the emitter layer.
In one embodiment, the thickness of the first emitter cap or the second emitter cap is 1nm to 500nm; the concentration of N-type doping of the first emitter cap or the second emitter cap is 1×10 15 /cm 3 ～5×10 18 /cm 3 。
In one embodiment, the emitter layer is made of a material having an InGaP emission wavelength of 694nm or less, an InGaAsP emission wavelength of 710nm or less, and an InAlGaP emission wavelength of 685nm or less by photo luminescence spectroscopy (PL).
In one embodiment, the emitter layer is made of a material having an InGaP emission wavelength of 685nm or less, an InGaAsP emission wavelength of 695nm or less, and an InAlGaP emission wavelength of 675nm or less by photo-fluorescence spectroscopy.
In one embodiment, the emitter layer is made of a material having an InGaP emission wavelength of 675nm or less, an InGaAsP emission wavelength of 685nm or less, and an InAlGaP emission wavelength of 665nm or less by photo-fluorescence spectroscopy.
In one embodiment, the device further comprises an intermediate composite layer between the substrate and the sub-collector layer.
In one embodiment, the intermediate composite layer comprises at least one buffer layer, and the buffer layer comprises a III-V semiconductor material.
In one embodiment, the intermediate composite layer comprises a field effect transistor.
In one embodiment, the intermediate composite layer includes a dummy hemt formed on the substrate: at least one buffer layer, a first doped layer, a first spacer layer, a channel layer, a second spacer layer, a second doped layer, a Schottky layer, an etch stop layer and a cap layer for ohmic contact. The buffer layer comprises a III-V semiconductor material; the first doped layer or the second doped layer comprises at least one N-type semiconductor material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the first spacer layer or the second spacer layer comprises at least one semiconductor material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the channel layer comprises at least one material selected from the group consisting of: gaAs, inGaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the schottky layer comprises at least one material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the etch stop layer comprises at least one material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaAsP, inGaP and AlAs; the cap layer comprises an N-type III-V semiconductor material.
In one embodiment, the semiconductor device further comprises a spacer layer between the first emitter cap layer and the emitter layer, or between the first emitter cap layer and the second emitter cap layer; the spacer layer comprises an N-type doped or undoped III-V semiconductor material.
In one embodiment, the spacer layer has a thickness of 0.2nm to 200nm; the spacer layer has an N-type doping concentration of 1×10 15 /cm 3 ～5×10 18 /cm 3 。
In one embodiment, the spacer layer comprises at least one material selected from the group consisting of: alGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaAs, inGaP, inGaAsP, inGaAs, gaAsSb, inAlGaP and GaAs.
In one embodiment, the gap variation of the spacer layer includes at least one of a small to large gradient of the gap, a flat gap, and a large to small gradient of the gap.
The following examples relate to electron affinities of emitter cap layers.
A robust heterojunction bipolar transistor structure comprises: a substrate; a sub-collector layer comprising an N-type III-V semiconductor material on the substrate; a collector layer on the sub-collector layer, the collector layer comprising a III-V semiconductor material; a base layer on the collector layer, the base layer comprising a P-type III-V semiconductor material; an emitter layer on the base layer, the emitter layer comprising an N-type III-V semiconductor material; an emitter cap, on the emitter cap, the emitter cap comprising III-V semiconductor material; and an ohmic contact layer on the emitter cap layer, the ohmic contact layer comprising an N-type III-V semiconductor material; wherein at least a portion of the emitter cap is a current clamping layer having an electron affinity less than or equal to the electron affinity of the emitter layer.
Wherein the emitter layer comprises at least one N-type semiconductor material selected from the group consisting of: inGaP, inGaAsP, alGaAs and InAlGaP. The current clamping layer comprises at least one material selected from the group consisting of: alGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaAs, inGaP, inGaAsP, gaAsSb, inAlGaP and GaAs.
In one embodiment, the emitter cap comprises at least one uniform layer.
In one embodiment, the emitter cap layer comprises at least one graded layer, and the energy gap change of the graded layer comprises at least a gradual change from small to large in a direction from the ohmic contact layer to the emitter layer.
In one embodiment, the emitter cap layer comprises a combination of at least one uniform layer and at least one graded layer, and the energy gap variation of the graded layer comprises at least a gradual change from small to large in the direction of the ohmic contact layer to the emitter layer.
In one embodiment, the emitter cap has a thickness of 1nm to 500nm; the N-type doping concentration of the emitter cap is 1×10 15 /cm 3 ～5×10 18 /cm 3 。
In one embodiment, the emitter layer is made of a material having an InGaP emission wavelength of 694nm or less, an InGaAsP emission wavelength of 710nm or less, and an InAlGaP emission wavelength of 685nm or less by photo luminescence spectroscopy (PL).
In one embodiment, the emitter layer is made of a material having an InGaP emission wavelength of 685nm or less, an InGaAsP emission wavelength of 695nm or less, and an InAlGaP emission wavelength of 675nm or less by photo-fluorescence spectroscopy.
In one embodiment, the emitter layer is made of a material having an InGaP emission wavelength of 675nm or less, an InGaAsP emission wavelength of 685nm or less, and an InAlGaP emission wavelength of 665nm or less by photo-fluorescence spectroscopy.
In one embodiment, the device further comprises an intermediate composite layer between the substrate and the sub-collector layer.
In one embodiment, the intermediate composite layer comprises at least one buffer layer, and the buffer layer comprises a III-V semiconductor material.
In one embodiment, the intermediate composite layer comprises a field effect transistor.
In one embodiment, the intermediate composite layer includes a dummy hemt formed on the substrate: at least one buffer layer, a first doped layer, a first spacer layer, a channel layer, a second spacer layer, a second doped layer, a Schottky layer, an etch stop layer and a cap layer for ohmic contact. The buffer layer comprises a III-V semiconductor material; the first doped layer or the second doped layer comprises at least one N-type semiconductor material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the first spacer layer or the second spacer layer comprises at least one semiconductor material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the channel layer comprises at least one material selected from the group consisting of: gaAs, inGaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the schottky layer comprises at least one material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the etch stop layer comprises at least one material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaAsP, inGaP and AlAs; the cap layer comprises an N-type III-V semiconductor material.
In one embodiment, the emitter layer further comprises a spacer layer, the spacer layer is located between the emitter cap layer and the emitter layer, or the spacer layer is located between the emitter cap layer and the ohmic contact layer; the spacer layer comprises an N-type doped or undoped III-V semiconductor material.
In one embodiment, the spacer layer has a thickness of 0.2nm to 200nm; the spacer layer has an N-type doping concentration of 1×10 15 /cm 3 ～5×10 18 /cm 3 。
In one embodiment, the spacer layer comprises at least one material selected from the group consisting of: alGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaAs, inGaP, inGaAsP, inGaAs, gaAsSb, inAlGaP and GaAs.
In one embodiment, the gap variation of the spacer layer includes at least one of a small to large gradient of the gap, a flat gap, and a large to small gradient of the gap.
Drawings
Figure 1 is a schematic diagram of a prior art HBT structure.
Fig. 2 is a schematic diagram of the energy band between the emitter cap and the emitter layer in the HBT structure of the prior art.
Fig. 3 is a schematic diagram of a robust HBT structure according to a first embodiment described, the HBT of the first embodiment comprising a first emitter cap and a second emitter cap.
Fig. 4a to 4c are schematic diagrams of energy bands between an emitter cap and an emitter layer in an HBT structure according to one embodiment.
Fig. 5 a-5 b are schematic diagrams of energy bands between an emitter cap and an emitter layer in an HBT structure according to one embodiment.
Fig. 6a to 6c are schematic diagrams of energy bands between an emitter cap and an emitter layer in an HBT structure according to one embodiment.
Fig. 7 is a photo-induced fluorescence (PL) spectrum of indium gallium phosphide (InGaP) as an emitter layer material according to an embodiment.
FIG. 8 is a graph of emitter-base junction carrier concentration by C-V measurement using indium gallium phosphide with varying degrees of atomic ordering as the emitter layer.
Fig. 9 is a graph showing a comparison of the safe operating area (safe operation area, SOA) of the HBT according to fig. 6c with a HBT of the prior art. The vertical axis is collector current density Jc (kA/cm) 2 ) The horizontal axis is collector-emitter voltage Vce (Volt).
Fig. 10 is a schematic diagram of a robust HBT structure according to a second embodiment being described, wherein a portion of the emitter cap of the second embodiment is a current clamping layer having an electron affinity that is less than or equal to the electron affinity of the emitter layer.
Fig. 11a is a schematic diagram showing the relationship between the conductive band of the current clamping layer and the conductive band of the emitter layer.
Fig. 11b is a schematic diagram showing the relationship between the conductive band of the current clamping layer and the conductive band of the emitter layer.
Fig. 11c is a schematic diagram showing the relationship between the conductive strips of the current clamping layer and the conductive strips of the emitter layer.
Fig. 11d is a schematic diagram showing the relationship between the conductive band of the current clamping layer and the conductive band of the emitter layer.
Symbol description
1 HBT structure
2. 3 HBT structure
10. Substrate board
20. 200 times collector layer
30. 300 collector layer
40. 400 base layer
50. 500 emitter layer
60. 600 emitter cap
62. First emitter cap
64. Second emitter cap
70. 700 ohmic contact layer.
Detailed Description
The embodiments of the present invention will be described in detail below with reference to the drawings and reference numerals so as to enable those skilled in the art to practice the invention after studying the specification.
Examples of specific elements and arrangements thereof are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to limit the scope of the invention. For example, where a first epitaxially grown layer is referred to in the description as being over a second epitaxially grown layer, it may include embodiments in which the first epitaxially grown layer is in direct contact with the second epitaxially grown layer, and may also include embodiments in which other elements or epitaxially grown layers are formed without direct contact therebetween. Moreover, repeated reference numerals and/or symbols may be used in different embodiments to describe various embodiments for simplicity and clarity and do not represent a particular relationship between the different embodiments and/or configurations discussed.
Moreover, spatially relative terms, such as "under," "below," "lower," "above," "upper," and the like, may be used herein to facilitate a description of a relationship between one element(s) or feature(s) and another element(s) or feature(s) in the drawings. These spatial relationship terms include the different orientations of the device in use or operation, and the orientations depicted in the drawings.
The present description provides different examples to illustrate the technical features of different embodiments. For example, reference throughout this specification to "some embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, appearances of the phrase "in some embodiments" appearing in various places throughout the specification are not necessarily all referring to the same embodiment.
Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. Further, as used herein, the terms "comprising," having, "" wherein, "or variations of the foregoing are intended to include the corresponding features as the term" comprising.
Furthermore, a "layer" may be a single layer or comprise multiple layers; and a "portion" of an epitaxially grown layer may be one layer of the epitaxially grown layer or a plurality of layers adjacent to each other.
Referring to fig. 3, fig. 3 is a schematic diagram of a robust HBT structure according to the first embodiment described, as shown in fig. 3, HBT structure 2 comprises a substrate 10, a sub-collector layer 20, a collector layer 30, a base layer 40, an emitter layer 50, a first emitter cap 62, a second emitter cap 64, and an ohmic contact layer 70.
In HBT structure 2, sub-collector layer 20 is on substrate 10, sub-collector layer 20 mainly comprising an N-type III-V semiconductor material; collector layer 30 is on sub-collector layer 20, collector layer 30 comprising primarily a III-V semiconductor material; the base layer 40 is on the collector layer 30, the base layer 40 mainly comprising a P-type III-V semiconductor material; the emitter layer 50 is on the base layer 40, and the emitter layer 50 mainly comprises at least one N-type semiconductor material of InGaP, inGaAsP and InAlGaP; first emitter cap 62 is over emitter layer 50, first emitter cap 62 comprising primarily an N-type group III-V semiconductor material; second emitter cap 64 is over first emitter cap 62, second emitter cap 64 comprising primarily an N-type group III-V semiconductor material; an ohmic contact layer 70 is on the second emitter cap 64, the ohmic contact layer 70 mainly comprising an N-type III-V semiconductor material.
The materials of the sub-collector layer 20, the collector layer 30, the base layer 40, the second emitter cap 64, and the ohmic contact layer 70 are not limited as long as they are semiconductor materials capable of operating the HBT structure 2, but appropriate materials may be selected as needed; the sub-collector layer 20 comprises at least one of N-type GaAs, alGaAs, inGaP and InGaAsP; the collector layer 30 comprises at least one of GaAs, alGaAs, inGaP and InGaAsP, and the semiconductor materials are doped P-type, N-type or undoped, but preferably at least a portion of the semiconductor materials are doped N-type; the base layer 40 comprises at least one of P-type GaAs, gaAsSb, inGaAs and InGaAsN; the second emitter cap 64 comprises at least one of N-type GaAs, alGaAs, inGaP, inGaAsP, alGaAsN, alGaAsP, alGaAsSb, inAlGaAs, inAlGaP and InGaAs; and the ohmic contact layer 70 includes at least one of N-type GaAs and InGaAs.
Wherein first emitter cap 62 or second emitter cap 64 may include at least one of a gradual change in energy gap from small to large and a leveling of energy gap in the direction of second emitter cap 64 toward emitter layer 50 (i.e., in the direction of the ohmic contact layer toward the emitter layer) by a composition change in the semiconductor material such that the energy gap of first emitter cap 62 or second emitter cap 64; the energy gap of the gradual change of the energy gap of first emitter cap 62 may start from the energy gap of second emitter cap 64, but is not limited thereto; or the energy gap of the second emitter cap 64 with the gradual energy gap may start from the energy gap of the ohmic contact layer, but is not limited thereto. This reduces or eliminates the conduction band-stop encountered by the HBT's emitter-base junction when forward biased, electrons passing from the ohmic contact layer 70 to the emitter layer 50, thereby improving the high frequency response and robustness of the HBT.
The energy gap variation of first emitter cap 62 or second emitter cap 64 comprises at least a uniform layer, a graded layer, or a uniform layer and a graded layer.
Specifically, in one embodiment, first emitter cap 62 comprises at least one graded layer formed of, but not limited to, at least one undoped or N-type semiconductor material of Al composition graded AlGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaP and inagaas, and the Al composition is graded from small to large in the direction of second emitter cap 64 toward emitter layer 50. When the Al content is greater, the energy gap of first emitter cap 62 is greater, and therefore the energy gap of first emitter cap 62 gradually increases from small to large in the direction from second emitter cap 64 toward emitter layer 50. Thus, when first emitter cap 62 comprises a graded layer and the bandgap of the graded layer is graded linearly, then as shown in fig. 4a, the bandgap of first emitter cap 62 exhibits a linear grading between second emitter cap 64 and emitter layer 50, so that when the emitter-base junction of the HBT is forward biased, the conduction band barrier encountered becomes insignificant as electrons pass between second emitter cap 64 and emitter layer 50, thus effectively reducing emitter resistance.
Although fig. 4a shows an embodiment in which the energy gap of the first emitter cap is linearly graded, the energy gap grading of the graded layer may be adjusted to a gradient profile grading (non-linear) by composition grading, so that the energy gap of the first emitter cap 62 is non-linear graded to effectively reduce the emitter resistance. The result is shown in FIG. 4b.
Alternatively, the first emitter cap 62 may be more than two graded layers, and fig. 4c shows an embodiment in which the first emitter cap 62 includes one linearly varying bandgap graded layer and one non-linearly varying bandgap graded layer, but is not limited thereto, and may include multiple linearly varying bandgap graded layers, multiple non-linearly varying bandgap graded layers, or multiple bandgap graded layers formed by a combination of linear and non-linear variations, as desired.
In addition, although fig. 4a to 4c only show embodiments in which the conductive band of the first emitter cap 62 is finally at the same height as the conductive band of the emitter layer 50, it is also possible to make the conductive band of the first emitter cap 62 lower than the conductive band of the emitter layer 50 (first type band bonding method, type I band alignment) or make the conductive band of the first emitter cap 62 higher than the conductive band of the emitter layer 50 (second type band bonding method, type II band alignment) by adjusting the composition of the materials.
Further, a first emitter cap is describedMaterial composition ratio in layer 62. With Al 0.03 Ga 0.97 As 0.9 P 0.1 For example (Al x Ga 1-x As 1-z P z X=0.03 and z=0.1), which shows that when the total mole number of group III elements (Al and Ga) is equal to the total mole number of groups V (As and P), the mole number ratio between the elements is Al: ga: as: p: =3: 97:90:10. regarding the composition of Al, "the highest value of x is 0.03.ltoreq.x.ltoreq.0.8" means that the Al content of first emitter cap 62 may be different at each place due to the gradual composition, and even more may not contain Al at least one place, but as long as the Al content at one place is the highest and the highest content falls at 0.03.ltoreq.x.ltoreq.0.8. When the highest content of Al component in the first emitter cap 62 is x.gtoreq.0.03, the electron potential barrier between the first emitter cap 62 and the emitter layer 50 can be reduced or even a second type energy band bonding mode can be formed, and the potential barrier between the first emitter cap 62 and the emitter layer can be eliminated compared with the existing GaAs emitter cap; when the highest content of the Al component is less than or equal to 0.8, the risk of reduced reliability of the HBT due to excessive Al component can be avoided or reduced.
In one embodiment, first emitter cap 62 comprises at least one uniform layer of substantially uniform material and is formed primarily of undoped or N-type semiconductor material of at least one of AlGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaP and inagaas. When first emitter cap 62 is a uniform layer, i.e., with a fixed composition, the band diagram is shown in fig. 5a, the energy gap of first emitter cap 62 is in a flat state, and by appropriate material matching and selection, the potential of the conductive band can be between second emitter cap 64 and the conductive band of emitter layer 50. Fig. 5a also shows that the conduction band between second emitter cap 64 and emitter layer 50 changes stepwise by first emitter cap 62, so that the conduction band barrier to be overcome each time an electron passes through becomes relatively small, thereby enabling the emitter resistance between second emitter cap 64 and emitter layer 50 to be reduced.
Furthermore, first emitter cap 62 may be more than two uniform layers, and fig. 5b shows an embodiment in which first emitter cap 62 comprises two uniform layers, the potential height of the conductive strips of which increases layer by changing the composition (e.g., by increasing the Al content), so that each of the conductive strips between second emitter cap 64 and emitter layer 50 has a relatively smaller barrier to each of the conductive strips, thereby enabling a reduction in emitter resistance between second emitter cap 64 and emitter layer 50.
Furthermore, although fig. 5a, 5b only show embodiments in which the conductive band of first emitter cap 62 is finally lower than the conductive band of emitter layer 50, it is also possible to make the conductive band of first emitter cap 62 equal in height to the conductive band of emitter layer 50 or to make the conductive band of first emitter cap 62 higher than the conductive band of emitter layer 50 by adjusting Al or other composition.
In one embodiment, first emitter cap 62 comprises a combination of at least one uniform layer formed primarily of at least one undoped or N-type semiconductor of AlGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaP and inagaas and at least one graded layer formed primarily of at least one undoped or N-type semiconductor material of AlGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaP and inagaas graded in composition, and the change in the energy gap of the graded layer comprises at least a small to large gradation in the direction of second emitter cap 64 toward emitter layer 50. As shown in fig. 6a, in the direction from the second emitter cap 64 to the emitter layer 50, the first emitter cap 62 comprises a graded layer with a linear bandgap gradient and a uniform layer in sequence, and the conductive band between the second emitter cap 64 and the emitter layer 50 is first changed with a linear increase in potential energy and then leveled. In addition, as shown in fig. 6b, in the case that the first emitter cap 62 sequentially includes a graded layer with a linear bandgap, a uniform layer, and a graded layer with a linear bandgap, the conductive band between the second emitter cap 64 and the emitter layer 50 can be increased linearly, then leveled for a certain period, and then increased linearly, wherein the slopes of the two linear increases can be the same or different. In addition, the combination of at least one uniform layer and at least one graded layer is not limited thereto, and the multi-uniform layer and the multi-graded layer can be alternatively stacked to form an embodiment with multi-level energy gap and energy gap graded. Alternatively, as shown in FIG. 6c, first emitter cap 62 sequentially comprises a layer of linearity The graded layer with graded energy gap and a uniform layer, the conductive band of the uniform layer of first emitter cap 62 being higher than the conductive band of emitter layer 50; the first emitter cap of the HBT of fig. 6c comprises a layer of graded AlGaAs with a layer of uniform AlGaAs; the composition gradient means that the Al composition of the first emitter cap increases from 0 to 0.2 (the x value is gradually changed from 0 to 0.2) in the direction from the second emitter cap to the emitter layer, the composition uniformity means that the Al composition is 0.2, and the doping concentration of the first emitter cap of the HBT is about 1×10 18 /cm 3 。
According to the above description, the energy gap of the first emitter cap 62 or the second emitter cap 64 can be changed by adjusting the composition of the semiconductor material, and the energy gap of the second emitter cap 64 or the ohmic contact layer 70 can be changed in at least one of linear, nonlinear, and stepwise manners or the combination thereof. Wherein the energy gap of first emitter cap 62 or second emitter cap 64 comprises at least one or more energy gap levels before, during, or after the gradual change from small to large.
Regarding the conditions for fabricating the first emitter cap 62, considering the difficulty in fabrication, the degree of improvement in the robustness and the influence on the emitter resistance, the thickness of the first emitter cap 62 may be 1nm to 500nm, preferably 10nm to 300nm, and most preferably 20nm to 200nm; taking into account the effect of the doping concentration on the breakdown voltage and the emitter-base junction capacitance, the concentration of N-type doping in the first emitter cap 62 is 1×10 15 /cm 3 ～5×10 18 /cm 3 Preferably 1X 10 17 /cm 3 ～4×10 18 /cm 3 Most preferably 3X 10 17 /cm 3 ～3×10 18 /cm 3 . While second emitter cap 64 may have a thickness of 1nm to 500nm, second emitter cap 64 has a concentration of 1X 10N-type doping 15 /cm 3 ～5×10 18 /cm 3 。
According to one embodiment, first emitter cap 62 or second emitter cap 64 can reduce or eliminate the conductive band barrier of electrons from ohmic contact layer 70 to emitter layer 50 by composition adjustment (e.g., adjusting Al composition) in the semiconductor material, and in particular, forming Type ii band-bonding can reduce emitter resistance (Re). Therefore, the first emitter cap 62 does not need to use a high N-type doping concentration, which not only greatly increases the emitter-base junction breakdown voltage without increasing the emitter resistance, but also greatly reduces the emitter-base junction capacitance to improve the high frequency response characteristics or robustness of the HBT. Furthermore, since the emitter cap of the semiconductor material containing Al is generally larger than the existing GaAs emitter cap, the emitter cap with larger energy gap can further increase the emitter-base junction breakdown voltage and further increase the robustness of the HBT. Meanwhile, since the first emitter cap 62 containing Al is selected to be mainly composed of a semiconductor material such as AlGaAs, a material such as AlGaAs has a material characteristic that its resistivity rises at a high temperature relatively fast with a temperature rise compared to GaAs. When the HBT is operated at a high power density, the emitter temperature increases, and the first emitter cap 62 or the second emitter cap 64 using a material mainly comprising AlGaAs rapidly increases due to the rapid increase in the emitter temperature at a high power density operation, thereby functioning as a protection for the HBT and increasing the robustness of the HBT. The HBT does not additionally increase the excessive emitter resistance at the normal operating temperature for the above reasons and thus does not significantly adversely affect the high frequency response characteristics of the HBT and PA, since the first emitter cap 62 or the second emitter cap 64 of the material mainly comprising AlGaAs at the normal operating power density.
In addition, the material InGaP, inGaAsP or InAlGaP of the emitter layer 50 has a different degree of atomic order (Ordring Effect), which causes a spontaneous polarization Effect (Spontaneous Polarization), and the material of higher degree of atomic order (High Ordering) forms a larger spontaneous polarization Effect, causes a smaller energy gap of the material and forms a stronger electric field, and the formed strong electric field may deplete the carriers of the first emitter cap 62 on the emitter layer 50, thus causing an increase in emitter resistance to affect the RF characteristics of PA. Therefore, under the appropriate application of the Low order atomic arrangement (Low order) InGaP, inGaAsP and the InAlGaP emitter layer 50, the carrier depletion of the first emitter cap 62 can be reduced, thereby avoiding the significant adverse effect on the PA characteristic caused by the rising Re, or avoiding the high design complexity of the first emitter cap 62 caused by the absence of the carrier under the influence of the electric field of the emitter layer 50, thereby improving the overall electrical characteristics or robustness of the HBT and the PA.
Thus, in one embodiment, to determine the degree of atomic ordering in emitter layer 50, evaluation is primarily performed using Photo Luminescence (PL) spectroscopy. In the method, firstly, the material of the emitter layer 50 is epitaxially grown to a thickness of hundreds of nanometers on a substrate by the same process as that of the emitter layer 50, then light with a specific wavelength is emitted to the emitter layer material, the emitter layer material absorbs the light and then re-emits the light to the outside, and finally the degree of orderly arrangement of atoms in the emitter layer material is estimated by measuring the wavelength of the emitted light. When the degree of orderly arrangement of atoms in the emitter layer is higher, the energy gap is relatively small, so that the wavelength emitted by the material through energy gap transition is relatively long during PL measurement; in contrast, when the degree of atomic ordering is lower, the emitted wavelength is relatively short.
FIG. 7 is a PL spectrum of indium gallium phosphide (InGaP) measured by a photo-induced fluorescence spectroscopy. The emission spectrum wavelength of PL is 694nm longer because InGaP with a high atomic order has a small energy gap, while the emission spectrum wavelength of PL is 659nm shorter because InGaP with a low atomic order has a large energy gap. In general, in the case of the ordered arrangement of the atoms of low degree, the emission wavelength of InGaP may be as short as 640nm, the emission wavelength of ingaasp may be 645nm and the emission wavelength of InAlGaP may be 635nm, and in order to avoid the generation of a strong electric field due to the ordered arrangement of the atoms of high degree, the emission wavelength of the emitter layer 50 composed of InGaP may be 694nm or less, preferably 685nm or less, more preferably 675nm or less. Similarly, the emission wavelength of InGaAsP constituting the emitter layer 50 may be 710nm or less, preferably 695nm or less, and more preferably 685nm or less. The InAlGaP constituting the emitter layer 50 has an emission wavelength of 685nm or less, preferably 675nm or less, more preferably 665nm or less.
FIG. 8 shows indium gallium phosphide (InGaP) as an emitter layer using varying degrees of atomic orderThe carrier concentration of the emitter-base junction is obtained by C-V measurement, wherein the base layer is P-type GaAs, the thickness is 80nm, and the carrier concentration is 4×10 19 /cm 3 The emitter layer is InGaP with different atoms arranged orderly, and the thickness is 40nm.
The first emitter cap layer is 6nm thick of Al 0.15 Ga 0.85 As and Al with thickness of 30nm x Ga 1-x An As bandgap graded layer (x value graded from 0.15 to 0) is formed sequentially over the InGaP emitter layer, it can be seen from fig. 8 that the InGaP emitter layer using a higher atomic order forms a stronger electric field due to a greater spontaneous polarization effect, so As to cause more depletion of the first emitter cap carriers. Depletion of the carrier causes an increase in emitter resistance, which requires an increase in the N-type doping concentration of the first emitter cap to reduce depletion of the first emitter cap carrier, but this in turn causes a drop in the emitter-base junction breakdown voltage and an increase in the emitter-base junction capacitance, which negatively affects the robustness or high frequency response characteristics of the HBT and PA. The emitter-base junction carrier concentration profile using a lower atomic order InGaP emitter layer shows that under the same doping concentration of the emitter layer and the first emitter cap, the first emitter cap carriers are less depleted due to less spontaneous polarization effects and thus less negative impact on Re.
Referring to fig. 9, fig. 9 is a diagram showing a comparison of the safe operating area (safe operation area, SOA) of the HBT according to fig. 6c with a HBT of the prior art. The HBT of the prior art comprises an emitter cap, the total thickness of the first emitter cap and the second emitter cap of the HBT of fig. 6c being approximately equal to the total thickness of the emitter cap of the HBT of the prior art; in FIG. 9, the material of the emitter cap of the prior art HBT is N-type GaAs with an N-type doping concentration of approximately 4.0X10 18 /cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The first emitter cap of the HBT of fig. 6c comprises a layer of graded AlGaAs with a layer of uniform AlGaAs; the composition gradient means that the Al composition of the first emitter cap increases from 0 to 0.2 (the x value is gradually changed from 0 to 0.2) in the direction from the second emitter cap to the emitter layer, the composition uniformity means that the Al composition is 0.2, and the doping concentration of the first emitter cap of the HBT is about 1×10 18 /cm 3 。
It is clear from the figure that the SOA of the HBT of fig. 6c is larger than that of the HBT of the prior art, and that the robustness of the HBT is significantly improved.
In one embodiment, robust HBT structure 2 can further comprise an intermediate composite layer (not shown) formed between substrate 10 and sub-collector layer 20 and formed of a semiconductor material.
In one embodiment, the intermediate composite layer includes at least one buffer layer, and the buffer layer is formed of a III-V semiconductor material.
In one embodiment, the intermediate composite layer comprises a field effect transistor.
In one embodiment, the intermediate composite layer comprises a dummy hemt that can be formed sequentially on the substrate 10 (the following structure is not shown): at least one buffer layer, a first doped layer, a first spacer layer, a channel layer, a second spacer layer, a second doped layer, a Schottky layer, an etch stop layer and a cap layer for ohmic contact; the buffer layer is mainly formed by III-V semiconductor materials, and the first doping layer or the second doping layer is mainly formed by at least one N-type semiconductor material of GaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the first spacer layer or the second spacer layer is formed by at least one semiconductor material of GaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the channel layer is formed by at least one semiconductor material of GaAs, inGaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the schottky layer is formed by at least one semiconductor material of GaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the etch stop layer is formed of at least one of GaAs, alGaAs, inAlGaP, inGaAsP, inGaP and AlAs semiconductor material and the cap layer is formed of an N-type III-V semiconductor material.
In one embodiment, robust HBT structure 2 further comprises a Spacer (not shown) formed between first emitter cap 62 and emitter layer 50 or between first emitter cap 62 and second emitter cap 64, the Spacer comprising an N-doped or undoped III-V semiconductor material. The spacer layer can be used for example, but not limited to, adjusting the energy gap variation, reducing the process difficulty,The process yield is improved; used as an etching stopping layer and an etching identification layer in the etching process; and may also act as a quantum well layer. Preferably, the thickness of the spacer layer is 0.2 nm-200 nm; the N-type doping concentration may be 1×10 15 /cm 3 ～5×10 18 /cm 3 Preferably 1X 10 17 /cm 3 ～4×10 18 /cm 3 Most preferably 3X 10 17 /cm 3 ～3×10 18 /cm 3 。
The material of the spacer layer is not limited as long as it is an existing N-type doped or undoped III-V semiconductor material, but may be preferably formed of at least one of AlGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaAs, inGaP, inGaAsP, inGaAs, gaAsSb, inAlGaP and GaAs N-type doped or undoped semiconductor material.
Preferably, the energy gap of the spacer layer is changed by a composition change in the semiconductor material such that the spacer layer comprises at least one of a gradual change in energy gap from small to large and a gradual change in energy gap from large to small in the direction of the first emitter cap 62 toward the emitter layer 50. However, the spacer layer is not limited to a graded layer having a varying composition, but may be a uniform layer such that the spacer layer exhibits a flat energy gap. The spacer layer may also be a combination of graded layers and uniform layers such that the change in the energy gap of the spacer layer in the direction of first emitter cap 62 toward emitter layer 50 may include at least one of a small to large graded energy gap, a flat energy gap, and a large to small graded energy gap. Likewise, the energy gap gradual change method may further include at least one of linear gradual change, nonlinear gradual change and stepwise gradual change.
For example, where the conductive band of first emitter cap 62 is lower than the conductive band (Type I band alignment) of emitter layer 50, a spacer layer comprising at least a gradual change in energy gap from small to large may be used to reduce or eliminate the conductive band barrier between first emitter cap 62 and emitter layer 50. In addition, when the conductive band of the spacer layer is higher than the conductive band (Type II band alignment) of the emitter layer 50 due to the introduction of the gap-graded spacer layer, electrons pass between the spacer layer and the emitter layer 50 without encountering potential barriers of the conductive band, and as a result, an increase in emitter resistance is not caused.
In the case where the conductive band of first emitter cap 62 is higher than the conductive band (Type II band alignment) of emitter layer 50, if a spacer layer including at least a gradual change in energy gap from large to small is used as an etch stop layer or the like, it can be found that the conductive band of the spacer layer can be joined with the conductive band of emitter layer 50. In addition, when the spacer layer is added, the conductive band of the spacer layer may be lower than the emitter layer 50, and a conductive band barrier may be generated between the spacer layer and the emitter layer 50, but since the spacer layer may serve as a quantum well, the electron energy level of the conductive band of the spacer layer may be quantized, and as a result, the energy level of the electron potential of the spacer layer may be increased. The conduction band barrier encountered becomes lower as electrons pass between the spacer layer and the emitter layer 50, so that the emitter resistance does not increase significantly. In addition, a spacer layer having a gradual change from small to large energy gap is introduced to make the conductive band of the spacer layer higher than that of the emitter layer 50 in response to the process, but the same result does not cause a significant increase in emitter resistance.
Furthermore, the above description is intended to enable those skilled in the art to understand: when the spacer layer is used in the improved process, no significant increase in emitter resistance is substantially caused no matter what mode the bandgap is graded (i.e., at least one of a small to large bandgap grading, a bandgap leveling and a bandgap grading from large to small) is used, and the bandgap variation of the spacer layer is not limited to the above examples.
By way of illustration of the above embodiments, by the first emitter cap containing Al composition, it is possible to effectively raise the breakdown voltage of the emitter-base junction and lower the emitter-base junction capacitance without increasing or slightly increasing the emitter resistance, and to utilize the material characteristics of AlGaAs-containing materials having a larger energy gap and a rapid rise in resistivity with temperature rise at high temperatures to enhance the robustness or RF characteristics of the power amplifier at high power density operation, and to further enhance the efficiency and linearity of the PA by changing the HBT design mode, e.g., lowering Re, in exchange for a partially increased PA robustness, thereby enhancing the overall performance and design flexibility of the PA.
In addition, in order to avoid the effect of spontaneous polarization of the emitter layer material, which is greater due to the ordered arrangement of the atoms, the RF characteristics of PA are affected by the increase of the emitter resistance. Therefore, the PL method is used to evaluate the atomic arrangement degree of the emitter layer material, so that the InGaP, inGaAsP, inAlGaP emitter layer with a lower atomic arrangement degree can be determined and properly applied, thus the depletion of the first emitter cap carrier can be reduced, the negative influence on PA characteristics caused by the rising of Re can be avoided, or the high design complexity derived when the first emitter cap is empty to overcome the influence of the emitter layer electric field can be avoided, and the electrical characteristics or firmness of the HBT and the PA as a whole can be improved.
Figure 10 is a schematic diagram of a robust HBT structure in accordance with the second embodiment being described. As shown in fig. 10, the HBT structure 3 of the second embodiment is formed with a sub-collector layer 200, a collector layer 300, a base layer 400, an emitter layer 500, an emitter cap 600, and an ohmic contact layer 700 on a substrate 100; at least a portion of the emitter cap is a current clamping layer having an electron affinity less than or equal to that of the emitter layer.
The material of the emitter layer 500 is at least one N-type semiconductor material selected from the group consisting of: inGaP, inGaAsP, alGaAs and InAlGaP;
the material of the current clamping layer is at least one material selected from the group consisting of: alGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaAs, inGaP, inGaAsP, gaAsSb, inAlGaP and GaAs.
Because the electron affinity of the current clamping layer is smaller than or equal to that of the emitter layer, when the transistor is operated at a higher current density, the electron barrier of the current clamping layer becomes high, and the current of the transistor is limited to a certain extent, so that the HBT is prevented from operating under the condition of too high current, the risk of damage to the transistor is reduced, and the firmness of the HBT is improved; the electron barrier of the current clamping layer increases with increasing current density, and the magnitude of the electron barrier increases varies with the emitter cap, the current clamping layer, or the material, composition, doping concentration, or doping of the emitter layer.
Fig. 11 a-11 d are schematic diagrams showing the relationship between the conductive strips of some of the current clamping layers and the conductive strips of the emitter layer. In fig. 11a to 11d, a current clamping layer is formed in a portion of the emitter cap, the current clamping layer being disposed at a different location of the emitter cap; as shown in these schematic diagrams, the location of the current clamping layer is not limited, as long as the electron affinity of the current clamping layer of the emitter cap is smaller than or equal to the electron affinity of the emitter layer. As long as the electron affinity of a portion of the emitter cap is less than or equal to the emitter layer, the current clamping layer can exert a current clamping (current clamping) effect as a whole even if the electron affinity of other portions of the emitter cap is greater than the emitter layer or whether the current clamping layer is in contact with the emitter layer or not; for the sake of brevity, only a few figures are presented as representative or exemplary, as long as a current clamping layer is provided on a portion of the emitter cap, which is intended to be within the scope of the present invention.
It is noted that the emitter cap of the HBT of fig. 10 is provided with a current clamping layer having an electron affinity less than or equal to the emitter layer; referring to fig. 6c, the electron affinity of a portion of the first emitter cap in the hbt is less than that of the emitter cap, so the first emitter cap also has a current clamping effect; thus, according to embodiments herein, an HBT having a current clamping layer may also have the effect of improving SOA or improving robustness.
Both the first emitter cap of the first embodiment and the current clamping layer of the second embodiment help to improve the robustness of the HBT, both of which can be varied in terms of specific technology and requirements.
The substrate, sub-collector layer, base layer and ohmic contact layer in the second embodiment are the same as those in the first embodiment, and therefore, detailed description thereof will not be repeated.
The HBT with current clamping layer can further select an intermediate composite layer or spacer layer or various embodiments of intermediate composite layers or spacer layers depending on implementation requirements; the contents of each embodiment of the intermediate composite layer and the spacer layer are disclosed in the foregoing, and thus, detailed descriptions thereof will be omitted. It is noted that the spacer layer in the second embodiment is arranged above the emitter layer or between the emitter layer and the emitter cap.
According to implementation requirements, each embodiment of the HBT with the current clamping layer can be respectively matched with one embodiment or some embodiments of the emitter layer in the first embodiment; or the HBT with current clamping layer can be matched with one embodiment or some embodiments of energy gap gradual change (first emitter cap or second emitter cap) in the first embodiment respectively; as described above, the bandgap grading includes linear grading, nonlinear grading, stepwise grading, or a combination thereof, and each of the embodiments of the emitter layer and the bandgap grading (the first emitter cap or the second emitter cap) is disclosed in the foregoing, and thus will not be described in detail.
The above description is merely illustrative of the preferred embodiments of the present invention and is not intended to limit the invention in any way, but any modifications or variations within the spirit of the invention are intended to be included in the scope of the invention.
Claims (19)
1. A robust heterojunction bipolar transistor structure comprising:
a substrate;
a primary collector layer comprising an N-type III-V semiconductor material on the substrate;
a collector layer comprising III-V semiconductor material on the sub-collector layer;
a base layer comprising a P-type III-V semiconductor material on the collector layer;
an emitter layer comprising at least one of an N-type semiconductor material of InGaP, inGaAsP and InAlGaP on the base layer;
a first emitter cap comprising III-V semiconductor material on the emitter cap;
a second emitter cap comprising III-V semiconductor material on the first emitter cap; and
an ohmic contact layer on the second emitter cap layer and comprising an N-type III-V semiconductor material;
wherein in a direction from the second emitter cap to the emitter layer, the energy gap variation of the first emitter cap or the second emitter cap comprises at least one of a gradual energy gap change from small to large and an energy gap leveling;
Wherein the emission wavelength of InGaP is 694nm or less, the emission wavelength of InGaAsP is 710nm or less, and the emission wavelength of InAlGaP is 685nm or less in the material of the emitter layer by the photo-induced fluorescence spectrometry.
2. The robust heterojunction bipolar transistor structure according to claim 1, wherein said first emitter cap comprises at least one semiconductor material selected from the group consisting of: al (Al) x Ga 1-x As、Al x Ga 1-x As 1-y N y 、Al x Ga 1-x As 1-z P z 、Al x Ga 1-x As 1-w Sb w 、In r Al x Ga 1-x-r As and In r Al x Ga 1-x-r P, wherein x is 0 < x < 1, and y, z, r, w is less than or equal to 0.1.
3. The robust heterojunction bipolar transistor structure according to claim 1, wherein said first emitter cap comprises at least one semiconductor material selected from the group consisting of: al (Al) x Ga 1-x As、Al x Ga 1-x As 1-y N y 、Al x Ga 1-x As 1-z P z 、Al x Ga 1-x As 1-w Sb w 、In r Al x Ga 1-x-r As and In r Al x Ga 1-x-r P, wherein x has a maximum value of 0.03.ltoreq.x.ltoreq.0.8 and y, z, r, w.ltoreq.0.1.
4. The robust heterojunction bipolar transistor structure according to claim 1, wherein said first emitter cap comprises at least one selected from the group consisting ofA semiconductor material: al (Al) x Ga 1-x As、Al x Ga 1-x As 1-y N y 、Al x Ga 1-x As 1-z P z 、Al x Ga 1-x As 1-w Sb w 、In r Al x Ga 1-x-r As and In r Al x Ga 1-x-r P, wherein x has a maximum value of 0.05.ltoreq.x.ltoreq.0.4 and y, z, r, w.ltoreq.0.1.
5. The robust heterojunction bipolar transistor structure according to claim 1, wherein,
The first emitter cap layer or the second emitter cap layer at least comprises a uniform layer, a graded layer or a uniform layer and a graded layer, and in the direction from the second emitter cap layer to the emitter layer, the energy gap change of the graded layer at least comprises gradual change from small to large.
6. The robust heterojunction bipolar transistor structure according to claim 1, wherein the thickness of the first emitter cap or the second emitter cap is 1nm to 500nm; the concentration of N-type doping of the first emitter cap or the second emitter cap is 1×10 15 /cm 3 ～5×10 18 /cm 3 。
7. The robust heterojunction bipolar transistor structure of claim 1, wherein the emission wavelength of InGaP in the emitter layer material is 685nm or less, the emission wavelength of InGaAsP is 695nm or less, and the emission wavelength of InAlGaP is 675nm or less by photo-induced fluorescence spectroscopy.
8. The robust heterojunction bipolar transistor structure according to claim 1, wherein the emission wavelength of InGaP in the material of the emitter layer is 675nm or less, the emission wavelength of InGaAsP is 685nm or less, and the emission wavelength of InAlGaP is 665nm or less by means of photo-induced fluorescence spectroscopy.
9. The robust heterojunction bipolar transistor structure of claim 1, further comprising an intermediate composite layer between the substrate and the sub-collector layer.
10. The robust heterojunction bipolar transistor structure of claim 9, wherein said intermediate composite layer comprises at least one buffer layer comprising a III-V semiconductor material or a field effect transistor.
11. The robust heterojunction bipolar transistor structure according to claim 9, wherein,
the intermediate composite layer includes a dummy hemt formed on the substrate: at least one buffer layer, a first doped layer, a first spacer layer, a channel layer, a second spacer layer, a second doped layer, a Schottky layer, an etch stop layer and a top cap layer for ohmic contact; the buffer layer comprises a III-V semiconductor material; the first doped layer or the second doped layer comprises at least one N-type semiconductor material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the first spacer layer or the second spacer layer comprises at least one material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the channel layer comprises at least one material selected from the group consisting of: gaAs, inGaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the schottky layer comprises at least one material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaP and InGaAsP; the etch stop layer comprises at least one material selected from the group consisting of: gaAs, alGaAs, inAlGaP, inGaAsP, inGaP and AlAs; the cap layer is comprised of an N-type III-V semiconductor material.
12. The robust heterojunction bipolar transistor structure of claim 1, further comprising a spacer layer between the first emitter cap and the emitter layer or between the first emitter cap and the second emitter cap, the spacer layer comprising an N-doped or undoped III-V semiconductor material.
13. The robust heterojunction bipolar transistor structure of claim 12, wherein the spacer layer has a thickness of 0.2nm to 200nm; the spacer layer has an N-type doping concentration of 1×10 15 /cm 3 ～5×10 18 /cm 3 。
14. The robust heterojunction bipolar transistor structure according to claim 12, wherein said spacer layer comprises at least one material selected from the group consisting of: alGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaAs, inGaP, inGaAsP, inAlGaP, inGaAs, gaAsSb and GaAs.
15. The robust heterojunction bipolar transistor structure of claim 12, wherein the gap variation of the spacer layer comprises at least one of a gradual gap change from small to large, a flat gap, and a gradual gap change from large to small.
16. A robust heterojunction bipolar transistor structure comprising:
A substrate;
a primary collector layer comprising an N-type III-V semiconductor material on the substrate;
a collector layer comprising III-V semiconductor material on the sub-collector layer;
a base layer comprising a P-type III-V semiconductor material on the collector layer;
an emitter layer comprising an N-type III-V semiconductor material on the base layer;
an emitter cap layer on the emitter layer comprising III-V semiconductor material; and
an ohmic contact layer on the emitter cap layer and comprising an N-type III-V semiconductor material;
wherein at least a portion of the emitter cap is a current clamping layer having an electron affinity less than or equal to the electron affinity of the emitter layer;
wherein the emission wavelength of InGaP is 694nm or less, the emission wavelength of InGaAsP is 710nm or less, and the emission wavelength of InAlGaP is 685nm or less in the material of the emitter layer by the photo-induced fluorescence spectrometry.
17. The robust heterojunction bipolar transistor structure according to claim 16, wherein said emitter layer comprises at least one N-type semiconductor material selected from the group consisting of: inGaP, inGaAsP, alGaAs and InAlGaP; the current clamping layer comprises at least one material selected from the group consisting of: alGaAs, alGaAsN, alGaAsP, alGaAsSb, inAlGaAs, inGaP, inGaAsP, gaAsSb, inAlGaP and GaAs.
18. The robust heterojunction bipolar transistor structure of claim 17, wherein the emission wavelength of InGaP in the emitter layer material is 685nm or less, the emission wavelength of InGaAsP is 695nm or less, and the emission wavelength of InAlGaP is 675nm or less by photo-induced fluorescence spectroscopy.
19. The robust heterojunction bipolar transistor structure of claim 17, wherein the emission wavelength of InGaP in the emitter layer material is 675nm or less, the emission wavelength of InGaAsP is 685nm or less, and the emission wavelength of InAlGaP is 665nm or less by photo-induced fluorescence spectroscopy.
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| US5719415A (en) * | 1995-03-14 | 1998-02-17 | Sharp Kabushiki Kaisha | Hetero-junction bipolar transistor |
| KR20040012518A (en) * | 2002-08-02 | 2004-02-11 | 소니 가부시끼 가이샤 | Semiconductor device |
| CN1956215A (en) * | 2005-07-26 | 2007-05-02 | 索尼株式会社 | Semiconductor device |
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| US8120147B1 (en) * | 2007-12-27 | 2012-02-21 | Vega Wave Systems, Inc. | Current-confined heterojunction bipolar transistor |
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| JP2000260784A (en) * | 1999-03-12 | 2000-09-22 | Sharp Corp | Heterojunction bipolar transistor, semiconductor device using the same, and manufacture of the heterojunction bipolar transistor |
| US7812249B2 (en) * | 2003-04-14 | 2010-10-12 | The Boeing Company | Multijunction photovoltaic cell grown on high-miscut-angle substrate |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US5719415A (en) * | 1995-03-14 | 1998-02-17 | Sharp Kabushiki Kaisha | Hetero-junction bipolar transistor |
| KR20040012518A (en) * | 2002-08-02 | 2004-02-11 | 소니 가부시끼 가이샤 | Semiconductor device |
| CN1956215A (en) * | 2005-07-26 | 2007-05-02 | 索尼株式会社 | Semiconductor device |
| JP2007335586A (en) * | 2006-06-14 | 2007-12-27 | Sony Corp | Semiconductor integrated circuit device and its manufacturing method |
| US8120147B1 (en) * | 2007-12-27 | 2012-02-21 | Vega Wave Systems, Inc. | Current-confined heterojunction bipolar transistor |
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