CN111326111B - Display driving circuit, display driving method and display device - Google Patents

Display driving circuit, display driving method and display device Download PDF

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Publication number
CN111326111B
CN111326111B CN202010263827.7A CN202010263827A CN111326111B CN 111326111 B CN111326111 B CN 111326111B CN 202010263827 A CN202010263827 A CN 202010263827A CN 111326111 B CN111326111 B CN 111326111B
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voltage
data
nth
circuit
display panel
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CN111326111A (en
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王文博
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Abstract

The invention provides a display driving circuit, a display driving method and a display device. The display driving circuit comprises a control circuit and a data voltage supply circuit; the control circuit is used for providing a closing control signal for the nth data driver when receiving an indication signal of standby of the nth display panel so as to control the nth data driver not to work; the data voltage supply circuit supplies a turn-off data voltage to a data line included in the nth display panel when receiving the indication signal, so that a data writing transistor in a pixel circuit included in the nth display panel is turned off, and the gate-source voltage of the data writing transistor is controlled to be within a preset voltage range; n is a positive integer less than or equal to N. The invention can reduce power consumption, so that the data writing transistor is not easy to generate electric leakage, and the problem of screen flashing during the switching of the display mode is not easy to occur.

Description

Display driving circuit, display driving method and display device
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display driving circuit, a display driving method, and a display device.
Background
With the development of folding technology, a product integrating a tablet and a mobile phone is in the market more and more, and the product is undoubtedly power-consuming, so that a perfect method is required to save power consumption, and especially, a plurality of methods for saving power consumption in a mobile phone mode are provided, but some problems are brought.
When at least one display panel of a folding display device is standby, a power supply circuit is adopted to supply high voltage or low voltage to data lines in the display panel, so that a data writing transistor in a pixel circuit in the display panel is easy to leak electricity, or the display panel can generate a screen flashing phenomenon when the mode is switched; alternatively, a voltage capable of turning off the data writing transistor is supplied to the data line in the display panel by the data driver, however, this method requires the data driver to be enabled, which may increase power consumption.
Disclosure of Invention
The present invention is directed to a display driving circuit, a display driving method, and a display device, which solve the problems in the prior art that when a display panel included in the display device is in a standby state, a data writing transistor in a pixel circuit of the display panel is easy to leak current, a flash phenomenon occurs when the display panel is switched between modes, or power consumption is increased.
In order to achieve the above object, the present invention provides a display driving circuit applied to a display device, the display device including N display panels and N data drivers, N being a positive integer, the display driving circuit including a control circuit and a data voltage providing circuit;
the control circuit is used for providing a closing control signal for the nth data driver when receiving an indication signal of standby of the nth display panel so as to control the nth data driver not to work;
the data voltage supply circuit is used for supplying a turn-off data voltage to a data line included in the nth display panel when receiving an indication signal that the nth display panel is in standby state, so that a data writing transistor in a pixel circuit included in the nth display panel is turned off, and the gate-source voltage of the data writing transistor is controlled to be within a preset voltage range;
n is a positive integer less than or equal to N.
Optionally, the data voltage providing circuit includes a first voltage regulator;
the first voltage regulator is used for generating the turn-off data voltage according to a first power supply voltage and providing the turn-off data voltage to the data line.
Optionally, the data voltage providing circuit includes a voltage generating circuit;
the voltage generation circuit is configured to generate the off-data voltage according to a second power supply voltage and a threshold voltage of the data write transistor.
Optionally, the display driving circuit according to the embodiment of the present invention further includes N gate driving circuits;
the nth gate driving circuit is used for providing an nth gate driving signal to a gate line included in the nth display panel when receiving an indication signal of standby of the nth display panel, wherein the potential of the nth gate driving signal is the second power voltage.
Optionally, the display driving circuit according to the embodiment of the present invention further includes a second power supply voltage generating circuit;
the second power supply voltage generation circuit includes a second voltage regulator, a boost circuit, and a voltage generation selector;
the second voltage regulator is used for performing voltage reduction processing on the first power supply voltage when the first power supply voltage is larger than the second power supply voltage, generating and outputting the second power supply voltage through an output end of the second voltage regulator;
the boost circuit is used for boosting the first power supply voltage when the first power supply voltage is smaller than the second power supply voltage, generating and outputting the second power supply voltage through the output end of the boost circuit;
a first input terminal of the voltage generation selector is connected to an output terminal of the second voltage regulator, a second input terminal of the voltage generation selector is connected to an output terminal of the voltage boost circuit, and the voltage generation selector is configured to output the second power supply voltage to the gate line.
Optionally, the data writing transistor is a p-type transistor, and the predetermined voltage range is greater than or equal to 0 and less than or equal to 2V; alternatively, the first and second electrodes may be,
the data writing transistor is an n-type transistor, and the predetermined voltage range is greater than or equal to-2V and less than or equal to 0V.
The invention also provides a display driving method, which is applied to the display driving circuit and comprises the following steps:
when the control circuit receives an instruction signal of standby of the nth display panel, a closing control signal is provided for the nth data driver so as to control the nth data driver not to work;
when the data voltage supply circuit receives an indication signal that the nth display panel is in standby, the data voltage supply circuit supplies a turn-off data voltage to a data line included in the nth display panel, so that a data writing transistor in a pixel circuit included in the nth display panel is turned off, and the gate-source voltage of the data writing transistor is controlled to be within a preset voltage range.
Optionally, the display driving circuit further includes N gate driving circuits; the display driving method further includes:
when the nth gate driving circuit receives an indication signal of standby of the nth display panel, the nth gate driving circuit provides an nth gate driving signal to a gate line included in the nth display panel, and the potential of the nth gate driving signal is a second power voltage.
Optionally, the data writing transistor is a p-type transistor, and the predetermined voltage range is greater than or equal to 0 and less than or equal to 2V; alternatively, the first and second electrodes may be,
the data writing transistor is an n-type transistor, and the predetermined voltage range is greater than or equal to-2V and less than or equal to 0V.
The invention also provides a display device which comprises the display driving circuit.
When the display driving circuit, the display driving method and the display device are in operation, when the nth display panel is in standby, the control circuit receives an indication signal that the nth display panel is in standby, the control circuit controls the nth data driver not to work so as to reduce power consumption, and when the data voltage supply circuit receives the indication signal that the nth display panel is in standby, the data voltage supply circuit supplies a turn-off data voltage to a data line in the nth display panel so as to control a data writing transistor in a pixel circuit included in the nth display panel to be turned off and control a gate-source voltage of the data writing transistor to be within a preset voltage range, so that the data writing transistor is not easy to generate leakage current, and the problem of screen flashing is not easy to occur when the display mode is switched.
Drawings
Fig. 1 is a structural diagram of a display driving circuit according to an embodiment of the present invention;
fig. 2 is a structural diagram of a display driving circuit according to another embodiment of the present invention;
fig. 3 is a structural diagram of a display driving circuit according to still another embodiment of the present invention;
FIG. 4 is a diagram of an embodiment of a second power supply voltage generating circuit in the display driving circuit according to the present invention;
FIG. 5 is a block diagram of a first embodiment of a display driver circuit according to the present invention;
FIG. 6 is a block diagram of a second embodiment of a display driver circuit according to the present invention;
FIG. 7 is a circuit diagram of an embodiment of a pixel circuit in an nth display panel.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The transistors used in all embodiments of the present invention may be transistors, thin film transistors, or field effect transistors or other devices with the same characteristics. In the embodiment of the present invention, in order to distinguish two poles of the transistor except the control pole, one pole is called a first pole, and the other pole is called a second pole.
In practical operation, when the transistor is a triode, the control electrode may be a base electrode, the first electrode may be a collector electrode, and the second electrode may be an emitter electrode; alternatively, the control electrode may be a base electrode, the first electrode may be an emitter electrode, and the second electrode may be a collector electrode.
In practical operation, when the transistor is a thin film transistor or a field effect transistor, the control electrode may be a gate electrode, the first electrode may be a drain electrode, and the second electrode may be a source electrode; alternatively, the control electrode may be a gate electrode, the first electrode may be a source electrode, and the second electrode may be a drain electrode.
The display driving circuit according to an embodiment of the present invention is applied to a display device, which includes N display panels (not shown in fig. 1) and N data drivers, where N is a positive integer; as shown in fig. 1, the display drive circuit includes a control circuit 11 and a data voltage supply circuit 12;
the control circuit 11 is configured to provide a shutdown control signal to the nth data driver DIn to control the nth data driver DIn not to operate when receiving an indication signal that the nth display panel is in standby; n is a positive integer less than or equal to N;
the data voltage supply circuit 12 is configured to supply a turn-off data voltage Vs to a data line (not shown in fig. 1) included in the nth display panel when receiving an indication signal indicating that the nth display panel is in a standby state, so as to turn off a data writing transistor in a pixel circuit included in the nth display panel and control a gate-source voltage of the data writing transistor to be within a predetermined voltage range.
When the display driving circuit works, when an nth display panel is in standby, the control circuit receives an indication signal that the nth display panel is in standby, the control circuit controls the nth data driver not to work so as to reduce power consumption, and when the data voltage supply circuit receives the indication signal that the nth display panel is in standby, the data voltage supply circuit supplies a turn-off data voltage to a data line in the nth display panel so as to control a data writing transistor in a pixel circuit included in the nth display panel to be turned off and control a gate source voltage of the data writing transistor to be within a preset voltage range, so that the data writing transistor is not easy to generate leakage current, and the problem of screen flashing during switching of display modes is not easy to occur.
In an implementation, the predetermined voltage range may be determined according to parameters such as a type of the data writing transistor and a threshold voltage of the data writing transistor.
In the embodiment of the present invention, the indication signal for the nth display panel to be in standby may be provided by a display controller included in the display device, and the display driving circuit according to the embodiment of the present invention may be disposed in a DDIC (display driving integrated circuit) included in the display device.
In the embodiment of the present invention, the nth display panel standby means: the nth display panel is powered on but not operated, but not limited thereto.
In particular implementations, the display device may be a foldable display device, which may include a first display panel and a second display panel, when the first display panel is used, the second display panel is used as a non-display area and needs to be designed to save power consumption, the embodiment of the invention adopts a mode of controlling the second data driver for providing data voltage for the data line in the second display panel to stop working during normal display so as to save power consumption, and supplies an off data voltage to data lines included in the nth display panel through a data voltage supply circuit, so that the data writing transistor in the pixel circuit included in the nth display panel is turned off, and by controlling the gate-source voltage of the data writing transistor to be within a predetermined voltage range, in this way, the data write transistor generates a leakage current, and prevents a screen flicker problem from occurring at the time of display mode switching of the nth display panel.
According to a specific embodiment, the data voltage providing circuit may include a first voltage regulator;
the first voltage regulator is used for generating the turn-off data voltage according to a first power supply voltage and providing the turn-off data voltage to the data line.
In the embodiment of the invention, when the data writing transistor is a p-type transistor, the first power voltage may be the first high voltage AVDD, but is not limited thereto.
As shown in fig. 2, on the basis of the embodiment of the display driving circuit shown in fig. 1, the data voltage supply circuit may include a first voltage regulator Rg 1;
the first voltage regulator Rg1 is configured to generate a shutdown data voltage Vs according to the first high voltage AVDD.
In the embodiment of the invention, the voltage value range of Vs can be calculated first, the first voltage regulator Rg1 generates the turn-off data voltage Vs according to AVDD, and Vs is adjustable, so that the data writing transistor is ensured to be turned off, and no electric leakage occurs and no screen flash is caused.
According to another specific embodiment, the data voltage supply circuit may include a voltage generation circuit;
the voltage generation circuit is configured to generate the off-data voltage according to a second power supply voltage and a threshold voltage of the data write transistor.
In the embodiment of the present invention, before shipping of the display device, the threshold voltage Vth of the data writing transistor in each display panel included in the display device may be confirmed, and then the threshold voltage may be fixed in a DDIC (display driving integrated circuit), and the off-data voltage Vs may be generated from the threshold voltage Vth and the second power supply voltage.
In the embodiment of the invention, when the data writing transistor is a p-type transistor, the second power voltage may be the second high voltage VGH, but not limited thereto.
As shown in fig. 3, on the basis of the embodiment of the display driving circuit shown in fig. 1, the data voltage supply circuit 12 may include a voltage generation circuit 30; the data writing transistor is a p-type transistor;
the voltage generation circuit 30 is configured to generate the turn-off data voltage Vs according to a second high voltage VGH and a threshold voltage Vth of the data writing transistor.
Optionally, the display driving circuit according to the embodiment of the present invention may further include N gate driving circuits;
the nth gate driving circuit is used for providing an nth gate driving signal to a gate line included in the nth display panel when receiving an indication signal of standby of the nth display panel, wherein the potential of the nth gate driving signal is the second power voltage.
In a specific implementation, the display driving circuit according to the embodiment of the present invention may further include N gate driving circuits, where the nth gate driving circuit is configured to provide a corresponding gate driving signal for a gate line included in the nth display panel, and when the nth display panel is in a standby state, the nth gate driving circuit may provide an nth gate driving signal for a gate included in the nth display panel.
When the data writing transistor in the nth display panel is a p-type transistor, the potential of the nth gate driving signal may be the second high voltage VGH, but not limited thereto.
In a specific implementation, the display driving circuit may further include a second power supply voltage generating circuit;
the second power supply voltage generation circuit includes a second voltage regulator, a boost circuit, and a voltage generation selector;
the second voltage regulator is used for performing voltage reduction processing on the first power supply voltage when the first power supply voltage is larger than the second power supply voltage, generating and outputting the second power supply voltage through an output end of the second voltage regulator;
the boost circuit is used for boosting the first power supply voltage when the first power supply voltage is smaller than the second power supply voltage, generating and outputting the second power supply voltage through the output end of the boost circuit;
a first input terminal of the voltage generation selector is connected to an output terminal of the second voltage regulator, a second input terminal of the voltage generation selector is connected to an output terminal of the voltage boost circuit, and the voltage generation selector is configured to output the second power supply voltage to the gate line.
When the data write transistor is a p-type transistor, the first power supply voltage may be a first high voltage AVDD, and the second power supply voltage may be a second high voltage VGH;
as shown in fig. 4, the second power supply voltage generation circuit may include a second voltage regulator 41, a booster circuit 42, and a voltage generation selector 43;
the second voltage regulator 41 is configured to, when the first high voltage AVDD is greater than the second high voltage VGH, perform a voltage reduction process on the first high voltage AVDD, generate and output the second high voltage VGH through an output terminal of the second voltage regulator 41;
the boost circuit 42 is configured to boost the first high voltage AVDD when the first high voltage AVDD is smaller than the second high voltage VGH, generate and output a second high voltage VGH through an output end of the boost circuit 42;
a first input terminal of the voltage generation selector 43 is connected to the output terminal of the second voltage regulator 41, a second input terminal of the voltage generation selector 43 is connected to the output terminal of the voltage boost circuit 42, and the voltage generation selector 43 is configured to output the second high voltage VGH to the gate line.
In the embodiment of the present invention, when the data writing transistor is a p-type transistor, the predetermined voltage range may be greater than or equal to 0 and less than or equal to 2V; alternatively, the first and second electrodes may be,
when the data writing transistor is an n-type transistor, the predetermined voltage range may be greater than or equal to-2V and less than or equal to 0V.
The display driver circuit according to the invention is described below in two specific embodiments.
As shown in fig. 5, the first embodiment of the display driving circuit according to the present invention includes a control circuit 11 and a data voltage providing circuit;
the control circuit 11 is configured to provide a shutdown control signal to the nth data driver DIn to control the nth data driver DIn not to operate when receiving an indication signal that the nth display panel is in standby;
the data voltage supply circuit includes a first voltage regulator Rg 1;
the first voltage regulator Rg1 is used for generating a turn-off data voltage Vs according to the first high voltage AVDD;
in the nth display panel, the data writing transistor is a p-type transistor;
as shown in fig. 5, the first embodiment of the display driving circuit further includes M selectors, wherein reference numeral 51 is a first selector, reference numeral 52 is a second selector, reference numeral 53 is a third selector, and reference numeral 5M is an mth selector;
the nth data driver DIn comprises a first digital-to-analog conversion circuit DA1, a first operational amplifier OP1, a second digital-to-analog conversion circuit DA2, a second operational amplifier OP2, a third digital-to-analog conversion circuit DA3, a third operational amplifier OP3, an mth digital-to-analog conversion circuit DAM, and an mth operational amplifier OPM; m is an integer greater than 3;
the first digital-to-analog conversion circuit DA1 is configured to convert the first digital data voltage into a first analog data voltage when the nth display panel is displaying normally;
the first operational amplifier OP1 is configured to amplify the first analog data voltage when the nth display panel is displaying normally, and provide the amplified first analog data voltage to the first input terminal of the first selector 51;
the second digital-to-analog conversion circuit DA2 is used for converting the second digital data voltage into a second analog data voltage when the nth display panel displays normally;
the second operational amplifier OP2 is configured to amplify the second analog data voltage when the nth display panel is displaying normally, and provide the amplified second analog data voltage to the first input terminal of the second selector 52;
the third digital-to-analog conversion circuit DA3 is configured to convert a third digital data voltage into a third analog data voltage when the nth display panel displays normally;
the third operational amplifier OP3 is configured to amplify the third analog data voltage when the nth display panel is displaying normally, and provide the amplified third analog data voltage to the first input terminal of the third selector 53;
the Mth digital-to-analog conversion circuit DAM is used for converting the third digital data voltage into the Mth analog data voltage when the nth display panel normally displays;
the mth operational amplifier OPM is configured to amplify the mth analog data voltage when the nth display panel normally displays, and to supply the amplified mth analog data voltage to the first input terminal of the mth selector 5M;
when the nth display panel is in standby, the nth data driver DIn is not operated, the first voltage regulator Rg1 generates the off-data voltage Vs according to the first high voltage AVDD, and supplies the off-data voltage Vs to the second input terminal of the first selector 51, the second input terminal of the second selector 52, the second input terminal of the third selector 53, and the second input terminal of the mth selector 5M;
an output terminal of the first selector 51 is electrically connected to the first data line S1, an output terminal of the second selector 52 is electrically connected to the second data line S2, an output terminal of the third selector 53 is electrically connected to the third data line S3, and an output terminal of the mth selector 5M is electrically connected to the mth data line SM;
when the nth display panel is in standby, each selector controls and conducts the connection between the second input end and the output end of the selector;
when the nth display panel displays normally, each selector controls and conducts the connection between the first input end and the output end of the selector.
In fig. 5, a first data line denoted by S1 and included in the nth display panel, a second data line denoted by S2 and included in the nth display panel, a third data line denoted by S4 and included in the nth display panel, and an mth data line denoted by SM and included in the nth display panel, M is an integer greater than 2.
As shown in fig. 6, the second embodiment of the display driving circuit according to the present invention includes a control circuit 11, a data voltage supply circuit 12, and a second power supply voltage generating circuit;
the control circuit 11 is configured to provide a shutdown control signal to the nth data driver DIn to control the nth data driver DIn not to operate when receiving an indication signal that the nth display panel is in standby;
the data voltage supply circuit 12 includes a first voltage regulator Rg1 and a voltage generation circuit 30;
the first voltage regulator Rg1 is used for generating a turn-off data voltage Vs according to the first high voltage AVDD;
the voltage generation circuit 30 is configured to generate the turn-off data voltage Vs according to a second high voltage VGH and a threshold voltage Vth of the data write transistor;
the second power supply voltage generation circuit may include a second voltage regulator 41, a booster circuit 42, and a voltage generation selector 43;
the second voltage regulator 41 is configured to, when the first high voltage AVDD is greater than the second high voltage VGH, perform a voltage reduction process on the first high voltage AVDD, generate and output the second high voltage VGH through an output terminal of the second voltage regulator 41;
the boost circuit 42 is configured to boost the first high voltage AVDD when the first high voltage AVDD is smaller than the second high voltage VGH, generate and output a second high voltage VGH through an output end of the boost circuit 42;
a first input terminal of the voltage generation selector 43 is connected to the output terminal of the second voltage regulator 41, a second input terminal of the voltage generation selector 43 is connected to the output terminal of the voltage boost circuit 42, and the voltage generation selector 43 is configured to output the second high voltage VGH to the gate line;
in the nth display panel, the data writing transistor is a p-type transistor;
as shown in fig. 6, the second embodiment of the display driving circuit according to the present invention further includes M selectors, wherein 51 is a first selector, 52 is a second selector, 53 is a third selector, and 5M is an mth selector;
the nth data driver DIn comprises a first digital-to-analog conversion circuit DA1, a first operational amplifier OP1, a second digital-to-analog conversion circuit DA2, a second operational amplifier OP2, a third digital-to-analog conversion circuit DA3, a third operational amplifier OP3, an mth digital-to-analog conversion circuit DAM, and an mth operational amplifier OPM; m is an integer greater than 3;
the first digital-to-analog conversion circuit DA1 is configured to convert the first digital data voltage into a first analog data voltage when the nth display panel is displaying normally;
the first operational amplifier OP1 is configured to amplify the first analog data voltage when the nth display panel is displaying normally, and provide the amplified first analog data voltage to the first input terminal of the first selector 51;
the second digital-to-analog conversion circuit DA2 is used for converting the second digital data voltage into a second analog data voltage when the nth display panel displays normally;
the second operational amplifier OP2 is configured to amplify the second analog data voltage when the nth display panel is displaying normally, and provide the amplified second analog data voltage to the first input terminal of the second selector 52;
the third digital-to-analog conversion circuit DA3 is configured to convert a third digital data voltage into a third analog data voltage when the nth display panel displays normally;
the third operational amplifier OP3 is configured to amplify the third analog data voltage when the nth display panel is displaying normally, and provide the amplified third analog data voltage to the first input terminal of the third selector 53;
the Mth digital-to-analog conversion circuit DAM is used for converting the third digital data voltage into the Mth analog data voltage when the nth display panel normally displays;
the mth operational amplifier OPM is configured to amplify the mth analog data voltage when the nth display panel normally displays, and to supply the amplified mth analog data voltage to the first input terminal of the mth selector 5M;
when the nth display panel is in standby, the nth data driver DIn is not operated, the first voltage regulator Rg1 or the voltage generation circuit 30 generates the off-data voltage Vs, and supplies the off-data voltage Vs to the second input terminal of the first selector 51, the second input terminal of the second selector 52, the second input terminal of the third selector 53, and the second input terminal of the mth selector 5M;
an output terminal of the first selector 51 is electrically connected to the first data line S1, an output terminal of the second selector 52 is electrically connected to the second data line S2, an output terminal of the third selector 53 is electrically connected to the third data line S3, and an output terminal of the mth selector 5M is electrically connected to the mth data line SM;
when the nth display panel is in standby, each selector controls and conducts the connection between the second input end and the output end of the selector;
when the nth display panel displays normally, each selector controls and conducts the connection between the first input end and the output end of the selector.
In fig. 6, a first data line denoted by S1 and included in the nth display panel, a second data line denoted by S2 and included in the nth display panel, a third data line denoted by S4 and included in the nth display panel, and an mth data line denoted by SM and included in the nth display panel, M is an integer greater than 2.
FIG. 7 is a circuit diagram of one embodiment of a pixel circuit in an nth display panel;
as shown in fig. 7, an embodiment of the pixel circuit may include a data writing transistor T2 and a driving transistor T1, a storage capacitor Cs, and an organic light emitting diode OLED;
the grid electrode of the T2 is connected with the grid electrode Gate of the corresponding row, the source electrode of the T2 is electrically connected with the corresponding data line, and the drain electrode of the T2 is connected with the grid electrode of the T1;
the source electrode of the T1 is connected with a third high voltage VDD, and the drain electrode of the T1 is connected with the anode of the OLED;
the first terminal of Cs is electrically connected to the gate of T1, the second terminal of Cs is grounded, and the cathode of OLED is grounded.
The pixel circuit shown in fig. 7 is only one embodiment of the pixel circuit in the display device according to the embodiment of the present invention, and in actual operation, the structure of the pixel circuit may be other structures.
The display driving method according to the embodiment of the present invention is applied to the display driving circuit, and includes:
when the control circuit receives an instruction signal of standby of the nth display panel, a closing control signal is provided for the nth data driver so as to control the nth data driver not to work;
when the data voltage supply circuit receives an indication signal that the nth display panel is in standby, the data voltage supply circuit supplies a turn-off data voltage to a data line included in the nth display panel, so that a data writing transistor in a pixel circuit included in the nth display panel is turned off, and the gate-source voltage of the data writing transistor is controlled to be within a preset voltage range.
In the display driving method according to the embodiment of the invention, when the nth display panel is in a standby state, the control circuit receives an indication signal that the nth display panel is in a standby state, the control circuit controls the nth data driver not to work so as to reduce power consumption, and when the data voltage supply circuit receives the indication signal that the nth display panel is in a standby state, the data voltage supply circuit supplies a turn-off data voltage to the data lines in the nth display panel so as to control the data writing transistor in the pixel circuit included in the nth display panel to turn off and control the gate source voltage of the data writing transistor to be within a predetermined voltage range, so that the data writing transistor is not easy to generate leakage current and the problem of screen flashing during switching of the display mode is not easy to occur.
Optionally, the display driving circuit further includes N gate driving circuits; the display driving method further includes:
when the nth gate driving circuit receives an indication signal of standby of the nth display panel, the nth gate driving circuit provides an nth gate driving signal to a gate line included in the nth display panel, and the potential of the nth gate driving signal is a second power voltage.
In the embodiment of the present invention, when the data writing transistor is a p-type transistor, the predetermined voltage range may be greater than or equal to 0 and less than or equal to 2V; alternatively, the first and second electrodes may be,
when the data writing transistor is an n-type transistor, the predetermined voltage range may be greater than or equal to-2V and less than or equal to 0V.
The display device provided by the embodiment of the invention comprises the display driving circuit.
The display device provided by the embodiment of the invention can be any product or component with a display function, such as a mobile phone, a tablet personal computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (7)

1. A display driving circuit is applied to a display device, the display device comprises N display panels and N data drivers, N is a positive integer, and the display driving circuit is characterized by comprising a control circuit and a data voltage supply circuit;
the control circuit is used for providing a closing control signal for the nth data driver when receiving an indication signal of standby of the nth display panel so as to control the nth data driver not to work;
the data voltage supply circuit is used for supplying a turn-off data voltage to a data line included in the nth display panel when receiving an indication signal that the nth display panel is in standby state, so that a data writing transistor in a pixel circuit included in the nth display panel is turned off, and the gate-source voltage of the data writing transistor is controlled to be within a preset voltage range;
n is a positive integer less than or equal to N;
the display driving circuit further comprises N grid driving circuits;
the nth gate driving circuit is used for providing an nth gate driving signal to a gate line included in the nth display panel when receiving an indication signal of standby of the nth display panel, wherein the potential of the nth gate driving signal is a second power voltage;
the display driving circuit further comprises a second power supply voltage generating circuit;
the second power supply voltage generation circuit includes a second voltage regulator, a boost circuit, and a voltage generation selector;
the second voltage regulator is used for performing voltage reduction processing on the first power supply voltage when the first power supply voltage is larger than the second power supply voltage, generating and outputting the second power supply voltage through an output end of the second voltage regulator;
the boost circuit is used for boosting the first power supply voltage when the first power supply voltage is smaller than the second power supply voltage, generating and outputting the second power supply voltage through the output end of the boost circuit;
a first input terminal of the voltage generation selector is connected to an output terminal of the second voltage regulator, a second input terminal of the voltage generation selector is connected to an output terminal of the voltage boost circuit, and the voltage generation selector is configured to output the second power supply voltage to the gate line.
2. The display driving circuit according to claim 1, wherein the data voltage supplying circuit includes a first voltage regulator;
the first voltage regulator is used for generating the turn-off data voltage according to a first power supply voltage and providing the turn-off data voltage to the data line.
3. The display drive circuit according to claim 1, wherein the data voltage supply circuit includes a voltage generation circuit;
the voltage generation circuit is configured to generate the off-data voltage according to a second power supply voltage and a threshold voltage of the data write transistor.
4. The display driving circuit according to any one of claims 1 to 3, wherein the data writing transistor is a p-type transistor, and the predetermined voltage range is greater than or equal to 0 and less than or equal to 2V; alternatively, the first and second electrodes may be,
the data writing transistor is an n-type transistor, and the predetermined voltage range is greater than or equal to-2V and less than or equal to 0V.
5. A display driving method applied to the display driving circuit according to any one of claims 1 to 4, the display driving method comprising:
when the control circuit receives an instruction signal of standby of the nth display panel, a closing control signal is provided for the nth data driver so as to control the nth data driver not to work;
when the data voltage supply circuit receives an indication signal that the nth display panel is in standby, the data voltage supply circuit supplies a turn-off data voltage to a data line included in the nth display panel, so that a data writing transistor in a pixel circuit included in the nth display panel is turned off, and the gate-source voltage of the data writing transistor is controlled to be within a preset voltage range;
the display driving circuit further comprises N grid driving circuits; the display driving method further includes:
when the nth gate driving circuit receives an indication signal of standby of the nth display panel, the nth gate driving circuit provides an nth gate driving signal to a gate line included in the nth display panel, and the potential of the nth gate driving signal is a second power voltage.
6. The display driving method according to claim 5, wherein the data writing transistor is a p-type transistor, and the predetermined voltage range is greater than or equal to 0 and less than or equal to 2V; alternatively, the first and second electrodes may be,
the data writing transistor is an n-type transistor, and the predetermined voltage range is greater than or equal to-2V and less than or equal to 0V.
7. A display device comprising the display driver circuit according to any one of claims 1 to 4.
CN202010263827.7A 2020-04-07 2020-04-07 Display driving circuit, display driving method and display device Active CN111326111B (en)

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CN110827759A (en) * 2019-11-19 2020-02-21 上海天马有机发光显示技术有限公司 Display panel and display device

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CN1949343A (en) * 2005-10-13 2007-04-18 索尼株式会社 Display and method for driving display
CN101271667A (en) * 2007-03-22 2008-09-24 索尼株式会社 Display apparatus and drive method thereof and electronic device
CN202487118U (en) * 2012-02-29 2012-10-10 帕诺迪电器(深圳)有限公司 Device for lowering standby power consumption
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