CN109410841B - Pixel circuit, display device and pixel driving method - Google Patents

Pixel circuit, display device and pixel driving method Download PDF

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Publication number
CN109410841B
CN109410841B CN201811368380.9A CN201811368380A CN109410841B CN 109410841 B CN109410841 B CN 109410841B CN 201811368380 A CN201811368380 A CN 201811368380A CN 109410841 B CN109410841 B CN 109410841B
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driving
transistor
level state
gate
data signal
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CN109410841A (en
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王海龙
李月
郭旺
王冬
李金钰
吕明阳
赵宇
冯大伟
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

The invention discloses a pixel circuit, a display device and a pixel driving method, comprising the following steps: a first driving sub-circuit, a second driving sub-circuit and a light emitting device; the first drive sub-circuit is configured to: outputting a corresponding driving current to the light emitting device during a first period of time and stopping outputting the driving current during a second period of time in response to control of a gate driving signal supplied from the gate line and a first data signal supplied from the first data line; the second drive sub-circuit is configured to: outputting a corresponding driving current to the light emitting device during a second period of time and stopping outputting the driving current during a first period of time in response to control of a gate driving signal supplied from the gate line and a second data signal supplied from the second data line; the light emitting device is used for emitting light according to the received driving current; the first driving sub-circuit and the second driving sub-circuit alternately output driving currents. The technical scheme of the invention can slow down the aging speed of the driving transistor and improve the display quality.

Description

Pixel circuit, display device and pixel driving method
Technical Field
The present invention relates to the field of display technologies, and in particular, to a pixel circuit, a display device, and a pixel driving method.
Background
An Organic Light Emitting Diode (OLED) display device has many advantages of self-luminescence, low driving voltage, high luminous efficiency, short response time, high definition, and the like, and is considered as a display device with the most potential development in the industry.
The minimum light-emitting unit in the OLED display device is a pixel circuit including a driving transistor and an OLED, the OLED is a current-driven light-emitting device, and the driving transistor is used for outputting a driving current according to a data signal provided by a data line to drive the OLED to emit light.
However, as the usage time goes on, the materials of the driving transistors age and change, which causes the threshold voltage of the driving transistors to drift, and the threshold voltage drift amounts of different driving transistors in the OLED display device are different, so that the luminance of the OLED display device is not uniform, which affects the display quality.
Disclosure of Invention
The present invention is directed to at least one of the technical problems of the prior art, and provides a pixel circuit, a display device and a pixel driving method.
To achieve the above object, the present invention provides a pixel circuit comprising: a first driving sub-circuit, a second driving sub-circuit and a light emitting device;
the first driving sub-circuit, connected to the first terminal of the light emitting device, the gate line, the first data line, and the first power terminal, is configured to: outputting a corresponding driving current to the light emitting device during a first period of time and stopping outputting the driving current during a second period of time in response to control of a gate driving signal supplied from the gate line and a first data signal supplied from the first data line;
the second driving sub-circuit, connected to the first terminal of the light emitting device, the gate line, the second data line, and the first power terminal, is configured to: outputting a corresponding driving current to the light emitting device during a second period of time and stopping outputting the driving current during a first period of time in response to control of a gate driving signal supplied from the gate line and a second data signal supplied from the second data line;
the second end of the light-emitting device is connected with the second power supply end and is used for emitting light according to the received driving current;
the first driving sub-circuit and the second driving sub-circuit alternately output driving currents.
In some embodiments, the first drive sub-circuit comprises: a first switching transistor, a first driving transistor and a first capacitor;
a control electrode of the first switching transistor is connected with the grid line, a first electrode of the first switching transistor is connected with the first data line, and a second electrode of the first switching transistor is connected with a control electrode of the first driving transistor;
a control electrode of the first driving transistor is connected with a first end of the first capacitor, a first electrode of the first driving transistor is connected with the first power supply end, and a second electrode of the first driving transistor is connected with a first end of the light-emitting device;
the second end of the first capacitor is connected with the second power supply end;
the second drive sub-circuit includes: a second switching transistor, a second driving transistor and a second capacitor;
a control electrode of the second switching transistor is connected with the grid line, a first electrode of the second switching transistor is connected with the second data line, and a second electrode of the second switching transistor is connected with a control electrode of the second driving transistor;
a control electrode of the second driving transistor is connected with a first end of the second capacitor, a first electrode of the second driving transistor is connected with the first power supply end, and a second electrode of the second driving transistor is connected with a first end of the light-emitting device;
and the second end of the second capacitor is connected with the second power supply end.
In some embodiments, the first switching transistor, the second switching transistor, the first driving transistor, and the second driving transistor are simultaneously N-type transistors or simultaneously P-type transistors.
In some embodiments, the first data line and the second data line are the same data line;
the first and second drive sub-circuits comprise a common first switching transistor and first capacitance, the first drive sub-circuit further comprising: a first drive transistor, the second drive sub-circuit further comprising: a second drive transistor;
a control electrode of the first switching transistor is connected with the grid line, a first electrode of the first switching transistor is connected with the first data line, and a second electrode of the first switching transistor is connected with a control electrode of the first driving transistor and a control electrode of the second driving transistor;
a control electrode of the first driving transistor is connected with a first end of the first capacitor, a first electrode of the first driving transistor is connected with the first power supply end, and a second electrode of the first driving transistor is connected with a first end of the light-emitting device;
a control electrode of the second driving transistor is connected with a first end of the first capacitor, a first electrode of the second driving transistor is connected with the first power supply end, and a second electrode of the second driving transistor is connected with a first end of the light-emitting device;
the second end of the first capacitor is connected with the second power supply end;
one of the first driving transistor and the second driving transistor is an N-type transistor, and the other is a P-type transistor.
In some embodiments, one of the first and second time periods is an odd frame time period and the other is an even frame time period.
In order to achieve the above object, the present invention also provides a display device including: such as the pixel circuit described above.
In order to achieve the above object, the present invention further provides a pixel driving method, where the pixel driving method is based on a pixel circuit, and the pixel circuit adopts the above pixel circuit, and the pixel driving method includes:
a step a, a first time period, wherein the first driving sub-circuit outputs a corresponding driving current to the light emitting device in response to the control of the gate driving signal provided by the gate line and the first data signal provided by the first data line, and the second driving sub-circuit does not output a driving current in response to the control of the gate driving signal provided by the gate line and the second data signal provided by the second data line;
step b, a second time period, the second driving sub-circuit outputs corresponding driving current to the light emitting device in response to the control of the gate driving signal provided by the gate line and the second data signal provided by the second data line, and the first driving sub-circuit does not output driving current in response to the control of the gate driving signal provided by the gate line and the first data signal provided by the first data line;
the step a and the step b are alternately executed.
In some embodiments, when the first driving sub-circuit comprises: a first switching transistor, a first driving transistor, and a first capacitor, the second driving sub-circuit comprising: the first switch transistor, the second drive transistor and the second capacitor, and the first drive transistor and the second drive transistor are N-type transistors or P-type transistors at the same time;
the step a specifically comprises the following steps:
the first switch transistor is turned on in response to the control of the gate driving signal in an active level state, the first data signal in a first level state is written into the control electrode of the first driving transistor through the first switch transistor so as to enable the first driving transistor to be turned on, and the first driving transistor outputs a corresponding driving current according to the first data signal; the second switching transistor is turned on in response to control of the gate driving signal in an active level state, and the second data signal in a second level state is written to the control electrode of the second driving transistor through the second switching transistor so that the second driving transistor is turned off;
the step b specifically comprises the following steps:
the second switch transistor is turned on in response to the control of the gate driving signal in an active level state, the second data signal in a first level state is written into the control electrode of the second drive transistor through the second switch transistor so as to enable the second drive transistor to be turned on, and the second drive transistor outputs a corresponding driving current according to the second data signal; the first switching transistor is turned on in response to control of the gate driving signal in an active level state, and the first data signal in a second level state is written to the control electrode of the first driving transistor through the first switching transistor so that the first driving transistor is turned off;
one of the first level state and the second level state is a high level state, and the other is a low level state.
In some embodiments, when the first driving sub-circuit comprises: a first switching transistor, a first driving transistor, and a first capacitor, the second driving sub-circuit comprising: a second switch transistor, a second driving transistor and a second capacitor, wherein one of the first driving transistor and the second driving transistor is an N-type transistor, and the other is a P-type transistor;
the step a specifically comprises the following steps:
the first switch transistor is turned on in response to the control of the gate driving signal in an active level state, the first data signal in a first level state is written into the control electrode of the first driving transistor through the first switch transistor so as to enable the first driving transistor to be turned on, and the first driving transistor outputs a corresponding driving current according to the first data signal; the second switching transistor is turned on in response to control of the gate driving signal in an active level state, and the second data signal in a first level state is written to the control electrode of the second driving transistor through the second switching transistor so that the second driving transistor is turned off;
the step b specifically comprises the following steps:
the second switch transistor is turned on in response to the control of the gate driving signal in an active level state, the second data signal in a second level state is written into the control electrode of the second driving transistor through the second switch transistor so as to enable the second driving transistor to be turned on, and the second driving transistor outputs a corresponding driving current according to the second data signal; the first switching transistor is turned on in response to control of the gate driving signal in an active level state, and the first data signal in a second level state is written to the control electrode of the first driving transistor through the first switching transistor so that the first driving transistor is turned off;
one of the first level state and the second level state is a high level state, and the other is a low level state.
In some embodiments, when the first data line and the second data line are the same data line; when the first driving sub-circuit and the second driving sub-circuit include a first switching transistor and a first capacitor which are shared, the first driving sub-circuit further includes a first driving transistor, and the second driving sub-circuit further includes a second driving transistor, the step a specifically includes:
the first switch transistor is turned on in response to the control of the gate driving signal in an active level state, the first data signal in a first level state is written into the control electrode of the first driving transistor and the control electrode of the second driving transistor through the first switch transistor, so that the first driving transistor is turned on, the second driving transistor is turned off, and the first driving transistor outputs a corresponding driving current according to the first data signal;
the step b comprises the following steps: the first switch transistor is turned on in response to the control of the gate driving signal in an active level state, the first data signal in a second level state is written into the control electrode of the first driving transistor and the control electrode of the second driving transistor through the first switch transistor, so that the first driving transistor is turned off, the second driving transistor is turned on, and the second driving transistor outputs a corresponding driving current according to the first data signal;
one of the first level state and the second level state is a high level state, and the other is a low level state.
Drawings
FIG. 1 is a schematic diagram of a pixel circuit in the prior art;
fig. 2 is a schematic circuit diagram of a pixel circuit according to an embodiment of the invention;
fig. 3 is a schematic circuit diagram of a pixel circuit according to a second embodiment of the present invention;
FIG. 4 is a timing diagram illustrating the operation of the pixel circuit shown in FIG. 3;
fig. 5 is a schematic circuit structure diagram of a pixel circuit according to a third embodiment of the present invention;
FIG. 6 is a timing diagram illustrating the operation of the pixel circuit shown in FIG. 5;
fig. 7 is a schematic structural diagram of a pixel circuit according to a fourth embodiment of the present invention;
FIG. 8 is a timing diagram illustrating the operation of the pixel circuit shown in FIG. 7;
fig. 9 is a flowchart of a pixel driving method according to a fifth embodiment of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the following describes the pixel circuit, the display device and the pixel driving method provided by the present invention in detail with reference to the accompanying drawings.
The Light Emitting device in the present invention may be a current-driven Light Emitting device including a Light Emitting Diode (LED) or an Organic Light Emitting Diode (OLED) in the prior art, and the OLED is exemplified in the present invention.
Fig. 1 is a schematic structural diagram of a pixel circuit in the prior art, and as shown in fig. 1, a conventional pixel driving circuit employs a 2T1C circuit, where the 2T1C circuit specifically includes: 1 switching transistor T0, 1 driving transistor DTFT and 1 storage capacitor C.
In the driving phase of each frame, the switching transistor T0 is turned on to write the data voltage into the gate of the driving transistor DTFT, the driving transistor DTFT is turned on and operates in a saturation state, and the driving transistor DTFT outputs a driving current according to the data voltage to drive the light emitting device OLED to emit light. After the driving phase is finished, the switching transistor T0 is turned off, but the voltage at the gate of the driving transistor DTFT maintains the data voltage, the driving transistor DTFT continues to output the driving current, and the light emitting device maintains light emission under the action of the storage capacitor C. When the driving phase of the next frame starts, the switching transistor T0 is turned on again, a new data voltage is written into the gate of the driving transistor DTFT, and the driving transistor DTFT outputs a driving current according to the new data signal to drive the light emitting device OLED to emit light, at which time the light emitting device luminance may change. The above process is repeated, thereby completing the continuous display.
In the display process, each driving transistor DTFT on the display panel can continuously output driving current so as to drive the light-emitting device to emit light; as the use time increases, the material of the driving transistor DTFT is aged and varied, and the threshold voltage is likely to drift.
To solve the above technical problems, the present invention provides a pixel circuit, a display device and a pixel driving method.
Example one
Fig. 2 is a schematic circuit structure diagram of a pixel circuit according to an embodiment of the present invention, and as shown in fig. 2, the pixel circuit includes: a first driving sub-circuit 1, a second driving sub-circuit 2 and a light emitting device OLED.
Wherein, the first driving sub-circuit 1 is connected with the first end of the light emitting device OLED, the Gate line Gate, the first Data line Data1 and the first power terminal, and is configured to: in response to the control of the Gate driving signal supplied from the Gate line Gate and the first Data signal supplied from the first Data line Data1, the corresponding driving current is outputted to the light emitting device OLED during the first period of time, and the output of the driving current is stopped during the second period of time.
The second driving sub-circuit 2 is connected to the first terminal of the light emitting device OLED, the Gate line Gate, the second Data line Data2, and the first power terminal, and is configured to: in response to the control of the Gate driving signal supplied from the Gate line Gate and the second Data signal supplied from the second Data line Data2, the corresponding driving current is outputted to the light emitting device OLED during the second period of time, and the output of the driving current is stopped during the first period of time.
The second terminal of the light emitting device OLED is connected to the second power terminal for emitting light according to the received driving current.
The first drive sub-circuit 1 and the second drive sub-circuit 2 alternately output drive currents.
In the continuous display process, the first driving sub-circuit 1 and the second driving sub-circuit 2 work alternately, so that the time for the driving transistor in the driving module to output current can be effectively shortened, namely the working time of the driving transistor is shortened, and the aging speed of the driving transistor can be reduced.
In this embodiment, it is preferable that the first period and the second period are equal in duration, for example, both may be 1 frame, 2 frames, multiple frames or any suitable period, when the aging speeds of the driving transistors in the two driving modules are substantially the same. As an alternative, one of the first time period and the second time period is an odd frame time period, and the other is an even frame time period (the time lengths of the first time period and the second time period are both one frame).
Example two
Fig. 3 is a schematic circuit structure diagram of a pixel circuit according to a second embodiment of the present invention, and as shown in fig. 3, the pixel circuit shown in fig. 3 is an embodiment based on the pixel circuit shown in fig. 2, wherein the first driving sub-circuit 1 includes: the first switching transistor T1, the first driving transistor DTFT1, and the first capacitor C1, and the second driving sub-circuit 2 includes: a second switching transistor T2, a second driving transistor DTFT2, and a second capacitor C2.
A control electrode of the first switching transistor T1 is connected to the Gate line Gate, a first electrode of the first switching transistor T1 is connected to the first Data line Data1, and a second electrode of the first switching transistor T1 is connected to a control electrode of the first driving transistor DTFT 1.
A control electrode of the first driving transistor DTFT1 is connected to a first terminal of the first capacitor C1, a first electrode of the first driving transistor DTFT1 is connected to a first power source terminal, and a second electrode of the first driving transistor DTFT1 is connected to a first terminal of the light emitting device OLED.
A second terminal of the first capacitor C1 is connected to a second power supply terminal.
A control electrode of the second switching transistor T2 is connected to the Gate line Gate, a first electrode of the second switching transistor T2 is connected to the second Data line Data2, and a second electrode of the second switching transistor T2 is connected to a control electrode of the second driving transistor DTFT 2.
A control electrode of the second driving transistor DTFT2 is connected to a first terminal of the second capacitor C2, a first electrode of the second driving transistor DTFT2 is connected to a first power source terminal, and a second electrode of the second driving transistor DTFT2 is connected to a first terminal of the light emitting device OLED.
A second terminal of the second capacitor C2 is connected to a second power supply terminal.
The transistor in the present invention may be selected from one of a crystalline silicon thin film transistor, an amorphous silicon thin film transistor, an oxide thin film transistor, and an organic thin film transistor. The "control electrode" of a transistor particularly refers to the gate electrode of the transistor, the "first electrode" particularly refers to the source electrode of the transistor, and correspondingly the "second electrode" particularly refers to the drain electrode of the transistor. Of course, those skilled in the art will appreciate that the "first pole" and "second pole" are interchangeable.
In the present invention, the first power supply terminal supplies a first operating voltage VDD, and the second power supply terminal supplies a second operating voltage Vss. In the following description, the high/low level state of the data signal is referenced to a first operating voltage VDD, and when the voltage value of the data signal is greater than the first operating voltage VDD, the data signal is in the high level state, and when the voltage value of the data signal is less than the first operating voltage VDD, the data signal is in the low level operating state. In addition, when the data signal in the high level state is transmitted to the grid electrode of the N-type driving transistor, the N-type driving transistor can be conducted and works in a saturation state; when the data signal in the low level state is transmitted to the grid electrode of the N-type driving transistor, the N-type driving transistor can be cut off; when the data signal in a high level state is transmitted to the grid electrode of the P type driving transistor, the P type driving transistor can be cut off; when the data signal in the low level state is transmitted to the gate of the P-type driving transistor, the P-type driving transistor can be turned on and operate in a saturation state.
In the present invention, it is preferable that the first switching transistor T1, the second switching transistor T2, the first driving transistor DTFT1 and the second driving transistor DTFT2 are both N-type transistors or both P-type transistors, and at this time, the same process may be used to simultaneously prepare the above-mentioned switching transistors and driving transistors.
The operation of the pixel circuit shown in fig. 3 will be described in detail with reference to the accompanying drawings. The first switching transistor T1, the second switching transistor T2, the first driving transistor DTFT1 and the second driving transistor DTFT2 are N-type transistors at the same time, and the duration of the first time period and the duration of the second time period are both 1 frame.
It should be noted that, when the display device displays a frame of picture, the display device can be divided into two stages: a driving stage and a stable display stage; in the driving stage, the gate driving signals are scanned line by line, and the data lines write the data signals into the pixel units in the corresponding columns so as to enable the light-emitting devices OLED in the pixel units to emit light; in the stable display stage, the light emitting device OLED of each pixel unit maintains light emission under the effect of the capacitor.
Fig. 4 is a timing diagram illustrating the operation of the pixel circuit shown in fig. 3, and as shown in fig. 4, the operation of one pixel circuit in one frame time can be divided into two phases: a driving phase and a display phase.
Referring to fig. 4, in the nth frame (corresponding to the first period), at the driving stage t1, the Gate driving signal in the Gate line Gate is in a high level state, the first Data signal in the first Data line Data1 is in a high level state, and the second Data signal in the second Data line Data2 is in a low level state. At this time, the first and second switching transistors T1 and T2 are both turned on, the first data signal is written to the gate of the first driving transistor DTFT1 through the first switching transistor T1, and the second data signal is written to the gate of the second driving transistor DTFT2 through the second switching transistor T2. Since the first data signal is in a high level state, the first driving transistor DTFT1 is turned on and operates in a saturation state, and the first driving transistor DTFT1 outputs a corresponding driving current according to the voltage of the first data signal and the first operating voltage VDD, so as to drive the light emitting device OLED to emit light; meanwhile, since the second data signal is in a low state, the second driving transistor DTFT2 is turned off, and a driving current is not output.
In the nth frame (corresponding to the first period), at the time of the display phase t2, the Gate driving signal in the Gate line Gate is in a low level state, and no signal is loaded in the first Data line Data1 and the second Data line Data 2. At this time, both the first and second switching transistors T1 and T2 are turned off. However, due to the existence of the first capacitor C1 and the second capacitor C2, the voltages at the gates of the first driving transistor DTFT1 and the second driving transistor DTFT2 are maintained at the same level during the driving phase, the first driving transistor DTFT1 continuously outputs the driving current, and the second driving transistor DTFT2 is maintained in the off state.
In the (n + 1) th frame (corresponding to the second period), at the time of the driving phase t1, the Gate driving signal in the Gate line Gate is in a high level state, the first Data signal in the first Data line Data1 is in a low level state, and the second Data signal in the second Data line Data2 is in a high level state. At this time, the first and second switching transistors T1 and T2 are both turned on, the first data signal is written to the gate of the first driving transistor DTFT1 through the first switching transistor T1, and the second data signal is written to the gate of the second driving transistor DTFT2 through the second switching transistor T2. Since the first data signal is in a low level state, the first driving transistor DTFT1 is turned off, and the output of the driving current is stopped; meanwhile, since the second data signal is in a high state, the second driving transistor DTFT2 is turned on and operates in a saturation state, and the second driving transistor DTFT2 outputs a corresponding driving current according to the voltage of the second data signal and the first operating voltage VDD, so as to drive the light emitting device OLED to emit light.
In the (n + 1) th frame (corresponding to the second period), at the time of the display phase t2, the Gate driving signal in the Gate line Gate is in a low level state, and no signal is loaded in the first Data line Data1 and the second Data line Data 2. At this time, both the first and second switching transistors T1 and T2 are turned off. However, due to the existence of the first capacitor C1 and the second capacitor C2, the voltages at the gates of the first driving transistor DTFT1 and the second driving transistor DTFT2 are maintained at the same level during the driving phase, the first driving transistor DTFT1 is maintained in the off state, and the second driving transistor DTFT2 continuously outputs the driving current.
Similarly, in the n +2 frame, the first driving transistor DTFT1 outputs a driving current, and the second driving transistor DTFT2 is turned off; in the n +3 frame, the first driving transistor DTFT1 is turned off, and the second driving transistor DTFT2 outputs a driving current; and so on.
Assuming that the continuous display time duration of the display device is t, the time duration of each driving transistor outputting the driving current in the prior art is t, and the time duration of each driving transistor in each pixel unit in the embodiment is t/2; compared with the prior art, the technical scheme of the embodiment can effectively shorten the working time of the driving transistor and delay the aging speed of the driving transistor.
The first switching transistor T1 and the second switching transistor T2 in this embodiment may also be P-type transistors; in addition, the first driving transistor DTFT1 and the second driving transistor DTFT2 may also employ N-type transistors at the same time.
It should be noted that, in the present embodiment, when the first driving transistor DTFT1 and the second driving transistor DTFT2 are both N-type driving transistors, the voltage of the Data signal in the low level state provided by the first/second Data line Data2 may be any value smaller than VDD or a fixed value smaller than VDD. When the first driving transistor DTFT1 and the second driving transistor DTFT2 are both P-type driving transistors, the voltage level of the Data signal in a high level state supplied from the first/second Data line Data2 may be any value greater than VDD or a fixed value greater than VDD.
EXAMPLE III
Fig. 5 is a schematic circuit structure diagram of a pixel circuit according to a third embodiment of the present invention, and as shown in fig. 5, unlike the pixel circuit shown in fig. 3, one of the first driving transistor DTFT1 and the second driving transistor DTFT2 in this embodiment is an N-type transistor, and the other is a P-type transistor.
The operation of the pixel circuit shown in fig. 5 will be described in detail with reference to the accompanying drawings. The first switching transistor T1, the second switching transistor T2, and the first driving transistor DTFT1 are N-type transistors, the second driving transistor DTFT2 is a P-type transistor, and the durations of the first period and the second period are 1 frame.
Fig. 6 is an operation timing diagram of the pixel circuit shown in fig. 5, and as shown in fig. 6, in the nth frame (corresponding to the first time period), at the driving stage t1, the Gate driving signal in the Gate line Gate is in a high level state, the first Data signal in the first Data line Data1 is in a high level state, and the second Data signal in the second Data line Data2 is in a high level state. At this time, the first and second switching transistors T1 and T2 are both turned on, the first data signal is written to the gate of the first driving transistor DTFT1 through the first switching transistor T1, and the second data signal is written to the gate of the second driving transistor DTFT2 through the second switching transistor T2. Since the first data signal is in a high level state and the first driving transistor DTFT1 is an N-type transistor, the first driving transistor DTFT1 is turned on and operates in a saturation state, and the first driving transistor DTFT1 outputs a corresponding driving current according to the voltage of the first data signal and the first operating voltage VDD to drive the light emitting device OLED to emit light; meanwhile, since the second data signal is in a high state and the second driving transistor DTFT2 is a P-type transistor, the second driving transistor DTFT2 is turned off and does not output a driving current.
In the nth frame (corresponding to the first period), at the time of the display phase t2, the Gate driving signal in the Gate line Gate is in a low level state, and no signal is loaded in the first Data line Data1 and the second Data line Data 2. At this time, both the first and second switching transistors T1 and T2 are turned off. However, due to the existence of the first capacitor C1 and the second capacitor C2, the voltages at the gates of the first driving transistor DTFT1 and the second driving transistor DTFT2 are maintained at the same level during the driving phase, the first driving transistor DTFT1 continuously outputs the driving current, and the second driving transistor DTFT2 is maintained in the off state.
In the (n + 1) th frame (corresponding to the second period), at the time of the driving phase t1, the Gate driving signal in the Gate line Gate is in a high level state, the first Data signal in the first Data line Data1 is in a low level state, and the second Data signal in the second Data line Data2 is in a low level state. At this time, the first and second switching transistors T1 and T2 are both turned on, the first data signal is written to the gate of the first driving transistor DTFT1 through the first switching transistor T1, and the second data signal is written to the gate of the second driving transistor DTFT2 through the second switching transistor T2. Since the first data signal is in a low state and the first driving transistor DTFT1 is an N-type transistor, the first driving transistor DTFT1 is turned off to stop outputting the driving current; meanwhile, since the second data signal is in a low level state and the second driving transistor DTFT2 is a P-type transistor, the second driving transistor DTFT2 is turned on and operates in a saturation state, and the second driving transistor DTFT2 outputs a corresponding driving current according to the voltage level of the second data signal and the first operating voltage VDD to drive the light emitting device OLED to emit light.
In the (n + 1) th frame (corresponding to the second period), at the time of the display period t2, the Gate driving signal in the Gate line Gate is in a low level state, and no signal is loaded in the first Data line Data1 and the second Data line Data 2. At this time, both the first and second switching transistors T1 and T2 are turned off. However, due to the existence of the first capacitor C1 and the second capacitor C2, the voltages at the gates of the first driving transistor DTFT1 and the second driving transistor DTFT2 are maintained at the same level during the driving phase, the first driving transistor DTFT1 is maintained in the off state, and the second driving transistor DTFT2 continuously outputs the driving current.
In this embodiment, when the first driving transistor DTFT1 is a P-type transistor and the second driving transistor DTFT2 is an N-type transistor, the operation is similar and will not be described in detail.
In this embodiment, when the first driving transistor DTFT1 is an N-type transistor and the second driving transistor DTFT2 is a P-type transistor, the voltage of the Data signal in the low level state provided by the first Data line Data1 may be any value smaller than VDD or a fixed value smaller than VDD, and the voltage of the Data signal in the high level state provided by the second Data line Data2 may be any value larger than VDD or a fixed value larger than VDD; when the first driving transistor DTFT1 is a P-type transistor and the second driving transistor DTFT2 is an N-type transistor, the voltage level of the Data signal in the high level state supplied from the first Data line Data1 may be any value greater than VDD or a constant value greater than VDD, and the voltage level of the Data signal in the low level state supplied from the second Data line Data2 may be any value less than VDD or a constant value less than VDD.
Example four
Fig. 7 is a schematic structural diagram of a pixel circuit according to a fourth embodiment of the present invention, and as shown in fig. 7, the pixel circuit shown in fig. 7 is an embodiment based on the pixel circuit shown in fig. 2, wherein the first Data line Data1 and the second Data line Data2 are the same Data line (collectively referred to as the first Data line Data1), the first driving sub-circuit 1 and the second driving sub-circuit 2 include a first switching transistor T1 and a first capacitor C1, and the first driving sub-circuit 1 further includes: the first driving transistor DTFT1, the second driving sub-circuit 2 further includes: the second driving transistor DTFT 2.
A control electrode of the first switching transistor T1 is connected to the Gate line Gate, a first electrode of the first switching transistor T1 is connected to the first Data line Data1, and a second electrode of the first switching transistor T1 is connected to a control electrode of the first driving transistor DTFT1 and a control electrode of the second driving transistor DTFT 2.
A control electrode of the first driving transistor DTFT1 is connected to a first terminal of the first capacitor C1, a first electrode of the first driving transistor DTFT1 is connected to a first power source terminal, and a second electrode of the first driving transistor DTFT is connected to a first terminal of the light emitting device OLED.
A control electrode of the second driving transistor DTFT2 is connected to a first terminal of the first capacitor C1, a first electrode of the second driving transistor DTFT2 is connected to a first power source terminal, and a second electrode of the second driving transistor DTFT is connected to a first terminal of the light emitting device OLED.
A second terminal of the first capacitor C1 is connected to a second power supply terminal.
One of the first and second driving transistors DTFT1 and DTFT2 is an N-type transistor, and the other is a P-type transistor.
The operation of the pixel circuit shown in fig. 7 will be described in detail with reference to the accompanying drawings. The first switching transistor T1, the second switching transistor T2, and the first driving transistor DTFT1 are N-type transistors, the second driving transistor DTFT2 is a P-type transistor, and the durations of the first period and the second period are 1 frame.
Fig. 8 is an operation timing diagram of the pixel circuit shown in fig. 7, and as shown in fig. 8, in the nth frame (corresponding to the first time period), at the driving stage t1, the Gate driving signal in the Gate line Gate is in a high level state, and the first Data signal in the first Data line Data1 is in a high level state. At this time, the first switching transistor T1 is turned on, and the first data signal is written to the gates of the first and second driving transistors DTFT1 and DTFT2 through the first switching transistor T1. Since the first data signal is in a high level state and the first driving transistor DTFT1 is an N-type transistor, the first driving transistor DTFT1 is turned on and operates in a saturation state, and the first driving transistor DTFT1 outputs a corresponding driving current according to the voltage of the first data signal and the first operating voltage VDD to drive the light emitting device OLED to emit light; meanwhile, since the first data signal is in a high state and the second driving transistor DTFT2 is a P-type transistor, the second driving transistor DTFT2 is turned off and does not output a driving current.
In the nth frame (corresponding to the first period), at the time of the display phase t2, the Gate driving signal in the Gate line Gate is in a low level state, and no signal is loaded in the first Data line Data 1. At this time, the first switching transistor T1 is turned off. However, since the first capacitor C1 exists, the voltages at the gates of the first driving transistor DTFT1 and the second driving transistor DTFT2 are maintained at the magnitude at the time of the driving phase, the first driving transistor DTFT1 continuously outputs the driving current, and the second driving transistor DTFT2 maintains the off-state.
In the (n + 1) th frame (corresponding to the second period), at the driving stage t1, the Gate driving signal in the Gate line Gate is in a high level state, and the first Data signal in the first Data line Data1 is in a low level state. At this time, the first switching transistor T1 is turned on, and the first data signal is written to the gate of the first driving transistor DTFT1 through the first switching transistor T1. Since the first data signal is in a low state and the first driving transistor DTFT1 is an N-type transistor, the first driving transistor DTFT1 is turned off to stop outputting the driving current; meanwhile, since the first data signal is in a low level state and the second driving transistor DTFT2 is a P-type transistor, the second driving transistor DTFT2 is turned on and operates in a saturation state, and the second driving transistor DTFT2 outputs a corresponding driving current according to the voltage magnitude of the first data signal and the first operating voltage VDD to drive the light emitting device OLED to emit light.
In the (n + 1) th frame (corresponding to the second period), at the time of the display period t2, the Gate driving signal in the Gate line Gate is in a low level state, and no signal is loaded in the first Data line Data 1. At this time, the first switching transistor T1 is turned off. However, due to the existence of the first capacitor C1, the voltages at the gates of the first driving transistor DTFT1 and the second driving transistor DTFT2 are maintained at the magnitude at the time of the driving phase, the first driving transistor DTFT1 is maintained in the off state, and the second driving transistor DTFT2 continuously outputs the driving current.
Compared with the technical scheme in the third embodiment, the technical scheme of the embodiment can omit a switch transistor and a data line, and effectively simplifies the complexity of the pixel circuit.
It should be noted that, in the present embodiment, the voltage of the Data signal in the high level state or the low level state provided in the first Data line Data1 needs to correspond to the light emitting brightness of the light emitting device OLED.
EXAMPLE five
Fig. 9 is a flowchart of a pixel driving method according to a fifth embodiment of the present invention, and as shown in fig. 9, the pixel driving method is based on the pixel circuits according to the first to fourth embodiments, and the pixel driving method includes:
step a, a first time period, the first driving sub-circuit outputs a corresponding driving current to the light emitting device in response to the control of the gate driving signal provided by the gate line and the first data signal provided by the first data line, and the second driving sub-circuit does not output a driving current in response to the control of the gate driving signal provided by the gate line and the second data signal provided by the second data line.
And b, in a second time period, the second driving sub-circuit outputs corresponding driving current to the light-emitting device in response to the control of the gate driving signal provided by the gate line and the second data signal provided by the second data line, and the first driving sub-circuit does not output the driving current in response to the control of the gate driving signal provided by the gate line and the first data signal provided by the first data line.
Wherein the steps a and b are performed alternately.
As a specific alternative, when the pixel circuit is the pixel circuit provided in the second embodiment, the specific processes of step a and step b are as follows:
the step a specifically comprises the following steps: the first switching transistor is turned on in response to the control of the gate driving signal in an active level state, a first data signal in a first level state is written into a control electrode of the first driving transistor through the first switching transistor so as to enable the first driving transistor to be turned on, and the first driving transistor outputs a corresponding driving current according to the first data signal; the second switching transistor is turned on in response to control of the gate driving signal in an active level state, and a second data signal in a second level state is written to a control electrode of the second driving transistor through the second switching transistor to turn off the second driving transistor.
The step b specifically comprises the following steps: the second switching transistor is turned on in response to the control of the gate driving signal in an active level state, a second data signal in a first level state is written into a control electrode of the second driving transistor through the second switching transistor so that the second driving transistor is turned on, and the second driving transistor outputs a corresponding driving current according to the second data signal; the first switching transistor is turned on in response to control of the gate driving signal in an active level state, and the first data signal in a second level state is written to the control electrode of the first driving transistor through the first switching transistor to turn off the first driving transistor.
One of the first level state and the second level state is a high level state, and the other is a low level state.
It should be noted that the active level state in the present invention refers to a state that can turn on the corresponding switching transistor; when the switch transistor is an N-type transistor, the effective level state is a high level state; when the switching transistor is a P-type transistor, the active level state is a low level state.
For the detailed description of the above step a and step b, refer to the content of the foregoing embodiment two.
As another specific alternative, when the pixel circuit is the pixel circuit provided in the third embodiment, the specific process of step a and step b is as follows:
the step a specifically comprises the following steps: the first switching transistor is turned on in response to the control of the gate driving signal in an active level state, a first data signal in a first level state is written into a control electrode of the first driving transistor through the first switching transistor so as to enable the first driving transistor to be turned on, and the first driving transistor outputs a corresponding driving current according to the first data signal; the second switching transistor is turned on in response to control of the gate driving signal in an active level state, and a second data signal in a first level state is written to a control electrode of the second driving transistor through the second switching transistor to turn off the second driving transistor.
The step b specifically comprises the following steps: the second switching transistor is turned on in response to the control of the gate driving signal in an active level state, a second data signal in a second level state is written into a control electrode of the second driving transistor through the second switching transistor so that the second driving transistor is turned on, and the second driving transistor outputs a corresponding driving current according to the second data signal; the first switching transistor is turned on in response to control of the gate driving signal in an active level state, and the first data signal in a second level state is written to the control electrode of the first driving transistor through the first switching transistor to turn off the first driving transistor.
One of the first level state and the second level state is a high level state, and the other is a low level state.
For the detailed description of the above step a and step b, refer to the content of the third embodiment.
As a further specific alternative, when the pixel circuit is the pixel circuit provided in the fourth embodiment, the specific process of step a and step b is as follows:
the step a specifically comprises the following steps: the first switching transistor is turned on in response to control of the gate driving signal in an active level state, a first data signal in a first level state is written to a control electrode of the first driving transistor and a control electrode of the second driving transistor through the first switching transistor, so that the first driving transistor is turned on, the second driving transistor is turned off, and the first driving transistor outputs a corresponding driving current according to the first data signal.
The step b specifically comprises the following steps: the first switching transistor is turned on in response to the control of the gate driving signal in an active level state, a first data signal in a second level state is written to the control electrode of the first driving transistor and the control electrode of the second driving transistor through the first switching transistor, so that the first driving transistor is turned off, the second driving transistor is turned on, and the second driving transistor outputs a corresponding driving current according to the first data signal.
For the detailed description of the above steps a and b, refer to the content of the fourth embodiment.
EXAMPLE six
An embodiment of the present invention provides a display device, including: for a specific description, reference may be made to the contents of the first to fourth embodiments, and details are not repeated here.
The display device of the present invention may specifically include: the display device comprises any product or component with a display function, such as electronic paper, an OLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.

Claims (3)

1. A pixel driving method, wherein the pixel driving method is based on a pixel circuit, and wherein the pixel circuit comprises: a first driving sub-circuit, a second driving sub-circuit and a light emitting device;
the first driving sub-circuit, connected to the first terminal of the light emitting device, the gate line, the first data line, and the first power terminal, is configured to: outputting a corresponding driving current to the light emitting device during a first period of time and stopping outputting the driving current during a second period of time in response to control of a gate driving signal supplied from the gate line and a first data signal supplied from the first data line;
the second driving sub-circuit, connected to the first terminal of the light emitting device, the gate line, the second data line, and the first power terminal, is configured to: outputting a corresponding driving current to the light emitting device during a second period of time and stopping outputting the driving current during a first period of time in response to control of a gate driving signal supplied from the gate line and a second data signal supplied from the second data line;
the second end of the light-emitting device is connected with the second power supply end and is used for emitting light according to the received driving current;
the first driving sub-circuit and the second driving sub-circuit alternately output driving currents;
the first drive sub-circuit includes: a first switching transistor, a first driving transistor and a first capacitor;
a control electrode of the first switching transistor is connected with the grid line, a first electrode of the first switching transistor is connected with the first data line, and a second electrode of the first switching transistor is connected with a control electrode of the first driving transistor;
a control electrode of the first driving transistor is connected with a first end of the first capacitor, a first electrode of the first driving transistor is connected with the first power supply end, and a second electrode of the first driving transistor is connected with a first end of the light-emitting device;
the second end of the first capacitor is connected with the second power supply end;
the second drive sub-circuit includes: a second switching transistor, a second driving transistor and a second capacitor;
a control electrode of the second switching transistor is connected with the grid line, a first electrode of the second switching transistor is connected with the second data line, and a second electrode of the second switching transistor is connected with a control electrode of the second driving transistor;
a control electrode of the second driving transistor is connected with a first end of the second capacitor, a first electrode of the second driving transistor is connected with the first power supply end, and a second electrode of the second driving transistor is connected with a first end of the light-emitting device;
the second end of the second capacitor is connected with the second power supply end;
the pixel driving method includes:
a step a, a first time period, wherein the first driving sub-circuit outputs a corresponding driving current to the light emitting device in response to the control of the gate driving signal provided by the gate line and the first data signal provided by the first data line, and the second driving sub-circuit does not output a driving current in response to the control of the gate driving signal provided by the gate line and the second data signal provided by the second data line;
step b, a second time period, the second driving sub-circuit outputs corresponding driving current to the light emitting device in response to the control of the gate driving signal provided by the gate line and the second data signal provided by the second data line, and the first driving sub-circuit does not output driving current in response to the control of the gate driving signal provided by the gate line and the first data signal provided by the first data line;
the step a and the step b are executed alternately;
when one of the first and second driving transistors is an N-type transistor and the other is a P-type transistor,
the first time period includes a third stage and a first display stage, the third stage includes a first driving stage, a duration of the third stage is greater than a duration of the first driving stage, and the step a specifically includes:
in the first driving phase, the first switch transistor is turned on in response to the control of the gate driving signal in an active level state, the first data signal in a first level state is written into the control electrode of the first driving transistor through the first switch transistor so as to enable the first driving transistor to be turned on, and the first driving transistor outputs a corresponding driving current according to the first data signal; the second switching transistor is turned on in response to control of the gate driving signal in an active level state, and the second data signal in a first level state is written to the control electrode of the second driving transistor through the second switching transistor so that the second driving transistor is turned off; the duration of the gate driving signal in the active level state is equal to the duration of the first driving stage, and the duration of the first data signal in the first level state and the duration of the second data signal in the first level state are equal to the duration of the third stage;
the second time period includes a fourth stage and a second display stage, the fourth stage includes a second driving stage, a duration of the fourth stage is greater than a duration of the second driving stage, and the step b specifically includes:
in the second driving phase, the second switch transistor is turned on in response to the control of the gate driving signal in an active level state, the second data signal in a second level state is written into the control electrode of the second driving transistor through the second switch transistor, so that the second driving transistor is turned on, and the second driving transistor outputs a corresponding driving current according to the second data signal; the first switching transistor is turned on in response to control of the gate driving signal in an active level state, and the first data signal in a second level state is written to the control electrode of the first driving transistor through the first switching transistor so that the first driving transistor is turned off; the duration of the gate driving signal in the active level state is equal to the duration of the second driving stage, the duration of the second data signal in the second level state, and the duration of the first data signal in the second level state are equal to the duration of the fourth stage;
one of the first level state and the second level state is a high level state, and the other is a low level state.
2. The pixel driving method according to claim 1, wherein the first switching transistor and the second switching transistor are both N-type transistors or both P-type transistors.
3. The pixel driving method according to claim 1 or 2, wherein one of the first period and the second period is an odd frame period, and the other is an even frame period.
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