CN111313898A - Circuit and method for multiplexing data output and power supply line - Google Patents

Circuit and method for multiplexing data output and power supply line Download PDF

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CN111313898A
CN111313898A CN202010120758.4A CN202010120758A CN111313898A CN 111313898 A CN111313898 A CN 111313898A CN 202010120758 A CN202010120758 A CN 202010120758A CN 111313898 A CN111313898 A CN 111313898A
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circuit
power supply
signal acquisition
sensing signal
control circuit
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CN111313898B (en
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邓建元
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WUXI ZETAI MICROELECTRONICS CO Ltd
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WUXI ZETAI MICROELECTRONICS CO Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/1205Multiplexed conversion systems
    • H03M1/122Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages

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Abstract

The application relates to a circuit and a method for multiplexing data output and a power supply line, wherein the circuit comprises: the device comprises a main control circuit, a power supply circuit, a voltage division circuit and a sensing signal acquisition circuit; the input and output end of the main control circuit is connected with the data and power supply common end of the sensing signal acquisition circuit and is used for carrying out data transmission with the sensing signal acquisition circuit when the sensing signal acquisition circuit is in a data transmission mode; the power supply circuit is connected with the data and power supply public end of the sensing signal acquisition circuit through the voltage division circuit and is used for supplying power to the sensing signal acquisition circuit when the sensing signal acquisition circuit is in a measurement mode. According to the technical scheme, the conversion of the sensing signals and the data output to the main control circuit can be realized through the data line and the ground wire, namely, the data line is multiplexed into the power line of the chip.

Description

Circuit and method for multiplexing data output and power supply line
Technical Field
The present application relates to the field of electronic technologies, and in particular, to a circuit and a method for multiplexing data output and a power supply line.
Background
In the field of sensor application, a sensor and an analog-to-digital conversion circuit are generally required to be powered, and then data are output to a main controller through a serial port. Therefore, the sensor circuit or chip needs to have 4 chip pins or 4 connecting wires for power supply, ground and two-wire serial ports. This can result in excessive pins or wires, which can be detrimental to circuit integration, as well as integration of the sensor on a chip.
Disclosure of Invention
In order to solve the technical problem or at least partially solve the technical problem, embodiments of the present application provide a circuit and a method for multiplexing a data output and a power supply line.
In a first aspect, an embodiment of the present application provides a circuit for multiplexing a data output and a power supply line, where the circuit includes: the device comprises a main control circuit, a power supply circuit, a voltage division circuit and a sensing signal acquisition circuit;
the input and output end of the main control circuit is connected with the data and power supply common end of the sensing signal acquisition circuit and is used for carrying out data transmission with the sensing signal acquisition circuit when the sensing signal acquisition circuit is in a data transmission mode;
the power supply circuit is connected with the data and power supply public end of the sensing signal acquisition circuit through the voltage division circuit and is used for supplying power to the sensing signal acquisition circuit when the sensing signal acquisition circuit is in a measurement mode.
Optionally, the sensing signal acquisition circuit comprises: the device comprises a power supply control circuit, an output control circuit, an encoding circuit, a sensing measurement circuit, a clock generation circuit, a first switch circuit, a second switch circuit and an energy storage circuit;
the energy storage circuit is connected with the data and power supply common end through a second switch circuit and used for storing electric energy through the power supply circuit when the sensing signal acquisition circuit is in a measurement mode;
the energy storage circuit is also respectively connected with the power supply control circuit, the output control circuit and the clock generation circuit and used for supplying power to the power supply control circuit, the output control circuit and the clock generation circuit when the sensing signal acquisition circuit is in a data transmission mode;
the power supply circuit is respectively connected with the power supply control circuit, the output control circuit, the clock generation circuit, the coding circuit and the sensing measurement circuit through the voltage division circuit, the data and power supply public end and the second switch circuit in sequence, and is used for supplying power to the power supply control circuit, the output control circuit, the clock generation circuit, the coding circuit and the sensing measurement circuit when the sensing signal acquisition circuit is in a measurement mode;
the clock generating circuit is respectively connected with the power supply control circuit, the output control circuit, the coding circuit and the sensing measuring circuit and is used for providing clock signals for the power supply control circuit, the output control circuit, the coding circuit and the sensing measuring circuit;
the sensing measurement circuit is connected with the coding circuit and used for converting the acquired analog signals into digital signals and transmitting the digital signals to the coding circuit;
the coding circuit is connected with the output control circuit and the power supply control circuit and is used for coding the digital signal according to a preset coding rule to obtain a coding signal and transmitting the coding signal to the output control circuit and the power supply control circuit;
the output control circuit is connected with the data and power supply common end through a first switch circuit and used for switching on or switching off a data transmission mode of the sensing signal acquisition circuit according to a clock signal and a coding signal;
the power supply control circuit is connected with the data and power supply common end through the second switch circuit and used for switching on or switching off the measurement mode of the sensing signal acquisition circuit according to the clock signal and the coding signal.
Optionally, the first switch circuit is an NMOS transistor, and the second switch circuit is a PMOS transistor.
Optionally, the energy storage circuit is an energy storage capacitor.
Optionally, the clock generation circuit is an RC oscillator.
Optionally, the preset encoding rule includes:
in a fixed period, the ratio of high level to low level is 1: 3, coding the duty ratio to obtain a first code, wherein the first code represents a low level;
the ratio of high level to low level is 3: the duty cycle of 1 is encoded to obtain a second code, which represents a high level.
Optionally, the voltage dividing circuit is a voltage dividing resistor.
In a second aspect, an embodiment of the present application provides a method for multiplexing a data output with a power supply line, where the method includes:
the sensing signal acquisition circuit automatically switches the working mode, and the working mode comprises: a data transmission mode and a measurement mode;
when the sensing signal acquisition circuit is in a data transmission mode, the main control circuit transmits data with the sensing signal acquisition circuit sequentially through the input and output ends of the main control circuit, the data and power supply common end of the sensing signal acquisition circuit and the sensing signal acquisition circuit;
when the sensing signal acquisition circuit is in a measurement mode, the power supply circuit supplies power to the sensing signal acquisition circuit through the voltage division circuit, the data of the sensing signal acquisition circuit and the power supply public end in sequence, so that the sensing signal acquisition circuit acquires external data.
Optionally, the sensing signal acquisition circuit automatically switches the working mode, including:
the power supply control circuit controls the connection or disconnection of the second switch circuit according to a clock signal of the clock generation circuit and a code signal of the coding circuit, the output control circuit controls the connection or disconnection of the first switch circuit according to the clock signal of the clock generation circuit and the code signal of the coding circuit, when the first switch circuit is connected with the second switch circuit and disconnected, the sensing signal acquisition circuit is in a data transmission mode, and when the second switch circuit is connected with the first switch circuit and disconnected, the sensing signal acquisition circuit is in a measurement mode.
Optionally, the encoding signal is obtained by encoding the digital signal transmitted by the sensing measurement circuit by the encoding circuit according to a preset encoding rule; the digital signal is obtained by analog-to-digital conversion of the acquired analog signal by the sensing and measuring circuit.
Compared with the prior art, the technical scheme provided by the embodiment of the application has the following advantages:
according to the technical scheme, conversion of sensing signals and data output to the main control circuit and the power supply circuit to supply power to the sensing measurement circuit can be achieved through the data line and the ground wire, namely the data line is multiplexed to be the power line of the chip. The connection between the sensor chip and the controller is simplified, and the cost is saved. The sensor and chip separation technical scheme in some existing application fields can be replaced conveniently.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
FIG. 1 is a block diagram of a circuit structure for multiplexing data output and power supply lines according to an embodiment;
FIG. 2 is a block diagram of a circuit structure for multiplexing data output and power supply lines according to another embodiment
FIG. 3 illustrates an embodiment of a data output circuit and a power control circuit;
FIG. 4 is a schematic diagram of a duty cycle of data encoding provided by one embodiment;
FIG. 5 is a waveform after encoding output provided by one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is a block diagram of a circuit structure for multiplexing a data output and a power supply line according to an embodiment. Referring to fig. 1, the data output and power supply line multiplexing circuit includes a main control circuit 10, a sensing signal acquisition circuit 20, a power supply circuit 30, and a voltage dividing circuit 40, wherein an input/output end of the main control circuit 10 is connected to a data and power supply common end of the sensing signal acquisition circuit 20, and is configured to perform data transmission with the sensing signal acquisition circuit 20 when the sensing signal acquisition circuit 20 is in a data transmission mode; the power circuit 30 is connected to the data and power supply common terminal of the sensing signal acquisition circuit 20 through the voltage division circuit 40, and is configured to supply power to the sensing signal acquisition circuit 20 when the sensing signal acquisition circuit 20 is in the measurement mode.
Fig. 2 is a block diagram of a circuit structure for multiplexing data output and power supply lines according to another embodiment. Referring to fig. 2, the input/output end of the main control circuit 10 is connected to the data and power supply common end VD of the sensing signal acquisition circuit 20, and is configured to perform data transmission with the sensing signal acquisition circuit 20 when the sensing signal acquisition circuit 20 is in the data transmission mode.
The main control circuit 10 is further used as a power supply circuit to provide voltage VDD, the main control circuit 10 is connected to the data and power supply common terminal VD of the sensing signal acquisition circuit 20 through a resistor R1, and is used for supplying power to the sensing signal acquisition circuit 20 when the sensing signal acquisition circuit 20 is in a measurement mode, wherein the resistor R1 is a voltage division circuit.
In one embodiment, the sensing signal acquisition circuit 20 includes a power control circuit, an output control circuit, an encoding circuit, a sensing measurement circuit, a clock generation circuit, a first switch circuit, a second switch circuit, and a tank circuit. Referring to fig. 2, the energy storage circuit includes a capacitor C1, the first switch circuit includes an NMOS transistor, and the second switch circuit includes a PMOS transistor.
The capacitor C1 is connected to the data and power supply common terminal VD through a PMOS transistor, and is used for storing electric energy by supplying power through the main control circuit 10 when the sensing signal acquisition circuit 20 is in the measurement mode. The capacitor C1 is further connected to the power control circuit, the output control circuit, and the clock generation circuit, respectively, and is configured to supply power to the power control circuit, the output control circuit, and the clock generation circuit when the sensing signal acquisition circuit 20 is in the data transmission mode. The other end of the capacitor C1 is grounded.
The power supply circuit (i.e. the main control circuit 10) is connected with the power supply control circuit, the output control circuit, the clock generation circuit, the coding circuit and the sensing measurement circuit sequentially through the divider resistor R1, the data and power supply common terminal VD and the PMOS transistor, and is used for supplying power to the power supply control circuit, the output control circuit, the clock generation circuit, the coding circuit and the sensing measurement circuit when the sensing signal acquisition circuit 20 is in the measurement mode.
The clock generating circuit is respectively connected with the power supply control circuit, the output control circuit, the coding circuit and the sensing measuring circuit and is used for providing clock signals for the power supply control circuit, the output control circuit, the coding circuit and the sensing measuring circuit.
The sensing measurement circuit is connected with the coding circuit and used for converting the acquired analog signals into digital signals and transmitting the digital signals to the coding circuit.
The coding circuit is connected with the output control circuit and the power supply control circuit and used for coding the digital signal according to a preset coding rule to obtain a coding signal and transmitting the coding signal to the output control circuit and the power supply control circuit.
The output control circuit is connected with the data and power supply common end VD through an NMOS tube and is used for switching on or switching off the data transmission mode of the sensing signal acquisition circuit 20 according to the clock signal and the coding signal. The grid electrode of the NMOS tube is connected with the output control circuit, and the source electrode of the NMOS tube is grounded, and the drain electrode of the NMOS tube is connected with the data and power supply common end VD.
The power supply control circuit is connected with the data and power supply public end VD through a PMOS tube and used for starting or stopping the measuring mode of the sensing signal acquisition circuit according to the clock signal and the coding signal. The grid electrode of the PMOS tube is connected with the power supply control circuit, the source electrode of the PMOS tube is connected with one end of the capacitor C1, and the drain electrode of the PMOS tube is connected with the data and power supply common end VD.
In one embodiment, the clock generation circuit is an RC oscillator. Optionally, it generates a 1MHZ clock signal for the data output and clock requirements of the power control circuit with a frequency deviation of less than 1%.
Fig. 3 is a data output circuit and a power control circuit according to an embodiment. Referring to fig. 3, the encoded signal Data _ in outputted from the encoding circuit is connected to the D terminal of the D flip-flop dff1 through the inverting amplifier inv, the Q output terminal of the D flip-flop dff1 is connected to the D terminal of the D flip-flop dff2, the Q output terminal of the D flip-flop dff2 is connected to the D terminal of the D flip-flop dff3, the Q output terminal of the D flip-flop dff3 is connected to one input terminal of the or gate 1, the other input end of the or gate 1 is connected with the Q output end of the D flip-flop dff1, the clock generating circuit provides the clock signal clk for the D flip-flop dff1, the D flip-flop dff2 and the D flip-flop dff3 at the same time, the Reset circuit POR provides the Reset signal Reset for the D flip-flop dff1, the D flip-flop dff2 and the D flip-flop dff3 at the same time, and the power supply circuit provides power for the D flip-flop dff1, the D flip-flop dff2, the D flip-flop dff3 and the Reset circuit POR through the voltage dividing resistor R1, the data and power supply common end VD and the voltage VCC provided by the second switch circuit at the same time. The output end of the or gate 1 is connected with the gate of the PMOS transistor of the second switch circuit, the source of the PMOS transistor is connected with one end of a capacitor C1, the drain of the PMOS transistor is connected with a data and power supply common end VD, the other end of the capacitor C1 is grounded, the drain of the NMOS transistor of the first switch circuit is connected with the data and power supply common end VD, the source is grounded, and the gate is connected with the Q output end of a D flip-flop dffe 2. And the Q output end is a data latch output end.
The input and output ends of the main control circuit are connected with a data and power supply common end VD and are connected with a power supply VDD through a resistor R1, the drain of the M1 tube is connected with the VD, and the gate is connected with the SW 0. The drain of the M2 tube is connected to VD, the gate is connected to SW1, the source is connected to VCC and capacitor C1. VCC is the power of the power control circuit, the coding circuit and the sensing measurement circuit. The capacitor C1 is used for storing charge, and the capacitor C1 supplies power to the power consumption circuit of the chip when the M2 tube is closed.
Referring to fig. 2, the M1 transistor is in data open-drain output mode, when the encoded data "1" needs to be output, the gate control signal SW0 of the NMOS transistor M1 is "0", the level of the VD pin of the M1 transistor is turned off and quickly charged to VDD through the resistor R1, the drain of the M2 transistor is connected to the VD pin, after VD rises to approach VDD, the control signal SW1 of the M2 transistor is changed from "1" to "0", and the power VDD charges the capacitor C1 through the resistor R1. Before the SW0 signal changes from "0" to "1", SW1 ensures that the M2 tube is turned off in advance from "0" to "1" to hold the charge of C1. The internal power supply control circuit, the coding circuit and the sensing and measuring circuit are powered by the charge held in the capacitor C1, and in order to reduce the working current in the output state, the coding circuit and the measuring circuit can not work in the output state, and only the clock circuit, the power supply control circuit and the output driving circuit work. In this state, the working current of the chip is very small, and is only a few microamperes.
Referring to fig. 3, data is output from the data _ in input through the inverter inv1 as data connected to the D terminal of the D flip-flop dff1, the output Q of the D flip-flop is connected to the D terminal of dff2, the output Q of the dff2 is connected to the D terminal of dff3, the connection line is sw0, all the 3D flip-flops clk are connected to the clock generator of 1MHZ, the reset terminal CLR of the D flip-flop is connected to the output D2 of the output reset.dff3 of the power reset circuit POR and the output D0 of the dff1 are connected to the or gate or1, the output of the or gate is connected to the gate of the power switch PMOS transistor M2, and the data is used for controlling the charging of the power circuit to the capacitor C1 and the electric quantity of the holding capacitor. Dff2, the output sw0 is connected with the NMOS transistor M1 for the open-drain output of data. The drain ends of both the M1 and M2 tubes were connected to the VD. The source of the M2 transistor is connected to electrophoresis C1 for storing energy, the power supply of the power-on reset circuit POR is connected to VCC, the output is reset and connected to CLR ends of dff1, dff2 and dff3, and the output is used for resetting the D flip-flop. The M2 tube is ensured to be closed before the M1 tube is switched on through the ingenious and simple circuit structure, and the M2 tube is switched on again after the M1 tube is closed. Thereby causing the capacitor C1 to charge when D1 rises to a high level after M1 turns off. When M1 is turned on, M2 is turned off, and capacitor C1 holds the charge to power the few power consuming circuits of the chip. Inv1, or1, dff1, dff2, dff3 in fig. 2 are all powered by capacitor C1.
And (3) measuring state: in the measurement state, the M2 tube is turned on, the M1 tube is turned off, and VDD supplies power to the chip through the resistor R1. The sensing and measuring circuit converts the output signal of the sensor through the ADC to obtain the measured digital data. The encoding circuit encodes the measured value output by the sensing quantity circuit, as shown in fig. 3: at a fixed period, data "0" is expressed as 1: duty cycle encoding of 3, i.e., high occupying 1/4 of the period and low occupying 3/4 of the period. Data "1" is as follows 3: a duty cycle of 1 encodes that high accounts for 3/4 of the period and low accounts for 1/4 of the period. The coded data is stored in a register, then the sensing measuring circuit is closed to save power consumption, and after the chip is changed into an output state, the coded data is sent to the power supply control circuit and the output driving circuit to be output to the VD.
Fig. 4 is a schematic duty cycle diagram of data encoding according to an embodiment. Referring to fig. 4, the preset encoding rule includes: in a fixed period, the ratio of high level to low level is 1: 3, coding the duty ratio to obtain a first code, wherein the first code represents a low level; the ratio of high level to low level is 3: the duty cycle of 1 is encoded to obtain a second code, which represents a high level. As shown in fig. 4, the first duty cycle diagram is the encoding of data "0", and the second duty cycle diagram is the encoding of data "1". The coding circuit is used for coding the sensing digital signal converted by the ADC according to a certain coding rule. Data encoding "0" is as follows: duty cycle of 3, high accounts for 1/4 of the period, and low accounts for 3/4 of the period. Data encoding "1" is as follows 3: duty cycle of 1, high accounts for 3/4 of the period, and low accounts for 1/4 of the period.
FIG. 5 is a waveform after encoding output provided by one embodiment. Fig. 5 shows a waveform of 0101 encoded data.
There is also provided in one embodiment a method of multiplexing data output with power supply lines, the method comprising:
the sensing signal acquisition circuit automatically switches the working mode, and the working mode comprises: a data transmission mode and a measurement mode;
when the sensing signal acquisition circuit is in a data transmission mode, the main control circuit transmits data with the sensing signal acquisition circuit sequentially through the input and output ends of the main control circuit, the data and power supply common end of the sensing signal acquisition circuit and the sensing signal acquisition circuit;
when the sensing signal acquisition circuit is in a measurement mode, the power supply circuit supplies power to the sensing signal acquisition circuit through the voltage division circuit, the data of the sensing signal acquisition circuit and the power supply public end in sequence, so that the sensing signal acquisition circuit acquires external data.
In one embodiment, the sensing signal acquisition circuit automatically switches the working mode, and the method comprises the following steps:
the power supply control circuit controls the connection or disconnection of the second switch circuit according to a clock signal of the clock generation circuit and a code signal of the coding circuit, the output control circuit controls the connection or disconnection of the first switch circuit according to the clock signal of the clock generation circuit and the code signal of the coding circuit, when the first switch circuit is connected with the second switch circuit and disconnected, the sensing signal acquisition circuit is in a data transmission mode, and when the second switch circuit is connected with the first switch circuit and disconnected, the sensing signal acquisition circuit is in a measurement mode.
In one embodiment, the coded signal is obtained by coding the digital signal transmitted by the sensing and measuring circuit by the coding circuit according to a preset coding rule; the digital signal is obtained by analog-to-digital conversion of the acquired analog signal by the sensing and measuring circuit.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A circuit for multiplexing data output with a power supply line, the circuit comprising: the device comprises a main control circuit, a power supply circuit, a voltage division circuit and a sensing signal acquisition circuit;
the input and output end of the main control circuit is connected with the data and power supply common end of the sensing signal acquisition circuit and is used for carrying out data transmission with the sensing signal acquisition circuit when the sensing signal acquisition circuit is in a data transmission mode;
the power supply circuit is connected with the data and power supply public end of the sensing signal acquisition circuit through the voltage division circuit and is used for supplying power to the sensing signal acquisition circuit when the sensing signal acquisition circuit is in a measurement mode.
2. The circuit of claim 1, wherein the sensing signal acquisition circuit comprises: the device comprises a power supply control circuit, an output control circuit, an encoding circuit, a sensing measurement circuit, a clock generation circuit, a first switch circuit, a second switch circuit and an energy storage circuit;
the energy storage circuit is connected with the data and power supply public end through the second switch circuit and is used for storing electric energy through the power supply circuit when the sensing signal acquisition circuit is in a measurement mode;
the energy storage circuit is also respectively connected with the power supply control circuit, the output control circuit and the clock generation circuit and used for supplying power to the power supply control circuit, the output control circuit and the clock generation circuit when the sensing signal acquisition circuit is in a data transmission mode;
the power supply circuit is respectively connected with the power supply control circuit, the output control circuit, the clock generation circuit, the coding circuit and the sensing measurement circuit through the voltage division circuit, the data and power supply common terminal and the second switch circuit in sequence, and is used for supplying power to the power supply control circuit, the output control circuit, the clock generation circuit, the coding circuit and the sensing measurement circuit when the sensing signal acquisition circuit is in a measurement mode;
the clock generation circuit is respectively connected with the power supply control circuit, the output control circuit, the coding circuit and the sensing measurement circuit and is used for providing clock signals for the power supply control circuit, the output control circuit, the coding circuit and the sensing measurement circuit;
the sensing measurement circuit is connected with the coding circuit and used for converting the acquired analog signals into digital signals and transmitting the digital signals to the coding circuit;
the coding circuit is connected with the output control circuit and the power supply control circuit and is used for coding the digital signal according to a preset coding rule to obtain a coding signal and transmitting the coding signal to the output control circuit and the power supply control circuit;
the output control circuit is connected with the data and power supply common end through the first switch circuit and is used for switching on or switching off a data transmission mode of the sensing signal acquisition circuit according to the clock signal and the coding signal;
the power supply control circuit is connected with the data and power supply public end through the second switch circuit and used for switching on or switching off the measurement mode of the sensing signal acquisition circuit according to the clock signal and the coding signal.
3. The circuit of claim 2, wherein the first switch circuit is an NMOS transistor and the second switch circuit is a PMOS transistor.
4. The circuit of claim 2, wherein the tank circuit is a tank capacitor.
5. The circuit of claim 2, wherein the clock generation circuit is an RC oscillator.
6. The circuit of claim 2, wherein the preset encoding rule comprises:
in a fixed period, the ratio of high level to low level is 1: 3, coding the duty ratio to obtain a first code, wherein the first code represents a low level;
the ratio of high level to low level is 3: the duty cycle of 1 is encoded to obtain a second code, which represents a high level.
7. The circuit of claim 2, wherein the voltage divider circuit is a voltage divider resistor.
8. A method of multiplexing data output with power supply lines, the method comprising:
the sensing signal acquisition circuit automatically switches the working mode, the working mode includes: a data transmission mode and a measurement mode;
when the sensing signal acquisition circuit is in a data transmission mode, the main control circuit transmits data with the sensing signal acquisition circuit sequentially through the input and output ends of the main control circuit, the data and power supply common end of the sensing signal acquisition circuit and the sensing signal acquisition circuit;
when the sensing signal acquisition circuit is in a measurement mode, the power supply circuit supplies power to the sensing signal acquisition circuit through the voltage division circuit, the data of the sensing signal acquisition circuit and the power supply public end in sequence, so that the sensing signal acquisition circuit acquires external data.
9. The method of claim 8, wherein the sensing signal acquisition circuit automatically switches operating modes, comprising:
the power supply control circuit controls the connection or disconnection of the second switch circuit according to a clock signal of the clock generation circuit and a code signal of the coding circuit, the output control circuit controls the connection or disconnection of the first switch circuit according to the clock signal of the clock generation circuit and the code signal of the coding circuit, when the first switch circuit is connected with the second switch circuit and disconnected, the sensing signal acquisition circuit is in a data transmission mode, and when the second switch circuit is connected with the first switch circuit and disconnected, the sensing signal acquisition circuit is in a measurement mode.
10. The method according to claim 9, wherein the coded signal is obtained by coding the digital signal transmitted by the sensing and measuring circuit according to a preset coding rule by a coding circuit; the digital signal is obtained by analog-to-digital conversion of the acquired analog signal by the sensing and measuring circuit.
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