CN105187030A - Oscillator - Google Patents
Oscillator Download PDFInfo
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- CN105187030A CN105187030A CN201510458486.8A CN201510458486A CN105187030A CN 105187030 A CN105187030 A CN 105187030A CN 201510458486 A CN201510458486 A CN 201510458486A CN 105187030 A CN105187030 A CN 105187030A
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- current
- pmos
- mos transistor
- current source
- nmos tube
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Abstract
The invention discloses an oscillator. The oscillator comprises two capacitors, two comparators and an RS trigger; a switch is adopted to control the charge and discharge of each capacitor; a first current source is taken as a charging current source for each capacitor; the first current source provides a mirror current of a second current path and a third current path; a comparison voltage is determined by the gate-source voltage of a first MOS transistor of the second current path; the difference of the gate-source voltages of the first MOS transistor and a second MOS transistor of the third current path is divided by the value of a first resistor of the third current path to determine the magnitude of a third current source, thereby determining the magnitude of the current of the first current source. The gate-source voltage of the MOS transistor in the current source path is directly used as the comparison voltage of the charge and discharge of each capacitor of the oscillator, and therefore, both power consumption and area can be reduced.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit, particularly relate to a kind of oscillator.
Background technology
On sheet, low-power consumption low frequency RC oscillator is at smart card (smartcard), drives, standby clock in the products such as microcontroller (MCU) for LCD, and power on counting etc.Typical case's low-power consumption LFO Frequency is 32KHz, and power consumption is 1 below μ A.Low-power consumption low-frequency oscillator does not rely on external signal input, and simulation benchmark is all that IP (IP core) inside produces, and often because employing the resistance of megohm, area is all very large, and area representative value is 0.1 millimeter
2.
As shown in Figure 1, it is the circuit diagram of existing RC oscillator, oscillator shown in Fig. 1 is the oscillator being applied to low-power consumption low frequency, oscillator mainly comprises: by electric capacity C1 and C2, four switch S 1, S2, S1B and S2B, and the vibration generating portion that two comparators 101 and 102 and rest-set flip-flop 103 form.PMOS P4 provides charging current for electric capacity C1 and C2, reference voltage VREF is input to the inverting input of comparator 101 and 102, the voltage VCAP1 of electric capacity C1 and the voltage VCAP2 of electric capacity C2 and reference voltage VREF compares, the S end or the R end that comparative result are input to rest-set flip-flop 103 realize setting to 0 or putting 1 rest-set flip-flop 103, thus from Q end or the non-end outputting oscillation signal of Q, the oscillator signal that Q end exports is connected to switch S 1 and S2B, the oscillator signal that the non-end of Q exports is connected to switch S 2 and S1B, realize switch S1, S2, the control of S1B and S2B, and the discharge and recharge of control capacitance C1 and C2.
Form mirror current source by PMOS P1 and P2, NMOS tube N1 and N2, wherein PMOS P1 and P2 and P4 is image current relation; The gate source voltage difference of NMOS tube N1 and N2 divided by the electric current in the value determination PMOS P2 of resistance R1 and the path of NMOS tube N2 size thus determine the image current size in each image current path.
There is provided reference voltage VREF by PMOS P3 and resistance R2, wherein PMOS P3 and PMOS P1 and P2 is also in image current relation, is multiplied by the size of the value determination reference voltage VREF of resistance R2 by the electric current in PMOS P3 path.
RC oscillator shown in Fig. 1 employs the resistance of megohm, as resistance R1 and R2 in Fig. 1, and Ip1=Ip2=Δ Vgs/R1, VREF=Ip3 × R2; Ip1, Ip2 and Ip3 represent the electric current of PMOS P1, P2 and P3 respectively, and Δ Vgs represents that the gate source voltage of PMOS P1, P2 is poor; Representative value R1=1M Ω, R2=20 Ω, Ip3=30nA, VREF=0.6V.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of oscillator, can reduce power consumption and area.
For solving the problems of the technologies described above, oscillator provided by the invention comprises: the first electric capacity and the second electric capacity, the first end of described first electric capacity connects the first current source by the first switch, the first end of described first electric capacity is connected by second switch with the second end, the first end of described second electric capacity connects the first current source by the 3rd switch, the first end of described second electric capacity is connected by the 4th switch with the second end, and the second end of described first electric capacity and the second end of described second electric capacity are all connected to common port.
First comparator and the second comparator, the first input end of described first comparator connects the first end of described first electric capacity, and the first input end of described second comparator connects the first end of described second electric capacity; Second input of described first comparator is all connected a comparative voltage with the second input of described first comparator.
Rest-set flip-flop, the S end of described rest-set flip-flop connects the output of described first comparator, the R end of described rest-set flip-flop is connected to the output of described second comparator, the Q end of described rest-set flip-flop and the non-end of Q output frequency signal respectively, the control end that the frequency signal that described Q end exports is connected to described first switch and described 4th switch realizes the control to described first switch and described 4th switch, and the control end that the frequency signal that the non-end of described Q exports is connected to described second switch and described 3rd switch realizes the control to described second switch and described 3rd switch.
Second current path and the 3rd electric current road, described second current path comprises the second current source and the first MOS transistor, and described 3rd current path comprises the 3rd current source and the second MOS transistor.
Described first current source, described second current source and described 3rd current source image current each other.
The grid of the drain electrode of described first MOS transistor, grid and described second MOS transistor links together, the source electrode of described first MOS transistor is connected to described common port, the source electrode of described second MOS transistor is connected to described common port by the first resistance, the drain electrode of described first MOS transistor connects described second current source, the drain electrode of described second metal-oxide-semiconductor connects described 3rd current source, is determined the size of described 3rd current source by the gate source voltage difference of described first MOS transistor and described second MOS transistor divided by the value of described first resistance; The grid of described first MOS transistor is as the output of described comparative voltage, and described comparative voltage is determined by the gate source voltage of described first MOS transistor.
Further improvement is, described first MOS transistor is NMOS tube, and described second metal-oxide-semiconductor is NMOS tube, and described common port is earth terminal.
Further improvement is, described first current source comprises the first PMOS, and described second current source comprises the second PMOS, and described 3rd current source comprises the 3rd PMOS; Grid and the drain electrode of the grid of described first PMOS, the grid of described second PMOS and described 3rd PMOS link together; The source electrode of the source electrode of described first PMOS, the source electrode of described second PMOS and described 3rd PMOS all connects supply voltage; The drain electrode of described first PMOS is the output of described first image current; The drain electrode of described second PMOS is the output of described second image current; The drain electrode of described 3rd PMOS is the output of described 3rd image current.
Further improvement is, described first MOS transistor is PMOS, and described second metal-oxide-semiconductor is PMOS, and described common port is power voltage terminal.
Further improvement is, described first current source comprises the first NMOS tube, and described second current source comprises the second NMOS tube, and described 3rd current source comprises the 3rd NMOS tube; Grid and the drain electrode of the grid of described first NMOS tube, the grid of described second NMOS tube and described 3rd NMOS tube link together; Source electrode all ground connection of the source electrode of described first NMOS tube, the source electrode of described second NMOS tube and described 3rd NMOS tube; The drain electrode of described first NMOS tube is the output of described first image current; The drain electrode of described second NMOS tube is the output of described second image current; The drain electrode of described 3rd NMOS tube is the output of described 3rd image current.
Further improvement is, the value of described first resistance is 1M Ω.
The comparative voltage of the abundant electricity of the electric capacity of oscillator of the present invention directly adopts the gate source voltage of the MOS transistor in current source path, the extra current path with mega-ohms resistance is adopted relative to needing in prior art, the present invention can save the power consumption adopting the current path of the area shared by mega-ohms resistance and increase to bring, so the present invention can make power consumption and area be reduced.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Fig. 1 is the circuit diagram of existing RC oscillator;
Fig. 2 is the circuit diagram of embodiment of the present invention oscillator.
Embodiment
As shown in Figure 2, be the circuit diagram of embodiment of the present invention oscillator.Embodiment of the present invention oscillator comprises: the first electric capacity C1 and the second electric capacity C2, the first end of described first electric capacity C1 connects the first current source by the first switch S 1, the first end of described first electric capacity C1 is connected by second switch S1B with the second end, the first end of described second electric capacity C2 connects the first current source by the 3rd switch S 2, the first end of described second electric capacity C2 is connected by the 4th switch S 2B with the second end, and second end of described first electric capacity C1 and second end of described second electric capacity C2 are all connected to common port.
First comparator 101 and the second comparator 102, the first input end of described first comparator 101 connects the first end of described first electric capacity C1, and the first input end of described second comparator 102 connects the first end of described second electric capacity C2; Second input of described first comparator 101 is all connected a comparative voltage VREF with the second input of described first comparator 101.
Rest-set flip-flop 103, the S end of described rest-set flip-flop 103 connects the output of described first comparator 101, the R end of described rest-set flip-flop 103 is connected to the output of described second comparator 102, the Q end of described rest-set flip-flop 103 and the non-end of Q output frequency signal respectively, the control end that described Q holds the frequency signal exported to be connected to described first switch S 1 and described 4th switch S 2B realizes the control to described first switch S 1 and described 4th switch S 2B, the control end that the frequency signal that the non-end of described Q exports is connected to described second switch S1B and described 3rd switch S 2 realizes the control to described second switch S1B and described 3rd switch S 2.
Second current path and the 3rd electric current road, described second current path comprises the second current source and the first MOS transistor N1, and described 3rd current path comprises the 3rd current source and the second MOS transistor N2.
Described first current source, described second current source and described 3rd current source image current each other.
The grid of the drain electrode of described first MOS transistor N1, grid and described second MOS transistor N2 links together, the source electrode of described first MOS transistor N1 is connected to described common port, the source electrode of described second MOS transistor N2 is connected to described common port by the first resistance R1, and the value of described first resistance R1 is 1M Ω.The drain electrode of described first MOS transistor N1 connects described second current source, the drain electrode of described second MOS transistor N2 connects described 3rd current source, is determined the size of described 3rd current source by the gate source voltage difference of described first MOS transistor N1 and described second MOS transistor N2 divided by the value of described first resistance R1; The grid of described first MOS transistor N1 is as the output of described comparative voltage VREF, and described comparative voltage VREF is determined by the gate source voltage of described first MOS transistor N1.
In the embodiment of the present invention, described first MOS transistor N1 is NMOS tube, and described second MOS transistor N2 is NMOS tube, and described common port is earth terminal.
Described first current source comprises the first PMOS P4, and described second current source comprises the second PMOS P1, and described 3rd current source comprises the 3rd PMOS P2; Grid and the drain electrode of the grid of described first PMOS P4, the grid of described second PMOS P1 and described 3rd PMOS P2 link together; The source electrode of the source electrode of described first PMOS P4, the source electrode of described second PMOS P1 and described 3rd PMOS P2 all connects supply voltage; The drain electrode of described first PMOS P4 is the output of described first image current; The drain electrode of described second PMOS P1 is the output of described second image current; The drain electrode of described 3rd PMOS P2 is the output of described 3rd image current.
Known shown in comparison diagram 1 and Fig. 2, the present invention directly adopts the gate source voltage of NMOS tube N1 as comparative voltage VREF, and need in Fig. 1 to adopt the current path shown in dotted line frame 201 to form reference voltage VREF, resistance R2 is mega-ohms, so the embodiment of the present invention can save the power consumption adopting the current path of the area shared by mega-ohms resistance and increase to bring, so the present invention can make power consumption and area be reduced.
The type of MOS transistor does corresponding conversion, can derive other implementations, as in other embodiment again, also can be:
Described first MOS transistor N1 is PMOS, and described second MOS transistor N2 is PMOS, and described common port is power voltage terminal.
Described first current source comprises the first NMOS tube, and described second current source comprises the second NMOS tube, and described 3rd current source comprises the 3rd NMOS tube; Grid and the drain electrode of the grid of described first NMOS tube, the grid of described second NMOS tube and described 3rd NMOS tube link together; Source electrode all ground connection of the source electrode of described first NMOS tube, the source electrode of described second NMOS tube and described 3rd NMOS tube; The drain electrode of described first NMOS tube is the output of described first image current; The drain electrode of described second NMOS tube is the output of described second image current; The drain electrode of described 3rd NMOS tube is the output of described 3rd image current.
Above by specific embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (6)
1. an oscillator, is characterized in that, comprising:
First electric capacity and the second electric capacity, the first end of described first electric capacity connects the first current source by the first switch, the first end of described first electric capacity is connected by second switch with the second end, the first end of described second electric capacity connects the first current source by the 3rd switch, the first end of described second electric capacity is connected by the 4th switch with the second end, and the second end of described first electric capacity and the second end of described second electric capacity are all connected to common port;
First comparator and the second comparator, the first input end of described first comparator connects the first end of described first electric capacity, and the first input end of described second comparator connects the first end of described second electric capacity; Second input of described first comparator is all connected a comparative voltage with the second input of described first comparator;
Rest-set flip-flop, the S end of described rest-set flip-flop connects the output of described first comparator, the R end of described rest-set flip-flop is connected to the output of described second comparator, the Q end of described rest-set flip-flop and the non-end of Q output frequency signal respectively, the control end that the frequency signal that described Q end exports is connected to described first switch and described 4th switch realizes the control to described first switch and described 4th switch, and the control end that the frequency signal that the non-end of described Q exports is connected to described second switch and described 3rd switch realizes the control to described second switch and described 3rd switch;
Second current path and the 3rd electric current road, described second current path comprises the second current source and the first MOS transistor, and described 3rd current path comprises the 3rd current source and the second MOS transistor;
Described first current source, described second current source and described 3rd current source image current each other;
The grid of the drain electrode of described first MOS transistor, grid and described second MOS transistor links together, the source electrode of described first MOS transistor is connected to described common port, the source electrode of described second MOS transistor is connected to described common port by the first resistance, the drain electrode of described first MOS transistor connects described second current source, the drain electrode of described second metal-oxide-semiconductor connects described 3rd current source, is determined the size of described 3rd current source by the gate source voltage difference of described first MOS transistor and described second MOS transistor divided by the value of described first resistance; The grid of described first MOS transistor is as the output of described comparative voltage, and described comparative voltage is determined by the gate source voltage of described first MOS transistor.
2. oscillator as claimed in claim 1, it is characterized in that: described first MOS transistor is NMOS tube, described second metal-oxide-semiconductor is NMOS tube, and described common port is earth terminal.
3. oscillator as claimed in claim 2, it is characterized in that: described first current source comprises the first PMOS, described second current source comprises the second PMOS, and described 3rd current source comprises the 3rd PMOS;
Grid and the drain electrode of the grid of described first PMOS, the grid of described second PMOS and described 3rd PMOS link together;
The source electrode of the source electrode of described first PMOS, the source electrode of described second PMOS and described 3rd PMOS all connects supply voltage;
The drain electrode of described first PMOS is the output of described first image current; The drain electrode of described second PMOS is the output of described second image current; The drain electrode of described 3rd PMOS is the output of described 3rd image current.
4. oscillator as claimed in claim 1, it is characterized in that: described first MOS transistor is PMOS, described second metal-oxide-semiconductor is PMOS, and described common port is power voltage terminal.
5. oscillator as claimed in claim 4, it is characterized in that: described first current source comprises the first NMOS tube, described second current source comprises the second NMOS tube, and described 3rd current source comprises the 3rd NMOS tube;
Grid and the drain electrode of the grid of described first NMOS tube, the grid of described second NMOS tube and described 3rd NMOS tube link together;
Source electrode all ground connection of the source electrode of described first NMOS tube, the source electrode of described second NMOS tube and described 3rd NMOS tube;
The drain electrode of described first NMOS tube is the output of described first image current; The drain electrode of described second NMOS tube is the output of described second image current; The drain electrode of described 3rd NMOS tube is the output of described 3rd image current.
6. oscillator as claimed in claim 1, is characterized in that: the value of described first resistance is 1M Ω.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510458486.8A CN105187030B (en) | 2015-07-30 | 2015-07-30 | Oscillator |
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| CN201510458486.8A CN105187030B (en) | 2015-07-30 | 2015-07-30 | Oscillator |
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| CN105187030A true CN105187030A (en) | 2015-12-23 |
| CN105187030B CN105187030B (en) | 2018-06-19 |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107171643A (en) * | 2017-05-30 | 2017-09-15 | 长沙方星腾电子科技有限公司 | A kind of pierce circuit |
| CN107690749A (en) * | 2017-08-07 | 2018-02-13 | 深圳市汇顶科技股份有限公司 | Oscillator, integrated circuit, timing chip and electronic equipment |
| CN109257032A (en) * | 2018-07-26 | 2019-01-22 | 上海华虹宏力半导体制造有限公司 | Low-frequency oscillator |
| CN109327204A (en) * | 2018-09-29 | 2019-02-12 | 上海华虹宏力半导体制造有限公司 | Pierce circuit |
| CN111124031A (en) * | 2018-10-31 | 2020-05-08 | 圣邦微电子（北京）股份有限公司 | Test control circuit of current-limiting circuit |
| CN112202422A (en) * | 2020-09-28 | 2021-01-08 | 上海华虹宏力半导体制造有限公司 | Low frequency OSC circuit |
| CN113346878A (en) * | 2021-06-17 | 2021-09-03 | 南京英锐创电子科技有限公司 | Clock circuit and electronic device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050237118A1 (en) * | 2004-04-27 | 2005-10-27 | Mader Urs H | Precision relaxation oscillator without comparator delay errors |
| CN103023461A (en) * | 2011-09-28 | 2013-04-03 | 华润矽威科技（上海）有限公司 | RC (remote control) oscillating circuit |
| CN103312298A (en) * | 2013-07-05 | 2013-09-18 | 东南大学 | Relaxation oscillator for increasing frequency-control current linearity |
-
2015
- 2015-07-30 CN CN201510458486.8A patent/CN105187030B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050237118A1 (en) * | 2004-04-27 | 2005-10-27 | Mader Urs H | Precision relaxation oscillator without comparator delay errors |
| CN103023461A (en) * | 2011-09-28 | 2013-04-03 | 华润矽威科技（上海）有限公司 | RC (remote control) oscillating circuit |
| CN103312298A (en) * | 2013-07-05 | 2013-09-18 | 东南大学 | Relaxation oscillator for increasing frequency-control current linearity |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107171643A (en) * | 2017-05-30 | 2017-09-15 | 长沙方星腾电子科技有限公司 | A kind of pierce circuit |
| CN107690749A (en) * | 2017-08-07 | 2018-02-13 | 深圳市汇顶科技股份有限公司 | Oscillator, integrated circuit, timing chip and electronic equipment |
| CN107690749B (en) * | 2017-08-07 | 2021-08-13 | 深圳市汇顶科技股份有限公司 | Oscillator, integrated circuit, timing chip and electronic device |
| CN109257032A (en) * | 2018-07-26 | 2019-01-22 | 上海华虹宏力半导体制造有限公司 | Low-frequency oscillator |
| CN109327204A (en) * | 2018-09-29 | 2019-02-12 | 上海华虹宏力半导体制造有限公司 | Pierce circuit |
| CN111124031A (en) * | 2018-10-31 | 2020-05-08 | 圣邦微电子（北京）股份有限公司 | Test control circuit of current-limiting circuit |
| CN112202422A (en) * | 2020-09-28 | 2021-01-08 | 上海华虹宏力半导体制造有限公司 | Low frequency OSC circuit |
| CN113346878A (en) * | 2021-06-17 | 2021-09-03 | 南京英锐创电子科技有限公司 | Clock circuit and electronic device |
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| Publication number | Publication date |
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| CN105187030B (en) | 2018-06-19 |
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