CN111294002B - Integrated circuit capable of preparing multiple channels of high-precision operational amplifiers simultaneously - Google Patents
Integrated circuit capable of preparing multiple channels of high-precision operational amplifiers simultaneously Download PDFInfo
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Abstract
The invention relates to an integrated circuit capable of preparing multiple channels of high-precision operational amplifiers simultaneously, when an operational amplifier unit block is integrally packaged, a reference oscillator circuit is selected as an oscillator unit of the high-precision operational amplifier through an inter-unit oscillator signal processing circuit, so that the high-precision operational amplifier performs required operational amplification according to an oscillator signal of the selected oscillator unit; when the operational amplifier unit bodies in the operational amplifier unit blocks are cut and respectively packaged by the dicing channels, the reference unit high-precision operational amplifier and the non-reference unit high-precision operational amplifier can be obtained at the same time, the reference unit high-precision operational amplifier performs required operational amplification according to the oscillator signals of the reference oscillator circuit, the non-reference unit high-precision operational amplifier performs required operational amplification according to the oscillator signals of the non-reference oscillator circuit, different channel package manufacturing of the required high-precision operational amplifier can be realized, the package manufacturing cost is reduced, and the method is safe and reliable.
Description
Technical Field
The invention relates to an integrated circuit, in particular to an integrated circuit capable of simultaneously preparing high-precision operational amplifiers of multiple channels, and belongs to the technical field of high-precision operational amplifiers.
Background
Operational amplifiers (OperationalAmplifier) are widely used in integrated circuits, and commonly used operational amplifiers generally include single channel operational amplifiers, dual channel operational amplifiers, and four-channel operational amplifiers.
Currently, high precision operational amplifiers are typically fabricated in the form of integrated circuits. For the high-precision operational amplifiers, the oscillator unit capable of generating clock signals is further included, namely at least one oscillator unit exists in each high-precision operational amplifier; for example, in the design, an oscillator unit can be designed in a single-channel high-precision operational amplifier and a dual-channel high-precision operational amplifier. In the process of the integrated circuit, the single-channel high-precision operational amplifier can be directly utilized to package to obtain the dual-channel high-precision operational amplifier, at this time, two oscillator units exist in the obtained dual-channel high-precision operational amplifier, generally, the frequencies of clock signals generated by the two oscillator units are deviated, so that intermodulation can be generated during the operation of the two oscillator units in the dual-channel high-precision operational amplifier obtained by the single-channel high-precision operational amplifier, interference is generated, and the operation of the packaged dual-channel high-precision operational amplifier is influenced.
In order to ensure the working reliability of the dual-channel high-precision operational amplifier, the process of the dual-channel high-precision operational amplifier can be directly designed in the integrated circuit design, only one oscillator unit is arranged in the dual-channel high-precision operational amplifier obtained during packaging, namely, the dual-channel high-precision operational amplifier and the single-channel high-precision operational amplifier adopt two independent masks to respectively carry out two independent integrated circuit designs, so that the single-channel operational amplifier cannot be obtained by utilizing the integrated circuit package in the state, and the design and manufacturing cost can be increased.
For the integrated circuit design that the single-channel high-precision operational amplifier and the double-channel high-precision operational amplifier share one mask, one mask layer needs to be modified at last, in this case, the packaging manufacture of the single-channel high-precision operational amplifier or the packaging manufacture of the double-channel high-precision operational amplifier can be realized by utilizing a mode of modifying the mask, but the design and manufacturing cost are increased by modifying the mask. In addition, for the dual-channel high-precision operational amplifier obtained by packaging the single-channel high-precision operational amplifier, the oscillator unit in the dual-channel high-precision operational amplifier can be set in a wire bonding mode during packaging so as to ensure the working reliability of the dual-channel high-precision operational amplifier; but the same increases the cost by means of wire bonding.
It is known to those skilled in the art that, similar to the relationship between the dual-channel high-precision operational amplifier and the single-channel high-precision operational amplifier, the dual-channel high-precision operational amplifier and the dual-channel high-precision operational amplifier have the same problems in package manufacturing, i.e., the high-precision operational amplifiers of different channels cannot be prepared simultaneously and effectively without significantly increasing the design and manufacturing cost.
Disclosure of Invention
The invention aims to overcome the defects in the prior art, and provides an integrated circuit capable of simultaneously preparing multiple channel high-precision operational amplifiers, which has a compact structure, can simultaneously prepare the packaging manufacture of the required channel high-precision operational amplifiers, reduces the cost of the packaging manufacture, has a wide application range, and is safe and reliable.
According to the technical scheme provided by the invention, the integrated circuit capable of realizing the high-precision operational amplifiers with various channels comprises a wafer body and a plurality of operational amplifier unit blocks prepared on the wafer body, wherein each operational amplifier unit block comprises two operational amplifier unit bodies and scribing channels for spacing the operational amplifier unit bodies, and the operational amplifier unit bodies are positioned at two sides of each scribing channel; each operational amplifier unit body comprises an operational amplifier circuit and an oscillator circuit which is matched with the operational amplifier circuit;
An inter-unit oscillator signal processing circuit is further provided in each operational amplifier unit block, in which one operational amplifier unit is set as a reference unit operational amplifier and the other operational amplifier unit is set as a non-reference unit operational amplifier; in the reference unit operational amplifier, a reference oscillator circuit is connected with a reference operational amplifier circuit and an inter-unit oscillator signal processing circuit in an adaptive manner; in the non-reference unit operational amplifier, a non-reference operational amplifier circuit is connected with a non-reference oscillator circuit in an adaptive manner through an inter-unit oscillator signal processing circuit;
When the high-precision operational amplifier is obtained by integrally packaging the operational amplifier unit blocks, a reference oscillator circuit is selected as an oscillator unit of the high-precision operational amplifier through an inter-unit oscillator signal processing circuit, so that the high-precision operational amplifier performs required operational amplification according to an oscillator signal of the selected oscillator unit;
When the operational amplifier unit bodies in the operational amplifier unit blocks are cut and respectively packaged by the dicing streets, the reference unit high-precision operational amplifier and the non-reference unit high-precision operational amplifier can be obtained simultaneously, and the reference unit high-precision operational amplifier performs required operational amplification according to the oscillator signal of the reference oscillator circuit, and the non-reference unit high-precision operational amplifier performs required operational amplification according to the oscillator signal of the non-reference oscillator circuit.
The inter-unit oscillator signal processing circuit comprises a selection signal generating circuit and a signal selecting circuit arranged on the non-reference unit operational amplifier, wherein the selection signal generating circuit, the reference oscillator circuit and the non-reference oscillator circuit can be connected with the non-reference operational amplifier circuit through the signal selecting circuit;
The selection signal generating circuit comprises a reference unit part circuit arranged in the reference unit operational amplifier, a scribing channel wire arranged in the scribing channel and a non-reference unit part circuit arranged in the non-reference unit operational amplifier, wherein the reference unit part circuit is connected with the non-reference unit part circuit through the scribing channel wire;
when the operational amplifier unit block is integrally packaged to obtain a required high-precision operational amplifier, the reference unit part circuit is kept connected with the non-reference unit part circuit through a scribing line wire, a selection signal generating circuit loads a reference oscillator circuit selection signal to a signal selecting circuit, and the signal selecting circuit can enable the non-reference operational amplifier circuit to receive an oscillator signal of the reference oscillator circuit according to the reference oscillator circuit selection signal;
When the operational amplifier unit bodies in the operational amplifier unit blocks are cut and respectively packaged by the dicing channels, the dicing channel wires are in a disconnected state, and the reference unit part circuit and the non-reference unit part circuit are disconnected through the dicing channel wires, and the reference oscillator circuit and the signal selection circuit are electrically connected; the selection signal generating circuit loads a non-reference oscillator circuit selection signal to the signal selecting circuit, and the signal selecting circuit enables the non-reference operational amplifying circuit to receive the oscillator signal of the non-reference oscillator circuit according to the non-reference oscillator selection signal.
The signal selection generating circuit comprises an inverter U1 and an inverter U2, wherein the output end of the inverter U1 is connected with the input end of the inverter U2, and the output end of the inverter U1 and the output end of the inverter U2 are both connected with the signal selection circuit;
The input end of the inverter U1 is connected with one end of a capacitor C1, one end of a scribing line lead and the drain end of a PMOS tube P2, the other end of the capacitor C1 is grounded, the other end of the scribing line lead is grounded through a resistor R1, the gate end of the PMOS tube P2 is connected with the gate end of the PMOS tube P1 and the drain end of the PMOS tube P1, the drain end of the PMOS tube P1 is grounded through a current source I1, and the source end of the PMOS tube P1 and the source end of the PMOS tube P2 are connected with a power supply VDD.
The signal selection circuit comprises an AND gate U3, an AND gate U4 and an OR gate U5, wherein the input end of the AND gate U3 is connected with the output end of the inverter U1 and the output end of the reference oscillator circuit, the input end of the AND gate U4 is connected with the output end of the inverter U2 and the output end of the non-reference oscillator circuit, the output end of the AND gate U3 and the output end of the AND gate U4 are connected with the input end of the OR gate U5, and the output end of the OR gate U5 is connected with the non-reference operational amplifier circuit.
The operational amplifier unit body is a single-channel high-precision operational amplifier or a multi-channel high-precision operational amplifier.
The width of the scribing channel is 60-80 mu m.
The invention has the advantages that: setting an inter-unit oscillator signal processing circuit in each operational amplifier unit block, and when the operational amplifier unit blocks are integrally packaged to obtain a required high-precision operational amplifier, selecting a reference oscillator circuit as an oscillator unit of the high-precision operational amplifier through the inter-unit oscillator signal processing circuit so that the high-precision operational amplifier performs the required operational amplification according to an oscillator signal of the selected oscillator unit; when the operational amplifier unit bodies in the operational amplifier unit blocks are cut and respectively packaged by the dicing channels, the reference unit high-precision operational amplifier and the non-reference unit high-precision operational amplifier can be obtained simultaneously, the reference unit high-precision operational amplifier performs required operational amplification according to the oscillator signals of the reference oscillator circuit, the non-reference unit high-precision operational amplifier performs required operational amplification according to the oscillator signals of the non-reference oscillator circuit, and the packaging and manufacturing of the required channel high-precision operational amplifier can be prepared simultaneously, so that the cost of packaging and manufacturing is reduced, the application range is wide, and the method is safe and reliable.
Drawings
FIG. 1 is a schematic view of a wafer body according to the present invention.
Fig. 2 is a schematic diagram of an operational amplifier cell block according to the present invention.
Fig. 3 is a schematic circuit diagram of the signal selection generating circuit of the present invention.
Fig. 4 is a schematic circuit diagram of a signal selection circuit according to the present invention.
Reference numerals illustrate: 1-wafer body, 2-reference unit operational amplifier, 3-non-reference unit operational amplifier, 4-scribe line, 5-scribe line wire and 6-operational amplifier unit block.
Detailed Description
The invention will be further described with reference to the following specific drawings and examples.
As shown in fig. 1 and 2: in order to realize the packaging manufacture of the high-precision operational amplifier of the required channel and reduce the cost of the packaging manufacture, the invention comprises a wafer body 1 and a plurality of operational amplifier unit blocks 6 prepared on the wafer body 1, wherein each operational amplifier unit block 6 comprises two operational amplifier unit bodies and a scribing channel 4 for spacing the operational amplifier unit bodies, and the operational amplifier unit bodies are positioned at two sides of the scribing channel 4; each operational amplifier unit body comprises an operational amplifier circuit and an oscillator circuit which is matched with the operational amplifier circuit;
An inter-cell oscillator signal processing circuit is further provided in each operational amplifier cell block 6, and in the operational amplifier cell block 6, one operational amplifier cell is set as a reference cell operational amplifier, and the other operational amplifier cell is set as a non-reference cell operational amplifier; in the reference unit operational amplifier, a reference oscillator circuit is connected with a reference operational amplifier circuit and an inter-unit oscillator signal processing circuit in an adaptive manner; in the non-reference unit operational amplifier, a non-reference operational amplifier circuit is connected with a non-reference oscillator circuit in an adaptive manner through an inter-unit oscillator signal processing circuit;
when the operational amplifier unit block 6 is integrally packaged to obtain a required high-precision operational amplifier, a reference oscillator circuit is selected as an oscillator unit of the high-precision operational amplifier through an inter-unit oscillator signal processing circuit, so that the high-precision operational amplifier performs the required operational amplification according to an oscillator signal of the selected oscillator unit;
When the operational amplifier unit bodies in the operational amplifier unit block 6 are cut and individually packaged by the dicing streets 4, the reference unit high-precision operational amplifier and the non-reference unit high-precision operational amplifier can be obtained simultaneously, and the reference unit high-precision operational amplifier performs the required operational amplification according to the oscillator signal of the reference oscillator circuit, and the non-reference unit high-precision operational amplifier performs the required operational amplification according to the oscillator signal of the non-reference oscillator circuit.
Specifically, the wafer 1 may be made of a conventional semiconductor material, and the operational amplifier unit blocks 6 can be fabricated on the wafer 1 by conventional integrated circuit technology, and generally, a large number of operational amplifier unit blocks 6 can be fabricated on one wafer 1, each operational amplifier unit block 6 may have the same structural form, and the process of fabricating the operational amplifier unit block 6 by using the wafer 1 is well known to those skilled in the art and will not be described herein. In the specific implementation, each operational amplifier unit block 6 has two operational amplifier unit bodies and dicing lanes 4, and the dicing lanes 4 of the operational amplifier unit blocks 6 located in the same column are corresponding, i.e. all the dicing lanes 4 of the operational amplifier unit blocks 6 in the same column are on the same straight line. Each operational amplifier unit body in the operational amplifier unit block 6 has a complete operational amplifier function, and of course, the operational amplifier unit block 6 also has a complete operational amplifier function, a specific circuit form of the operational amplifier unit body can be selected according to needs, and a specific positional relationship and an action between the dicing streets 4 and the operational amplifier unit body are consistent with the prior art, and are specifically known to those skilled in the art, and are not repeated herein.
As can be seen from the description of the background art, for the high-precision operational amplifier, each operational amplifier unit body includes an operational amplifier circuit and an oscillator circuit, wherein the operational amplifier circuit can realize the function of operational amplification, the oscillator circuit can provide the clock signal required by the operational amplifier circuit, and the matching relationship between the operational amplifier circuit and the oscillator circuit is consistent with that of the existing high-precision operational amplifier, which is well known to those skilled in the art, and is not repeated here.
In the embodiment of the present invention, an inter-cell oscillator signal processing circuit is also provided in each operational amplifier cell block 6. For convenience of explanation, when any one of the two operational amplifier units in the operational amplifier unit block 6 is set as the reference unit operational amplifier 2, the other operational amplifier unit in the operational amplifier unit block 6 automatically becomes the non-reference unit operational amplifier 3. In the specific implementation, after the reference cell operational amplifier 2 is set and obtained, the operational amplifier circuit in the reference cell operational amplifier 2 becomes a reference operational amplifier circuit, and the oscillator circuit in the reference cell operational amplifier 2 becomes a reference oscillator circuit. Similarly, after the non-reference unit operational amplifier 3 is obtained, the operational amplifier circuit in the non-reference unit operational amplifier 3 becomes a non-reference operational amplifier circuit, and the oscillator circuit in the non-reference unit operational amplifier 3 becomes a non-reference oscillator circuit. As is clear from the background, the frequency of the clock signal generated by the reference oscillator circuit is deviated from the frequency of the clock signal generated by the non-reference oscillator circuit.
In the reference unit operational amplifier 2, the reference oscillator circuit is connected to the reference operational amplifier circuit, and the reference oscillator circuit is also connected to the inter-unit oscillator signal processing circuit. In the non-reference operational amplifier 3, the non-reference oscillator circuit is connected to the inter-unit oscillator signal processing circuit, and the inter-unit oscillator signal processing circuit is connected to the non-reference operational amplifier circuit in the non-reference operational amplifier 3, that is, in the reference unit operational amplifier 2, the oscillator signal of the reference operational amplifier circuit is directly provided by the reference oscillator circuit, whereas in the non-reference unit operational amplifier 3, the oscillator signal of the non-reference operational amplifier circuit is provided after being correspondingly processed by the inter-unit oscillator signal processing circuit, and generally, the oscillator signal provided to the non-reference operational amplifier circuit by the inter-unit oscillator signal processing circuit is selected according to the actual situation, and is described in more detail below.
As is well known in the art, when the wafer 1 is used to manufacture a packaged high-precision operational amplifier, the corresponding high-precision operational amplifier can be obtained by integrally packaging the operational amplifier unit block 6, or the reference unit operational amplifier 2 and the non-reference unit operational amplifier 3 are respectively packaged, and the high-precision operational amplifiers of different types of channels can be obtained if the specific packaging types are different. In general, the operational amplifier unit is a single-channel high-precision operational amplifier or a multi-channel high-precision operational amplifier, that is, after the operational amplifier unit is packaged separately, a single-channel high-precision operational amplifier or a multi-channel high-precision operational amplifier can be obtained, where the number of channels of the multi-channel high-precision operational amplifier is greater than or equal to two. Specifically, when the operational amplifier unit body is packaged to obtain a single-channel high-precision operational amplifier, then the operational amplifier unit block 6 is integrally packaged to obtain a double-channel high-precision operational amplifier; when the operational amplifier unit is packaged to obtain a dual-channel high-precision operational amplifier, the operational amplifier unit block 6 is packaged as a whole to obtain a four-channel high-precision operational amplifier, and the other cases are similar, and will not be described in detail here. The channel forms of the reference unit operational amplifier 2 and the non-reference unit operational amplifier 3, which are specifically and individually packaged to obtain the high-precision operational amplifier, can be selected according to needs, and are generally designed and determined in advance in the design and manufacturing process of the wafer body 1, and the specific design and determination process is consistent with the existing process, and is specifically known to those skilled in the art, and is not repeated here.
In the embodiment of the invention, when the operational amplifier unit block 6 is integrally packaged to obtain the required high-precision operational amplifier, the reference oscillator circuit is selected as the oscillator unit of the high-precision operational amplifier through the inter-unit oscillator signal processing circuit, so that the high-precision operational amplifier performs the required operational amplification according to the oscillator signal of the selected oscillator unit, namely, the high-precision operational amplifier obtained by integrally packaging the operational amplifier unit block 6 only receives the oscillator signal of the reference oscillator circuit, thereby avoiding the interference caused by the inter-oscillator signal when the reference oscillator circuit and the non-reference oscillator circuit exist in the integrated circuit, and ensuring the reliability of the operation of the packaged high-precision operational amplifier.
Further, when the operational amplifier unit bodies in the operational amplifier unit block 6 are cut and individually packaged by the dicing streets 4, the reference unit high-precision operational amplifier and the non-reference unit high-precision operational amplifier can be obtained simultaneously, and the reference unit high-precision operational amplifier performs a desired operational amplification based on the oscillator signal of the reference oscillator circuit, and the non-reference unit high-precision operational amplifier performs a desired operational amplification based on the oscillator signal of the non-reference oscillator circuit.
In the embodiment of the present invention, the reference unit operational amplifier 2 and the non-reference unit operational amplifier 3 may be packaged separately, and at this time, the dicing street 4 needs to be cut and packaged, and at this time, the reference unit high-precision operational amplifier may be obtained by using the reference unit operational amplifier 2, and the non-reference unit high-precision operational amplifier may be obtained by using the non-reference unit operational amplifier 3. After the operational amplifier unit block 6 is cut and packaged by the scribe lane 4, the reference unit high-precision operational amplifier can perform operational amplification according to the oscillator signal of the reference oscillator circuit, but the reference unit high-precision operational amplifier does not perform operational amplification according to the oscillator signal of the non-reference oscillator circuit, that is, normal use and operation of the reference unit high-precision operational amplifier and the non-reference unit high-precision operational amplifier are not affected when the operational amplifier unit block 6 is cut and packaged by the scribe lane 4.
In the implementation, the process of integrally packaging the operational amplifier unit block 6 on the wafer body 1 or cutting and packaging the operational amplifier unit block 6 by using the scribe line 4 is consistent with the existing process, which is well known to those skilled in the art, and will not be described herein. As can be seen from the above description, at present, when packaging is performed, the oscillator unit needs to be set correspondingly by means of wire bonding or the like for the high-precision operational amplifier of multiple channels, but in the embodiment of the invention, when the operational amplifier unit block 6 is packaged as a whole, or when the operational amplifier unit block 6 is packaged after being cut by the dicing street 4, the high-precision operational amplifier of different channels is directly packaged without wire bonding, so that under the condition of not increasing the packaging cost, the packaging of the high-precision operational amplifier of different channels can be realized, and a chip manufacturer can package the high-precision operational amplifier of different channels as required conveniently.
As can be seen from the above description, the structures such as the operational amplifier unit block 6 and the scribe line 4 are prepared by using a common integrated circuit process, and when the high-precision operational amplifiers with different channels are obtained by packaging, only the inter-unit oscillator signal processing circuit needs to be added, and the inter-unit oscillator signal processing circuit is adaptively connected with the reference unit operational amplifier 2 and the non-reference unit operational amplifier 3, so that the high-precision operational amplifier is compatible with the prior art, and the cost for realizing the packaging of the high-precision operational amplifiers with multiple channels is effectively reduced.
Further, the inter-unit oscillator signal processing circuit comprises a selection signal generating circuit and a signal selecting circuit arranged on the non-reference unit operational amplifier, wherein the selection signal generating circuit, the reference oscillator circuit and the non-reference oscillator circuit can be connected with the non-reference operational amplifier circuit through the signal selecting circuit;
The selection signal generating circuit comprises a reference unit part circuit arranged in the reference unit operational amplifier, a scribing channel wire 5 arranged in the scribing channel 4 and a non-reference unit part circuit arranged in the non-reference unit operational amplifier, wherein the reference unit part circuit is connected with the non-reference unit part circuit through the scribing channel wire 5;
When the operational amplifier unit block 6 is integrally packaged to obtain a required high-precision operational amplifier, the reference unit part circuit is kept connected with the non-reference unit part circuit through the scribing line lead 5, the selection signal generating circuit loads a reference oscillator circuit selection signal to the signal selecting circuit, and the signal selecting circuit can enable the non-reference operational amplifier circuit to receive an oscillator signal of the reference oscillator circuit according to the reference oscillator circuit selection signal;
When the operational amplifier unit bodies in the operational amplifier unit block 6 are cut and respectively packaged by the dicing street 4, the dicing street wire 5 is in a disconnected state, and the reference unit part circuit and the non-reference unit part circuit are disconnected by the dicing street wire 5, and the reference oscillator circuit and the signal selection circuit are electrically connected; the selection signal generating circuit loads a non-reference oscillator circuit selection signal to the signal selecting circuit, and the signal selecting circuit enables the non-reference operational amplifying circuit to receive the oscillator signal of the non-reference oscillator circuit according to the non-reference oscillator selection signal.
In the embodiment of the invention, the inter-unit oscillator signal processing circuit comprises a selection signal generating circuit and a signal selecting circuit, wherein the selection signal generating circuit, the reference oscillator circuit and the non-reference oscillator circuit are all connected with the signal selecting circuit, and the signal selecting circuit is connected with the non-reference operational amplifier circuit in the non-reference unit operational amplifier 3, namely the oscillator signal of the reference oscillator circuit or the oscillator signal of the non-reference oscillator circuit can be selected through the signal selecting circuit according to the selection signal generating circuit.
Specifically, the reference cell portion circuit is located in the reference cell operational amplifier 2, the non-reference cell portion circuit is located in the non-reference cell operational amplifier 3, the scribe line wire 5 is provided in the scribe line 4, and the reference cell portion circuit is connected to the non-reference cell portion circuit through the scribe line wire 5. In addition, a connection line group is further disposed on the scribe line 4, and the connection line group includes connection lines connecting the reference oscillator circuit and the signal selection circuit, and AVDD connection lines and AGND connection lines connecting the reference unit operational amplifier 2 and the non-reference unit operational amplifier 3, that is, AVDD of the reference unit operational amplifier 2 is electrically connected to AVDD of the non-reference unit operational amplifier 3 through the corresponding scribe line wire 5, and AGND of the reference unit operational amplifier 2 is electrically connected to AGND of the non-reference unit operational amplifier 3 through the corresponding scribe line wire 5, and the AVDD connection lines, AGND connection lines, and connection lines connecting the reference oscillator circuit and the signal selection circuit are mutually independent connection lines, as shown in fig. 2, the relationship and arrangement of specific connection lines are consistent with the prior art, and are not repeated herein. Typically, the scribe line 4 is 60 μm to 80 μm, and the scribe line wires 5 and the corresponding connection line groups can be conveniently arranged by using the width of the scribe line 4.
When the operational amplifier unit block 6 is packaged as a whole, the dicing street 4 is not required to cut the operational amplifier unit block 6, at this time, the connection state between the dicing street wire 5 and the connection wire group in the dicing street 4 is kept, at this time, the selection signal generating circuit loads the reference oscillator circuit selection signal to the signal selection circuit, the signal selection circuit can select the oscillator signal of the reference oscillator circuit according to the reference oscillator circuit selection signal, and the signal selection circuit can enable the non-reference operational amplifier circuit to receive the oscillator signal of the reference oscillator circuit.
When the operational amplifier unit bodies in the operational amplifier unit block 6 are cut and respectively packaged by the dicing street 4, the dicing street wire 5 is in a disconnected state, and the reference unit part circuit and the non-reference unit part circuit are disconnected by the dicing street wire 5, and the reference oscillator circuit and the signal selection circuit are electrically connected; the selection signal generating circuit loads a non-reference oscillator circuit selection signal to the signal selection circuit, the signal selection circuit selects an oscillator signal of the non-reference oscillator circuit according to the non-reference oscillator selection signal, and the signal selection circuit enables the non-reference operational amplifying circuit to receive the oscillator signal of the non-reference oscillator circuit.
As shown in fig. 3, the signal selection generating circuit includes an inverter U1 and an inverter U2, wherein an output end of the inverter U1 is connected with an input end of the inverter U2, and an output end of the inverter U1 and an output end of the inverter U2 are both connected with the signal selection circuit;
The input end of the inverter U1 is connected with one end of a capacitor C1, one end of a scribing line lead 5 and the drain end of a PMOS tube P2, the other end of the capacitor C1 is grounded, the other end of the scribing line lead 5 is grounded through a resistor R1, the gate end of the PMOS tube P2 is connected with the gate end of the PMOS tube P1 and the drain end of the PMOS tube P1, the drain end of the PMOS tube P1 is grounded through a current source I1, and the source end of the PMOS tube P1 and the source end of the PMOS tube P2 are connected with a power supply VDD. The PMOS transistor P1 and the PMOS transistor P2 have the same gate voltage, and the mirror currents of the PMOS transistor P1 and the PMOS transistor P2 are 1:1.
In the embodiment of the invention, the PMOS transistor P1, the PMOS transistor P2, the capacitor C1, the inverter U1 and the inverter U2 can form a reference cell portion circuit or a non-reference cell portion circuit, and when the PMOS transistor P1, the PMOS transistor P2, the capacitor C1, the inverter U1 and the inverter U2 can form the reference cell portion circuit, the resistor R1 forms a non-reference cell portion circuit, and when the resistor R1 forms the reference cell portion circuit, the PMOS transistor P1, the PMOS transistor P2, the capacitor C1, the inverter U1 and the inverter U2 can form the non-reference cell portion circuit. The output terminal of the inverter U1 outputs the reference oscillator circuit selection signal en_b, and the output terminal of the inverter U2 outputs the non-reference oscillator circuit selection signal EN. In fig. 2, CTRL1 is a connection point between the scribe line wire 5 and the reference cell portion circuit, and CTRL2 is a connection point between the scribe line wire 5 and the non-reference cell portion circuit.
When dicing streets 4, dicing streets wire 5 is disconnected, at this time, an infinite impedance is formed at the drain terminal of PMOS transistor P2 and the input terminal of inverter U1, the input voltage of inverter U1 approaches the voltage of power supply VDD, so that reference oscillator circuit selection signal en_b output by inverter U1 is at a low level, and non-reference oscillator circuit selection signal EN output by the output terminal of inverter U2 is at a high level.
As shown in fig. 4, the signal selection circuit includes an and gate U3, an and gate U4, and an or gate U5, where an input end of the and gate U3 is connected to an output end of the inverter U1 and an output end of the reference oscillator circuit, an input end of the and gate U4 is connected to an output end of the inverter U2 and an output end of the non-reference oscillator circuit, an output end of the and gate U3 and an output end of the and gate U4 are connected to an input end of the or gate U5, and an output end of the or gate U5 is connected to the non-reference operational amplifier circuit.
In the embodiment of the present invention, the and gate U3 receives the reference oscillator circuit selection signal en_b and the oscillator signal OSC1 of the reference oscillator circuit, the and gate U4 receives the non-reference oscillator circuit selection signal EN and the oscillator signal OSC2 of the non-reference oscillator circuit, and the output terminal of the or gate U5 outputs the oscillator selected signal OSCT.
When the operational amplifier unit block 6 is not cut and the scribe line 5 is kept in a connected state, the reference oscillator circuit selection signal en_b output from the inverter U1 is enabled to be at a high level, and the reference oscillator circuit selection signal EN is not enabled to be at a low level by the current source I1, and the oscillator selected signal OSCT is kept identical to the oscillator signal OSC1 of the reference oscillator circuit by the cooperation of the and gate U3 and the or gate U5. The current source I1 is a constant current source, and the working current of the current source I1 can be 1 mu A.
When the operational amplifier unit block 6 is cut by the scribe line 4, the scribe line wire 5 and the connection line group in the scribe line 4 are all in an off state, and at this time, the oscillator signal OSC1 of the reference oscillator circuit cannot be applied to the input terminal of the and gate U3, and the non-reference circuit selection signal EN of the inverter U2 is at a high level, so that the oscillator selection signal OSCT is consistent with the oscillator signal OSC2 of the non-reference oscillator circuit by the cooperation of the and gate U4 and the or gate U5.
In summary, by the cooperation of the signal selection generating circuit and the signal selection circuit, the non-reference operational amplifier 3 can receive the oscillator signal OSC1 of the reference oscillator circuit or the oscillator signal OSC2 of the non-reference oscillator circuit, respectively, according to the cutting state of the operational amplifier unit block 6 by the dicing streets 4, thereby ensuring the stability and reliability of the operation of the high-precision operational amplifier under different packaging conditions. In the implementation, in the stage of integrated design of the wafer 1, the signal selection generating circuit and the signal selection circuit required by the synchronous design can be obtained simultaneously in the process of preparing the operational amplifier unit block 6, and the complexity of the operational amplifier unit block 6 is not increased. In addition, the areas corresponding to the signal selection generating circuit and the signal selection circuit are generally far smaller than the area of the operational amplifier unit block 6, so that the integration level of the wafer body 1 during the integration of the operational amplifier unit block 6 is not affected.
Claims (6)
1. An integrated circuit capable of preparing multiple channels of high-precision operational amplifiers simultaneously comprises a wafer body (1) and a plurality of operational amplifier unit blocks (6) prepared on the wafer body (1), wherein each operational amplifier unit block (6) comprises two operational amplifier unit bodies and scribing channels (4) for spacing the operational amplifier unit bodies, and the operational amplifier unit bodies are positioned on two sides of each scribing channel (4); each operational amplifier unit body comprises an operational amplifier circuit and an oscillator circuit which is matched with the operational amplifier circuit; the method is characterized in that:
An inter-unit oscillator signal processing circuit is further provided in each operational amplifier unit block (6), and in the operational amplifier unit block (6), one operational amplifier unit is set as a reference unit operational amplifier (2) and the other operational amplifier unit is set as a non-reference unit operational amplifier (3); in the reference unit operational amplifier (2), a reference oscillator circuit is connected with a reference operational amplifier circuit and an inter-unit oscillator signal processing circuit in an adapting way; in the non-reference unit operational amplifier (3), the non-reference operational amplifier circuit is connected with a non-reference oscillator circuit in an adaptive way through an inter-unit oscillator signal processing circuit;
When the operational amplifier unit block (6) is integrally packaged to obtain a required high-precision operational amplifier, a reference oscillator circuit is selected as an oscillator unit of the high-precision operational amplifier through an inter-unit oscillator signal processing circuit, so that the high-precision operational amplifier performs the required operational amplification according to an oscillator signal of the selected oscillator unit;
When the operational amplifier unit bodies in the operational amplifier unit block (6) are cut and respectively packaged by the dicing streets (4), a reference unit high-precision operational amplifier and a non-reference unit high-precision operational amplifier can be obtained simultaneously, and the reference unit high-precision operational amplifier performs required operational amplification according to the oscillator signal of the reference oscillator circuit, and the non-reference unit high-precision operational amplifier performs required operational amplification according to the oscillator signal of the non-reference oscillator circuit.
2. The integrated circuit capable of simultaneously preparing multiple-channel high-precision operational amplifiers as claimed in claim 1, wherein: the inter-unit oscillator signal processing circuit comprises a selection signal generating circuit and a signal selecting circuit arranged on the non-reference unit operational amplifier, wherein the selection signal generating circuit, the reference oscillator circuit and the non-reference oscillator circuit can be connected with the non-reference operational amplifier circuit through the signal selecting circuit;
The selection signal generation circuit comprises a reference unit part circuit arranged in the reference unit operational amplifier (2), a scribing channel wire (5) arranged in the scribing channel (4) and a non-reference unit part circuit arranged in the non-reference unit operational amplifier (3), wherein the reference unit part circuit is connected with the non-reference unit part circuit through the scribing channel wire (5);
When the operational amplifier unit block (6) is integrally packaged to obtain a required high-precision operational amplifier, the reference unit part circuit is kept connected with the non-reference unit part circuit through the scribing line lead (5), the selection signal generating circuit loads a reference oscillator circuit selection signal to the signal selecting circuit, and the signal selecting circuit can enable the non-reference operational amplifier circuit to receive an oscillator signal of the reference oscillator circuit according to the reference oscillator circuit selection signal;
When the operational amplifier unit bodies in the operational amplifier unit blocks (6) are cut and respectively packaged by the dicing channels (4), the dicing channel wires (5) are in a disconnected state, and the reference unit part circuits and the non-reference unit part circuits are disconnected through the dicing channel wires (5), and the reference oscillator circuits and the signal selection circuits are electrically connected; the selection signal generating circuit loads a non-reference oscillator circuit selection signal to the signal selecting circuit, and the signal selecting circuit enables the non-reference operational amplifying circuit to receive the oscillator signal of the non-reference oscillator circuit according to the non-reference oscillator selection signal.
3. The integrated circuit capable of simultaneously preparing multiple-channel high-precision operational amplifiers as claimed in claim 2, wherein: the signal selection generating circuit comprises an inverter U1 and an inverter U2, wherein the output end of the inverter U1 is connected with the input end of the inverter U2, and the output end of the inverter U1 and the output end of the inverter U2 are both connected with the signal selection circuit;
The input end of the inverter U1 is connected with one end of a capacitor C1, one end of a scribing line lead (5) and the drain end of a PMOS tube P2, the other end of the capacitor C1 is grounded, the other end of the scribing line lead (5) is grounded through a resistor R1, the gate end of the PMOS tube P2 is connected with the gate end of the PMOS tube P1 and the drain end of the PMOS tube P1, the drain end of the PMOS tube P1 is grounded through a current source I1, and the source end of the PMOS tube P1 and the source end of the PMOS tube P2 are connected with a power supply VDD.
4. An integrated circuit capable of simultaneously fabricating multiple channels of high precision operational amplifiers as claimed in claim 3, wherein: the signal selection circuit comprises an AND gate U3, an AND gate U4 and an OR gate U5, wherein the input end of the AND gate U3 is connected with the output end of the inverter U1 and the output end of the reference oscillator circuit, the input end of the AND gate U4 is connected with the output end of the inverter U2 and the output end of the non-reference oscillator circuit, the output end of the AND gate U3 and the output end of the AND gate U4 are connected with the input end of the OR gate U5, and the output end of the OR gate U5 is connected with the non-reference operational amplifier circuit.
5. The integrated circuit of claim 1,2, 3 or 4, capable of simultaneously preparing multiple channel high precision operational amplifiers, characterized in that: the operational amplifier unit body is a single-channel high-precision operational amplifier or a multi-channel high-precision operational amplifier.
6. The integrated circuit of claim 1,2, 3 or 4, capable of simultaneously preparing multiple channel high precision operational amplifiers, characterized in that: the width of the scribe line (4) is 60-80 μm.
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| CN202010226966.2A CN111294002B (en) | 2020-03-27 | 2020-03-27 | Integrated circuit capable of preparing multiple channels of high-precision operational amplifiers simultaneously |
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| CN111294002B true CN111294002B (en) | 2024-05-10 |
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| CN111294002A (en) | 2020-06-16 |
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