CN111290988A - BMC daughter card module based on domestic MCU - Google Patents
BMC daughter card module based on domestic MCU Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3006—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system is distributed, e.g. networked systems, clusters, multiprocessor systems
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
- G06F11/3062—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations where the monitored property is the power consumption
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
- G06F13/4213—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with asynchronous protocol
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Abstract
The invention provides a BMC daughter card module based on a domestic MCU. This BMC daughter card module includes: the system comprises a domestic MCU chip, a first connector and a second connector which are connected with the MCU chip, wherein the first connector comprises a debugging serial port, a parallel data bus, an I2C bus for hanging a sensor, a 10/100M auto-negotiation network port and an IPMB bus; the second connector comprises a communication serial port, an analog quantity detection interface, a JTAG interface, a slot number detection interface, a case number detection interface, a BMC daughter card module reset signal and a general GPIO. The invention can greatly shorten the development period of the whole server project and reduce the professional technical requirements on the BMC aspect of developers; the starting time of the BMC can be controlled within 20 seconds and is far shorter than the starting time of the server, and the whole-process monitoring of the server is realized.
Description
Technical Field
The invention relates to the technical field of servers, in particular to a BMC daughter card module based on a domestic MCU.
Background
The BMC (Baseboard management Controller) is an indispensable component of the server, and is used for monitoring the operation conditions of the server, such as temperature, fan speed, power supply condition, operating system status, and the like. The BMC operates independently of the server system, is not influenced by the server system, can perform operations such as firmware upgrading on the machine, checking machine equipment, remotely controlling the machine to be started and the like in a state that the machine is not started, and can record key logs when the server system is broken down.
A more common BMC solution is implemented by using a BMC specific chip of taiwan western-ye technology (ASPEED) company in combination with BMC management software of american chemie technology (AMI). The BMC special chip of the Xin Ye technology is high in price and needs to be matched with a DDR3 memory for use; the BMC management software of AMI also needs authorization, and the whole scheme has high implementation cost, strong specificity and high requirement on developers. Moreover, although the scheme is powerful, the boot time of the BMC is long, about 2 minutes.
Disclosure of Invention
Aiming at the problems of high cost, high requirement on developers and long BMC (baseboard management controller) starting time of the conventional BMC solution, the invention provides a BMC daughter card module based on a domestic MCU (micro control unit), which is used for extracting a BMC function from a server mainboard, realizing modularization of BMC, reducing the cost and the professional technical requirement on the developers and shortening the BMC starting time.
The invention provides a BMC daughter card module based on a domestic MCU, which comprises: the system comprises a domestic MCU chip, a first connector and a second connector which are connected with the MCU chip, wherein the first connector comprises a debugging serial port, a parallel data bus, an I2C bus for hanging a sensor, a 10/100M auto-negotiation network port and an IPMB bus; the second connector comprises a communication serial port, an analog quantity detection interface, a JTAG interface, a slot number detection interface, a case number detection interface, a BMC daughter card module reset signal and a general GPIO.
Furthermore, the domestic MCU chip is also connected with an SDRAM memory, a FLASH memory and an EEPROM memory.
Further, the SDRAM memory employs SCB33S256160 AE.
Further, the domestic MCU chip adopts GD32F450IGH 6.
Further, the BMC daughter card module adopts an embedded ucLinux operating system.
The invention has the beneficial effects that:
(1) the traditional BMC solution is on the same circuit board as the server motherboard, and hardware and software of the BMC are debugged again in each project. The BMC daughter card module based on the domestic MCU provided by the invention has a complete IPMI function, realizes the modularization of BMC, enables a server developer to easily use the BMC daughter card module only by arranging a sensor on a server mainboard and then correspondingly modifying the software configuration of the BMC daughter card module, reduces the development difficulty of a BMC part of a server project, greatly shortens the development period of the whole server project, and reduces the professional technical requirements on the BMC aspect of the developer. If a mature BMC daughter card module is used, the hardware circuit of the BMC part is hardly debugged.
(2) According to the BMC daughter card module based on the domestic MCU, all components adopt domestic devices, an open-source embedded ucLinux operating system is used, and the BMC management software which is independently researched and developed is matched, so that nationwide production of software and hardware is realized, and the cost is low; in addition, compared with the traditional BMC solution that the boot time is about 2 minutes (the boot time is longer than that of a part of servers, so that the servers cannot be monitored in the process of powering on the servers), the method and the system can control the boot time of the BMC within 20 seconds and is far shorter than the boot time of the servers, so that the servers can be monitored in the whole process.
(3) Compared with the traditional BMC solution scheme, the BMC daughter card module based on the domestic MCU provided by the invention is additionally provided with a parallel data bus interface, is convenient to be connected with logic devices such as CPLD (complex programmable logic device), FPGA (field programmable gate array) and the like or other devices with parallel bus interfaces, and can be expanded in function through the CPLD, so that the function of the BMC daughter card module is more comprehensive and the application is wider.
Drawings
Fig. 1 is a schematic structural diagram of a BMC daughter card module based on a domestic MCU according to an embodiment of the present invention;
fig. 2 is an architecture diagram of an embedded ucLinux operating system adopted by a BMC daughter card module based on a domestic MCU according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms of art in the present invention are explained as follows:
MCU: microcontroller Unit, a micro control Unit;
BMC: a Basebard Manager Controller, a substrate management Controller;
IPMI: intelligent Platform Management Interface;
IPMB: intelligent Platform Management Bus;
and (2) ChMC: a sessions Management Controller, a Chassis Management Controller;
IPMC: intelligent Platform Management Controller.
As shown in fig. 1, an embodiment of the present invention provides a BMC daughter card module based on a domestic MCU, where the BMC daughter card module includes: the system comprises a domestic MCU chip, a first connector PN1 and a second connector PN2 which are both connected with the MCU chip, wherein the first connector PN1 comprises a 1-path debugging serial port, a 1-path parallel data bus, a 1-path I2C bus FAN _ SDA/SCL for hanging a sensor, a 1-path 10/100M auto-negotiation network port with the transmission rate of 100Base-T and a 2-path IPMB bus; the second connector PN2 comprises 1 path of communication serial port, 7 paths of analog quantity detection interfaces ADC 1-ADC 7, 1 path of JTAG interface, a slot number detection interface, a case number detection interface, 1 path of BMC daughter card module reset signal and 8 paths of general purpose GPIOs.
Specifically, the debugging serial port is used for accessing a Linux terminal of the BMC management system, and may adopt a three-wire serial port of RS232 standard, and communication parameters thereof may be set as follows: the baud rate is 115200b/s, and no flow control is carried out. The communication serial port is used for communicating with a CPU, a three-wire serial port with 3.3V voltage standard can be adopted, and communication parameters can be set as follows: the baud rate is 115200b/s, and no flow control is carried out. The MCU chip can also provide an IPMB bus with isolation to the outside through an isolation chip. The parallel data bus adopts an asynchronous access mode and comprises an 8-bit data bus and a 5-bit address bus. Two interfaces, slot number detection interface GA 4:0 and GAP, and chassis number detection interface RACK-ID 5:0, are used to identify physical address input and cabinet bit number.
In the embodiment of the invention, the three-wire serial port with the standard 3.3V level is adopted, and the three-wire serial port can be compatible with most CPU serial port levels, namely can be directly used for communicating with the CPU. The 8-bit parallel data bus can communicate with logic devices such as CPLD/FPGA, etc., and can also be converted into other types of buses such as LPC, etc. through CPLD, or the function of the bus is expanded through CPLD.
On the basis of the above embodiment, the domestic MCU chip is further connected with an SDRAM memory, a FLASH memory and an EEPROM memory. As an implementation mode, a domestic MCU chip adopts a GD32F450IGH6 processor with the main frequency of 200MHZ of the Mhz corporation, and an SDRAM memory adopts the model SDRAM memory granules of SCB33S256160AE with the capacity of 32MB and the bit width of 16 bits of the purple light corporation.
As an example, the pin definitions of the first connector PN1 and the second connector PN2 may be set as shown in table 1 and table 2:
TABLE 1 BMC daughter card Module PN1 Pin definition
Pin# | Direction of rotation | Signal Name | Signal Name | Direction of rotation | Pin# |
1 | - | Ground | 3V3 | - | 2 |
3 | O | MTXP | MRXP | I | 4 |
5 | O | MTXN | MRXN | I | 6 |
7 | O | LED1 | LED2 | O | 8 |
9 | - | Ground | Ground | - | 10 |
11 | I/O | DATA0 | IPMB_DATA0 | OD | 12 |
13 | I/O | DATA1 | IPMB_CLK0 | OD | 14 |
15 | I/O | DATA2 | Ground | - | 16 |
17 | I/O | DATA3 | IPMB_DATA1 | OD | 18 |
19 | I/O | DATA4 | IPMB_CLK1 | OD | 20 |
21 | I/O | DATA5 | 3V3 | - | 22 |
23 | I/O | DATA6 | FAN_SDA | OD | 24 |
25 | I/O | DATA7 | FAN_SCL | OD | 26 |
27 | O | ADDR0 | Ground | - | 28 |
29 | O | ADDR1 | USART1_TX | O | 30 |
31 | O | ADDR2 | USART1_RX | I | 32 |
33 | O | ADDR3 | 3V3 | - | 34 |
35 | O | ADDR4 | nWR | O | 36 |
37 | O | nCS | nRD | O | 38 |
39 | - | Ground | 3V3 | - | 40 |
TABLE 2 BMC daughter card Module PN2 Pin definition
The description about tables 1 and 2 is as follows:
1) i: input, Input; o: output, Output; I/O: bi-directional, i.e., input/output; OD: open Drain, high resistance state; AI: analog input, analog input;
2) MTXP/N and MRXP/N are BMC hundred million network ports; LED 1: a hundred million net RJ45LAN3_ LINK-ACT # _ R signal lamp; LED 2: a LINK 100M data transmission state display lamp;
3) local BUS interface signal: ADDR [4:0], DATA [ 7: 0], nCS, nRd, nWr;
4) USART1_ RX/TX: debugging a serial port; USART2_ RX/TX: a communication serial port;
5) 2-way IPMB interface: IPMB _ CLK [0:1], IPMB _ DATA [0:1 ];
6) FAN _ SDA/SCL 2: sensor I2C bus interface;
7) power _ RST: a BMC daughter card reset signal;
8) GA 0-GAP: a slot number detection interface; RACK-ID 0-RACK-ID 5: a chassis number detection interface;
9) BMC _ ADC [1:7 ]: and collecting voltage information of the ADC circuit.
10) GPIO [1:8 ]: I/O signals
11) STM32_ TDI/TDO/TMS/TCK/TRST # JTAG signal.
The BMC daughter card module provided by the embodiment of the invention adopts an open-source embedded ucLinux operating system. As shown in fig. 2, the operating system has a complete TCP/IP protocol stack, and telnet service, Goahead web service, and BMC management program are transplanted on the operating system, so as to implement a complete BMC management function, web access function, and telnet access function. Wherein:
the BMC management program realizes all BMC management functions, periodically inquires the health state of the board card, collects system information, receives a user command issued through a network or a serial port and executes user operation.
The Goahead is a web page server and provides a management web page of the BMC, so that a user can check the health state of the server through the web page and realize operations such as startup and shutdown. The Goahead and the BMC management program realize interprocess communication through the UDS: the Goahead receives a user request from a webpage, forwards the user request to the BMC management program through the UDS interface, and the BMC management program responds to the operation of the user.
the telnet service provides a method for a user to remotely access the BMC management system.
The BMC daughter card module based on the domestic MCU provided by the invention provides the following 4 access modes:
(1) accessing a BMC management system through a network by using an ipmitool; (2) accessing the BMC management system through a webpage; (3) logging in a Linux terminal of the BMC management system through a debugging serial port; (4) and remotely logging in a Linux terminal of the BMC management system through telnet.
The BMC daughter card module based on the domestic MCU provided by the invention has the following basic functions:
(1) support ChMC and IPMC functions.
(2) And acquiring the environment information of the board card, including temperature, voltage, current and other information.
(3) And acquiring board card attribute information including an FRU, a system version, a CPU model and the like.
(4) And acquiring board card state information including memory utilization rate, CPU utilization rate, network state and the like.
(5) And the functions of controlling the on-off and the reset of the board card are supported.
(6) The IPMB bus supporting two hot redundancy backups complies with the standard IPMB protocol.
(7) The IPMB address and the IP address can be dynamically configured according to the chassis number and the slot number.
(8) Standard IPMI1.5/2.0 commands are supported.
(9) And supporting the customized IPMI command.
The BMC daughter card module based on the domestic MCU provided by the invention can be suitable for servers which do not need graphical interfaces, such as network switching servers, data storage servers and the like.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (5)
1. BMC daughter card module based on domestic MCU, its characterized in that includes: the system comprises a domestic MCU chip, a first connector and a second connector which are connected with the MCU chip, wherein the first connector comprises a debugging serial port, a parallel data bus, an I2C bus for hanging a sensor, a 10/100M auto-negotiation network port and an IPMB bus; the second connector comprises a communication serial port, an analog quantity detection interface, a JTAG interface, a slot number detection interface, a case number detection interface, a BMC daughter card module reset signal and a general GPIO.
2. The BMC daughter card module based on the domestic MCU of claim 1, wherein the domestic MCU chip is further connected with SDRAM memory, FLASH memory and EEPROM memory.
3. The domestic MCU based BMC daughter card module of claim 2, wherein said SDRAM memory employs SCB33S256160 AE.
4. The domestic MCU based BMC daughter card module of claim 1 or 2, wherein the domestic MCU chip employs GD32F450IGH 6.
5. The domestic MCU based BMC daughter card module of claim 1, wherein the BMC daughter card module employs an embedded ucLinux operating system.
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Cited By (2)
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CN113806168A (en) * | 2021-09-02 | 2021-12-17 | 超越科技股份有限公司 | High-reliability autonomous management daughter card of domestic universal server and management daughter card system |
CN113986804A (en) * | 2021-10-26 | 2022-01-28 | 超越科技股份有限公司 | Communication method of domestic embedded system computer and peripheral equipment, computer and medium |
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CN113986804A (en) * | 2021-10-26 | 2022-01-28 | 超越科技股份有限公司 | Communication method of domestic embedded system computer and peripheral equipment, computer and medium |
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