CN111289952B - Radar target echo simulation method and device - Google Patents
Radar target echo simulation method and device Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
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Abstract
The application discloses a radar target echo simulation method, which comprises the following steps: converting the received radar signal into a digital signal after frequency conversion; down-mixing the digital real signal to zero intermediate frequency and quadrature processing to complex signal; performing convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation device obtained by pre-calculation to obtain a convolution modulation signal; superposing target distance information on the convolution modulation signal in a time domain delay manner, and further superposing target speed information through a complex multiplication signal; the signal after superimposing the target speed information is up-converted to a baseband frequency and converted to a corresponding analog signal for generating an analog target echo. The technology of the application compensates inherent delay caused by system delay by using a frequency domain compensation mode, and realizes the near-distance simulation of radar target echo.
Description
Technical Field
The application relates to the technical field of advanced auxiliary driving, in particular to a radar target echo simulation method and device.
Background
The advanced driving assistance system ADAS (Advanced Driving Assistance System) is an assistance system for realizing monitoring and sensing surrounding environment at any time during the running process of a vehicle, and recognizing and tracking dynamic and static objects through various sensors (millimeter wave radar, laser radar, cameras, satellite navigation and the like) mounted on the vehicle so as to realize safer driving.
The millimeter wave radar can detect targets even in environments such as fog, smoke dust and haze because the millimeter wave radar is not affected by weather conditions, and is an indispensable detection sensor in an ADAS system. Accordingly, radar target echo simulators for testing the performance of millimeter wave radar are also very important testing devices in radar production.
Along with the development of the automotive radar technology, the target detection distance range is wider and wider, the detection precision is higher and the target recognition capability is enhanced, the radar target echo simulator is also continuously developed, and the conventional automotive radar target echo simulator simulates the distance information of a target by using a time delay method, but due to the limitation of hardware delay time, the prior art can only achieve a simulation distance of minimum 4m, and a target at a shorter distance cannot be simulated, however, for the automotive radar, the short-distance target test requirement is obvious. Therefore, a method for simulating a target echo capable of simulating a shorter distance is particularly necessary.
Disclosure of Invention
The embodiment of the application provides a radar target echo simulation method and device, which are used for at least solving one of the technical problems.
In a first aspect, an embodiment of the present application provides a radar target echo simulation method, including:
converting the received radar signal into a digital signal after frequency conversion;
down-mixing the digital real signal to zero intermediate frequency and quadrature processing to complex signal;
performing convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation device obtained by pre-calculation to obtain a convolution modulation signal;
superposing target distance information on the convolution modulation signal in a time domain delay manner, and further superposing target speed information through a complex multiplication signal;
the signal after superimposing the target speed information is up-converted to a baseband frequency and converted to a corresponding analog signal for generating an analog target echo.
In some embodiments, the system delay characteristic coefficient is:
D(t)＝e -j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation device.
In some embodiments, the inherent delay is obtained by:
generating a point frequency signal by using a digital DDS, and modulating by using a fixed pulse to obtain a known pulse wave;
the pulse wave is input to a system signal processing link through a detection unit, and the system signal processing link comprises a range delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected;
taking the output of the digital-to-analog conversion unit as the input of an analog-to-digital conversion unit of the radar target simulation device, wherein the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit so that a system of the radar target simulation device forms a closed loop;
the inherent delay is determined based on the detection unit.
In some embodiments, said determining said inherent delay based on said detection unit comprises:
detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by adopting the detection unit;
detecting a second pulse wave envelope of the pulse wave processed by the closed loop system of the radar target simulation device by adopting the detection unit;
the inherent delay is determined from the first pulse wave envelope and the second pulse wave envelope.
In some embodiments, the up-converting the signal after superimposing the target speed information to a baseband frequency and converting to a corresponding analog signal for generating an analog target echo comprises:
converting the signal up-converted to the baseband frequency into a corresponding analog signal;
and up-converting the analog signal to radar transmitting signal frequency to obtain the target echo.
In a second aspect, an embodiment of the present application provides a radar target echo simulation device, including:
the first frequency conversion unit is used for carrying out frequency conversion processing on the received radar signals;
the analog-to-digital conversion unit is used for converting the radar signal processed by the first frequency conversion unit into a corresponding digital signal;
a digital down-conversion unit for down-mixing the digital signal to a zero intermediate frequency digital signal to be quadrature-processed into a complex signal;
the frequency domain convolution unit is used for carrying out convolution modulation processing on the complex signal and the system delay characteristic coefficient of the radar target simulation device obtained by the pre-calculation to obtain a convolution modulation signal;
the information superposition unit is used for delaying and superposing target distance information on the convolution modulation signal in a time domain and further superposing target speed information through complex multiplication signals;
and the echo generating unit is used for up-converting the signal after the target speed information is overlapped to a baseband frequency and converting the signal into a corresponding analog signal so as to generate an analog target echo.
In some embodiments, the system delay characteristic coefficient is:
D(t)＝e -j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation device.
In some embodiments, the inherent delay is obtained by:
generating a point frequency signal by using a digital DDS, and modulating by using a fixed pulse to obtain a known pulse wave;
the pulse wave is input to a system signal processing link through a detection unit, and the system signal processing link comprises a range delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected;
taking the output of the digital-to-analog conversion unit as the input of an analog-to-digital conversion unit of the radar target simulation device, wherein the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit so that a system of the radar target simulation device forms a closed loop;
the inherent delay is determined based on the detection unit.
In some embodiments, said determining said inherent delay based on said detection unit comprises:
detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by adopting the detection unit;
detecting a second pulse wave envelope of the pulse wave processed by the closed loop system of the radar target simulation device by adopting the detection unit;
the inherent delay is determined from the first pulse wave envelope and the second pulse wave envelope.
In some embodiments, the echo generating unit comprises:
a digital up-conversion unit for up-converting the signal after the target speed information is superimposed to a baseband frequency;
the digital-to-analog conversion unit is used for converting the signal up-converted to the baseband frequency into a corresponding analog signal;
and the second frequency conversion unit is used for up-converting the analog signal to the frequency of a radar transmitting signal to obtain the target echo.
The embodiment of the application has the beneficial effects that: the technology of the application compensates inherent delay caused by system delay by using a frequency domain compensation mode, and realizes the near-distance simulation of radar target echo. The method comprises the steps of performing convolution modulation on a radar transmitting signal and a system delay characteristic function aiming at inherent distance which cannot be simulated and is brought by system delay, and then overlapping the obtained echo with target distance and speed information to achieve zero-distance simulation of a target.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of an embodiment of a radar target echo simulation method according to the present application;
FIG. 2 is a flow chart of one embodiment of determining an inherent delay in the present application;
FIG. 3 is a functional block diagram of an embodiment of a radar target echo simulation device of the present application;
fig. 4 is a schematic block diagram of an embodiment of the echo generating unit in the present application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application. It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," comprising, "or" includes not only those elements but also other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
As shown in fig. 1, a flowchart of an embodiment of a radar target echo simulation method according to the present application is shown, where the radar target echo simulation method includes:
s10, performing frequency conversion processing on the received radar signals, and then converting the radar signals into digital signals.
S20, the digital real signal is mixed down to zero intermediate frequency and quadrature processed into complex signals.
S30, carrying out convolution modulation processing on the complex signal and the system delay characteristic coefficient of the radar target simulation device obtained through calculation in advance to obtain a convolution modulation signal.
Illustratively, in some embodiments, the system delay characteristic coefficients are: d (t) =e -j2πf*t Where f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation device.
S40, delaying and superposing target distance information on the convolution modulation signal in a time domain, and further superposing target speed information through a complex multiplication signal;
s50, the signal after the target speed information is overlapped is up-converted to a baseband frequency and converted into a corresponding analog signal so as to generate an analog target echo.
Illustratively, the signal up-converted to the baseband frequency is converted to a corresponding analog signal; and up-converting the analog signal to radar transmitting signal frequency to obtain the target echo.
The application discloses a radar target echo simulation method which can be applied to millimeter wave radar simulation test of an Advanced Driving Assistance System (ADAS). The application can realize the close-range simulation of the target and meet the close-range target simulation requirement of the automobile radar test system. The technology of the application compensates inherent delay caused by system delay by using a frequency domain compensation mode, and realizes the near-distance simulation of radar target echo. The method comprises the steps of performing convolution modulation on a radar transmitting signal and a system delay characteristic function aiming at inherent distance which cannot be simulated and is brought by system delay, and then overlapping the obtained echo with target distance and speed information to achieve zero-distance simulation of a target.
The zero-distance simulation technology applied to ADAS can solve the problem that the traditional radar simulator cannot simulate a close-range target due to own system delay, the zero-distance automobile radar target simulation is realized through algorithm compensation, and the algorithm compensation has no hardware additional cost. The simulation technology has the advantages of convenience, low cost and the like.
Fig. 2 is a flow chart of an embodiment of the present application for determining an inherent delay, where the inherent delay is obtained by: generating a point frequency signal by using a digital DDS, and modulating by using a fixed pulse to obtain a known pulse wave; the pulse wave is input to a system signal processing link through a detection unit, and the system signal processing link comprises a range delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected; taking the output of the digital-to-analog conversion unit as the input of an analog-to-digital conversion unit of the radar target simulation device, wherein the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit so that a system of the radar target simulation device forms a closed loop; the inherent delay is determined based on the detection unit.
Illustratively, said determining the inherent delay based on the detection unit comprises: detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by adopting the detection unit; detecting a second pulse wave envelope of the pulse wave processed by the closed loop system of the radar target simulation device by adopting the detection unit; the inherent delay is determined from the first pulse wave envelope and the second pulse wave envelope.
In some embodiments, another embodiment of the radar target echo simulation method of the present application specifically includes the steps of:
(1) Receiving the signal through a frequency conversion front end, and then performing AD sampling to convert the signal into a digital signal;
(2) Down-mixing the digital real signal to zero intermediate frequency and quadrature processing to IQ complex signal;
(3) Convolving the complex signal with the calculated system delay characteristic coefficient; the system delay characteristic coefficient is obtained by the following formula:
D(t)＝e -j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware.
Specifically, the self-inherent delay t of the simulator system can be tested by the following method:
a digital DDS (Direct Digital Synthesizer, direct digital frequency synthesizer) is used in the signal processing logic to generate a dot frequency signal and modulated with a fixed pulse to obtain a known pulse wave. The pulse wave is output through a system signal processing link and is received through DAC (digital-to-analog converter) after up-conversion and down-conversion by the input of an simulator, so that the signal passes through the whole closed loop link, a digital detector is used for detecting the signal envelope in logic, the generated pulse and the pulse envelope received by the ADC are timed, and the internal inherent delay parameters of the system can be obtained by comparing the generated pulse with the pulse envelope received by the ADC.
Wherein, obtaining the intrinsic delay parameter in the system: knowing the system delay time t, for the system delay characteristic function: d (t) =exp (-j 2 pi f t) is subjected to inverse Fourier transform to obtain a time domain signal, the time domain signal is stored in the RAM of the FPGA chip, the logic control is used for calling, the signal and the coefficient are subjected to sliding convolution, and therefore the system delay can be compensated, and the purpose of target echo zero-distance simulation is achieved. Since the inherent delay is the time to be compensated, the value of t should be the opposite, and the system delay characteristic function should be:
D(t)＝exp(j*2*π*abs(t))
where abs (t) represents the absolute value of the delay time.
(4) The compensated signal is delayed in the time domain to overlap the target distance information, and the target speed information is overlapped through the DDS complex multiplication signal;
(5) The signal is up-converted to the baseband frequency, then up-converted to the radar transmitting signal frequency through the front-end frequency conversion assembly, and the radio frequency signal is output through the antenna, so that the simulated target echo is obtained.
Illustratively, baseband signal processing is implemented by an FPGA, and for time-domain delay stepping, the period size of the clock should be processed for the FPGA chip. The application divides the time domain delay into two parts: coarse delay, fine delay. The coarse delay part is realized by processing clock cycles of the FPGA chip, the fine delay is realized by adjusting the pin output sequence of the FPGA chip, the precision can reach N/Ts times of the sampling clock cycles of the FPGA chip, N is the number of parallel processing paths of AD sampling signals, and Ts is the processing clock cycles of the FPGA chip.
The system delay characteristic coefficient is generated by the upper computer according to the formula in the step (3), wherein the parameter t represents the system delay of the system hardware and the logic whole, the upper computer calculates the corresponding system delay characteristic coefficient through the formula after obtaining the delay parameter, and the corresponding system delay characteristic coefficient is sent to the baseband logic signal processing board to carry out convolution modulation with the actual signal.
The system integral delay parameter is obtained by closed loop measurement of the system itself: and connecting a signal inlet and a signal outlet of the simulator by using a radio frequency cable, and issuing corresponding control instructions by software to obtain the delay parameters of the system.
The system delay closed-loop measurement method is realized by adopting the following modes:
in the system, a digital DDS is used in a signal processing board to generate a point frequency signal, and a fixed pulse is used for modulation, so that a known pulse wave is obtained. The pulse wave is output through a signal processing link and then 30 through a DAC, up-converted and then down-converted by the input of an simulator to be received, so that the signal passes through the whole closed loop link, the envelope of the signal is detected by using a digital detector in logic, and the envelope is timed, thus obtaining the inherent delay parameter in the system.
The application has the beneficial effects different from the prior art that: the device can compensate the inherent delay of the system through an algorithm, realizes the function of simulating a close-range target, and has high accuracy of the distance and the speed of the simulated target.
Meanwhile, the system comprises a time-frequency analysis function and a frequency spectrum measurement function. After data are collected through the ADC, a data file is stored, and the frequency component and time-frequency information of the radar waveform are analyzed.
Illustratively, a mass storage sub-board, mounted external to the FPGA, may be used for signal storage playback. The FPGA is also used for analyzing the digital radar intermediate frequency signal, and analyzing the waveform information of the digital signal through FFT processing to obtain the signal bandwidth, PRT and center frequency information.
Illustratively, the FPGA is also used to measure the self-system delay of the simulator by generating 30 the active signal in the FPGA chip and connecting the simulator RFin with RFout to form a loop to measure the total time the signal spends through the loop to measure the self-delay of the simulator system.
The main purpose of digital down-conversion DDC (Digital Down Converter) is to perform digital frequency mixing on an Intermediate Frequency (IF) digital signal collected by an AD, and then complete decimation filtering to recover an original signal, and the digital down-conversion is implemented by adopting a digital signal technology during digital down-conversion, which includes algorithms such as digital filtering, quadrature conversion, sampling, decimation, and the like. The main circuit module consists of four parts: numerical control oscillation, digital mixing, sampling extraction and digital filtering.
In the radio transmission link, the digital signal is converted to an analog signal, the analog signal is mixed to obtain a desired rf center frequency higher than the original signal, the signal is amplified to an appropriate power level, and the signal is finally bandwidth limited and transmitted via an antenna. This way of mixing the frequencies up is called up-conversion.
As shown in fig. 3, which is a schematic block diagram of an embodiment of the radar target echo simulation device of the present application, a radar target echo simulation device 300 in this embodiment includes:
a first frequency conversion unit 310, configured to perform frequency conversion processing on a received radar signal;
an analog-to-digital conversion unit 320, configured to convert the radar signal processed by the first frequency conversion unit into a corresponding digital signal;
a digital down-conversion unit 330 for down-mixing the digital signal to a zero intermediate frequency digital signal to be quadrature-processed into a complex signal;
a frequency domain convolution unit 340, configured to perform convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation device, where the system delay characteristic coefficient is obtained by calculation in advance, to obtain a convolution modulation signal;
an information superimposing unit 350, configured to delay and superimpose the target distance information on the convolutionally modulated signal in a time domain, and further superimpose the target speed information by a complex multiplication signal;
an echo generating unit 360 for up-converting the signal after superimposing the target speed information to a baseband frequency and converting to a corresponding analog signal for generating an analog target echo.
In some embodiments, the system delay characteristic coefficient is:
D(t)＝e -j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation device.
In some embodiments, the inherent delay is obtained by:
generating a point frequency signal by using a digital DDS, and modulating by using a fixed pulse to obtain a known pulse wave;
the pulse wave is input to a system signal processing link through a detection unit, and the system signal processing link comprises a range delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected;
taking the output of the digital-to-analog conversion unit as the input of an analog-to-digital conversion unit of the radar target simulation device, wherein the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit so that a system of the radar target simulation device forms a closed loop;
the inherent delay is determined based on the detection unit.
In some embodiments, said determining said inherent delay based on said detection unit comprises:
detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by adopting the detection unit;
detecting a second pulse wave envelope of the pulse wave processed by the closed loop system of the radar target simulation device by adopting the detection unit;
the inherent delay is determined from the first pulse wave envelope and the second pulse wave envelope.
As shown in fig. 4, in some embodiments, the echo generating unit 360 includes:
a digital up-conversion unit 361 for up-converting the signal after the target speed information is superimposed to a baseband frequency;
a digital-to-analog conversion unit 362 for converting the signal up-converted to the baseband frequency into a corresponding analog signal;
and a second frequency conversion unit 363, configured to up-convert the analog signal to a radar transmission signal frequency to obtain the target echo.
The radar target echo simulation device can execute the method provided by the embodiment of the application, and has the corresponding functional modules and beneficial effects of the execution method. Technical details not described in detail in this embodiment may be found in the methods provided in the embodiments of the present application.
It should be noted that, for simplicity of description, the foregoing method embodiments are all illustrated as a series of acts combined, but it should be understood and appreciated by those skilled in the art that the present application is not limited by the order of acts, as some steps may be performed in other orders or concurrently in accordance with the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present application. In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims (4)
1. A radar target echo simulation method, comprising:
converting the received radar signal into a digital signal after frequency conversion;
down-mixing the digital signal to zero intermediate frequency and quadrature processing into complex signal;
performing convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation device obtained by pre-calculation to obtain a convolution modulation signal;
superposing target distance information on the convolution modulation signal in a time domain delay manner, and further superposing target speed information through a complex multiplication signal;
up-converting the signal after the superposition of the target speed information to a baseband frequency and converting the signal into a corresponding analog signal for generating an analog target echo;
wherein the system delay characteristic coefficient is:
D(t)=e -j2πf*t
wherein ,fis the frequency of the signal and,tis an inherent delay caused by the system hardware of the radar target simulation device;
wherein the inherent delay is obtained by: generating a point frequency signal by using a digital DDS, and modulating by using a fixed pulse to obtain a known pulse wave; the pulse wave is input to a system signal processing link through a detection unit, and the system signal processing link comprises a range delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected; taking the output of the digital-to-analog conversion unit as the input of an analog-to-digital conversion unit of the radar target simulation device, wherein the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit so that a system of the radar target simulation device forms a closed loop; determining the inherent delay based on the detection unit;
wherein said determining said inherent delay based on said detection unit comprises: detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by adopting the detection unit; detecting a second pulse wave envelope of the pulse wave processed by the closed loop system of the radar target simulation device by adopting the detection unit; the inherent delay is determined from the first pulse wave envelope and the second pulse wave envelope.
2. The method of claim 1, wherein the up-converting the signal after superimposing the target speed information to a baseband frequency and into a corresponding analog signal for generating an analog target echo comprises:
converting the signal up-converted to the baseband frequency into a corresponding analog signal;
and up-converting the analog signal to radar transmitting signal frequency to obtain the target echo.
3. A radar target echo simulation device, comprising:
the first frequency conversion unit is used for carrying out frequency conversion processing on the received radar signals;
the analog-to-digital conversion unit is used for converting the radar signal processed by the first frequency conversion unit into a corresponding digital signal;
a digital down-conversion unit for down-mixing the digital signal to a zero intermediate frequency digital signal to be quadrature-processed into a complex signal;
the frequency domain convolution unit is used for carrying out convolution modulation processing on the complex signal and the system delay characteristic coefficient of the radar target simulation device obtained by the pre-calculation to obtain a convolution modulation signal;
the information superposition unit is used for delaying and superposing target distance information on the convolution modulation signal in a time domain and further superposing target speed information through complex multiplication signals;
an echo generating unit for up-converting the signal superimposed with the target speed information to a baseband frequency and converting the signal into a corresponding analog signal for generating an analog target echo;
wherein the system delay characteristic coefficient is:
D(t)=e -j2πf*t
wherein ,fis the frequency of the signal and,tsystem hardware guide of radar target simulation deviceAn inherent delay caused;
wherein the inherent delay is obtained by:
generating a point frequency signal by using a digital DDS, and modulating by using a fixed pulse to obtain a known pulse wave; the pulse wave is input to a system signal processing link through a detection unit, and the system signal processing link comprises a range delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected; taking the output of the digital-to-analog conversion unit as the input of an analog-to-digital conversion unit of the radar target simulation device, wherein the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit so that a system of the radar target simulation device forms a closed loop; determining the inherent delay based on the detection unit;
wherein said determining said inherent delay based on said detection unit comprises: detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by adopting the detection unit; detecting a second pulse wave envelope of the pulse wave processed by the closed loop system of the radar target simulation device by adopting the detection unit; the inherent delay is determined from the first pulse wave envelope and the second pulse wave envelope.
4. The apparatus of claim 3, wherein the echo generation unit comprises:
a digital up-conversion unit for up-converting the signal after the target speed information is superimposed to a baseband frequency;
the digital-to-analog conversion unit is used for converting the signal up-converted to the baseband frequency into a corresponding analog signal;
and the second frequency conversion unit is used for up-converting the analog signal to the frequency of a radar transmitting signal to obtain the target echo.
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| CN202010228878.6A CN111289952B (en) | 2020-03-27 | 2020-03-27 | Radar target echo simulation method and device |
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