CN111278216B

CN111278216B - PCB heat dissipation and welding offset prevention packaging structure and design method thereof

Info

Publication number: CN111278216B
Application number: CN201811476031.9A
Authority: CN
Inventors: 肖洁; 谢佳; 申冬海
Original assignee: Hunan CRRC Times Electric Vehicle Co Ltd
Current assignee: Hunan CRRC Times Electric Vehicle Co Ltd
Priority date: 2018-12-04
Filing date: 2018-12-04
Publication date: 2023-06-20
Anticipated expiration: 2038-12-04
Also published as: CN111278216A

Abstract

The invention discloses a heat dissipation and welding deviation prevention packaging structure of a PCB and a design method thereof, wherein the method comprises the following steps: when designing, placing a component on a PCB for packaging; selecting a top wiring layer, placing a plurality of round bonding pads which are arranged at intervals on the bonding pads of the element package, and marking the round bonding pads as hole plugging processing; and selecting a top-layer solder mask layer, and placing a plurality of isolation solder mask areas which are arranged at intervals on the circular bonding pads which are arranged at intervals, wherein each isolation solder mask area is overlapped with the center of the circular bonding pad and is larger than the circular bonding pad. The invention is based on improving the heat radiation capability of the SMD and avoiding the welding offset, and from the design source, the SMD bonding pad is manufactured into the component package, and meanwhile, the heat radiation and the welding offset prevention are effectively realized by the way of heat radiation opening and welding resistance isolation.

Description

PCB heat dissipation and welding offset prevention packaging structure and design method thereof

Technical Field

The invention relates to the field of PCBs (printed circuit boards), in particular to a heat dissipation and welding offset prevention packaging structure of a PCB and a design method thereof.

Background

With the increasingly wide application of electronic products in various industries, the requirements of high integration level and high reliability are increasingly highlighted, so that the requirements on components, PCB design and PCBA manufacturing processes are also increasingly high, and particularly the design of PCBs. Taking the SOT-404 packaged MOS tube as an example, besides ensuring the basic electrical performance of the device, heat dissipation is an important design point which cannot be ignored. In addition, because the device has high heat dissipation requirement, the area of a bonding pad is large, and the device is easy to deviate due to the flow of large-area solder paste during reflow soldering, so that the welding reliability and heat dissipation performance of the device are affected, and the switching characteristic and the service life of MOS are further affected, and the problem of welding deviation of the device in the PCBA assembly process is also considered.

Disclosure of Invention

The invention provides a packaging structure for heat dissipation and welding offset prevention of a PCB and a design method thereof, which are used for solving the technical problems of heat dissipation of devices and welding offset in the PCBA assembly process.

In order to solve the technical problems, the technical scheme provided by the invention is as follows:

a design method of a PCB heat dissipation and soldering deviation prevention packaging structure comprises the following steps:

when designing, placing a component on a PCB for packaging;

selecting a top wiring layer, placing a plurality of round bonding pads which are arranged at intervals on the bonding pads of the element package, and marking the round bonding pads as hole plugging processing;

and selecting a top-layer solder mask layer, and placing a plurality of isolation solder mask areas which are arranged at intervals on the circular bonding pads which are arranged at intervals, wherein each isolation solder mask area is overlapped with the center of the circular bonding pad and is larger than the circular bonding pad.

As a further improvement of the method of the invention:

preferably, a plurality of circular pads arranged at intervals are distributed in an array.

Preferably, the aperture of each circular bonding pad is 0.25-0.35 mm; the hole spacing of the plurality of round bonding pads is 1.5-2.0 mm; the hole-to-pad edge spacing of each circular pad is 1.5-2.0 mm.

Preferably, the plurality of isolation solder resist regions are one or a combination of any of octagons, squares or circles.

Preferably, the octagon side length is 0.4-0.6 mm; the side length of the square is 0.9-1.1 mm; the diameter of the round shape is 0.9-1.1 mm.

The invention also provides a packaging structure for heat dissipation and welding offset prevention of the PCB, which comprises element packaging, wherein in the element packaging, a plurality of round bonding pads which are arranged at intervals are arranged on a top wiring layer of each bonding pad, a plurality of isolation solder resist areas which are arranged at intervals are arranged on a top solder resist layer of each bonding pad, and each isolation solder resist area is overlapped with the center of the round bonding pad and is larger than the round bonding pad.

Further improvement of the package structure as the method of the present invention:

The invention has the following beneficial effects:

1. the invention provides a design method of a packaging structure for heat dissipation and welding offset prevention of a PCB, which integrates heat dissipation and welding offset prevention functions into a whole, reduces the workload of the later stage of PCB design on one hand, and can realize design transplanting and packaging sharing among different PCBs. On the other hand comes the welding reliability problem of direct control PCBA from the design source, and improvement effect can be better, can reduce the waste of manufacturing cost in the improvement process moreover.

2. In the preferred scheme, the heat dissipation and welding deviation prevention packaging structure of the PCB solves the problem of performance reduction caused by the heat influence of the SMD with a large heat dissipation pad by arranging the solder mask isolation and the heat dissipation plug hole on the device packaging, and simultaneously avoids the situation that the welding deviation influences the welding reliability and the device performance. And on the premise of not affecting the electrical performance of devices and PCBs, the repeated work brought by adding part of auxiliary functions in the later stage of PCB design is simplified, and meanwhile, resource transplanting and sharing among different PCB designs can be realized.

In addition to the objects, features and advantages described above, the present invention has other objects, features and advantages. The invention will be described in further detail with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention. In the drawings:

fig. 1 is a flow chart of a design method of a heat dissipation and solder offset prevention package structure of a PCB according to a preferred embodiment of the present invention;

FIG. 2 is a two-dimensional top view of a heat sink pad of preferred embodiment 1 of the present invention;

fig. 3 is a three-dimensional bottom view of a heat dissipation pad of preferred embodiment 1 of the present invention;

fig. 4 is a three-dimensional top view of a heat dissipation pad of preferred embodiment 1 of the present invention;

FIG. 5 is a two-dimensional top view of the isolation solder mask area of preferred embodiment 1 of the present invention;

FIG. 6 is a three-dimensional bottom view of the isolation solder mask area of preferred embodiment 1 of the present invention;

FIG. 7 is a three-dimensional top view of the isolation solder mask area of preferred embodiment 1 of the present invention;

FIG. 8 is a two-dimensional view of SOT-404 package of preferred embodiment 1 of the present invention;

FIG. 9 is a three-dimensional view of the SOT-404 package of the preferred embodiment 1 of the present invention.

Detailed Description

Embodiments of the invention are described in detail below with reference to the attached drawings, but the invention can be implemented in a number of different ways, which are defined and covered by the claims.

PCB (Printed Circuit Board) in this embodiment is a printed circuit board; PCBA (Printed Circuit Board Assembly) is a printed circuit board assembly; SMT (Surface Mounted Technology) is a surface mount technology; SMD (Surface Mounted Devices) is a surface mount device; top Layer is the Top wiring Layer; top solvent is the Top Solder mask.

Referring to fig. 1, the design method of the heat dissipation and soldering offset prevention package structure of the PCB of the present invention includes the following steps:

when designing, placing a component on a PCB for packaging;

selecting a Top Layer, placing a plurality of round bonding pads which are arranged at intervals on the bonding pads of the element package, and marking the round bonding pads as hole plugging;

and selecting a Top solvent layer, and placing a plurality of isolation Solder resist areas which are arranged at intervals on the circular bonding pads which are arranged at intervals, wherein each isolation Solder resist area is overlapped with the center of the circular bonding pad and is larger than the circular bonding pad.

The SMD package integrating the heat dissipation and the anti-welding offset functions is designed, so that the workload of the later stage of PCB design is reduced, and design transplanting and package sharing among different PCBs can be realized. On the other hand comes the welding reliability problem of direct control PCBA from the design source, and improvement effect can be better, can reduce the waste of manufacturing cost in the improvement process moreover.

In practical implementation, the steps can be further expanded and optimized, the following examples are given for illustration, the embodiments are only for illustration, and the combination modes of the technical features are not limited, and any technical features can be reasonably combined across the embodiments.

Example 1:

in this embodiment, SOT-404 packaging is taken as an example, and the design method of the packaging structure for heat dissipation and solder offset prevention of the PCB of the present invention comprises the following steps:

s1: conventional package design: and (4) adopting a conventional package design method to newly build an SOT-404 package.

S2: and (3) designing a heat dissipation bonding pad: referring to fig. 2, 3 and 4, a Top Layer is selected, 5×5 circular pads with aperture of 0.3mm are uniformly arranged in an array on a large heat dissipation pad packaged by SOT-404, and used as heat dissipation holes of devices, and the hole plugging requirement is made during PCB processing, so that solder paste is prevented from leaking to the bottom Layer. The arrangement of the heat dissipation holes 'N x M' can be determined according to the specific size of the heat dissipation bonding pads, the hole-to-hole spacing L1 and the hole-to-bonding pad edge spacing L2 are generally required to be between (1.5-2.0) mm, the aperture d1 of the heat dissipation holes is not too large, in this embodiment, the heat dissipation function can be ensured by setting to (0.3±0.05) mm, and meanwhile, the conventional process treatment of hole plugging can be considered, the design process skill is not repeated here, and the design is determined according to personal design habits.

S3: isolation solder resist design: referring to fig. 5, 6 and 7, on the basis of step S2, the layer is switched to the "Top solution" layer, and the same array arrangement of octagons or squares or circles are uniformly placed around the pads arranged in the "n×m" array as the Solder resist areas. The specific distribution of the solder resist area is determined according to the power and heat dissipation requirements of the device, but the distribution must take the balance of stress (solder paste tension) during welding into consideration. Wherein the octagonal side length a1 is typically set to (0.5 + 0.1) mm, in this embodiment 0.5mm. The square side a2 is (1.0.+ -. 0.1) mm, preferably 1.0mm. The circular diameter d2 is (1.0.+ -. 0.1) mm, preferably 1.0mm.

In fig. 5 and 6, the octagonal inner area is an isolated solder resist area, and the Printed Circuit Board (PCB) is covered with green oil after being processed, when the PCBA passes through a reflow oven, solder paste is heated and melted at high temperature and forms a flowing liquid state, and as the solder resist area at the bottom of the bonding pad has certain resistance, the resistance is uniformly distributed, and no uneven stress phenomenon exists, compared with the bonding pad without the solder resist area, the flowing speed of solder is slowed down, and the time of the device in the solder resist area of the reflow oven is fixed, so the integral offset of the device is reduced, even can be ignored, and the offset of the device can be effectively controlled.

In the SOT-404 packaging structure designed by the steps, as shown in fig. 8 and 9, a top wiring layer of each bonding pad is provided with 5*5 circular bonding pads distributed in an array, a top solder mask layer of each bonding pad is provided with 5*5 isolation solder mask areas distributed at intervals, and each isolation solder mask area is overlapped with the center of each circular bonding pad and is larger than each circular bonding pad. The shape and size of the circular pads and isolation solder resist regions are set as described above.

In practical application, aiming at the problems of heat dissipation and welding offset in the PCBA assembly process, in the PCB design process, the requirements can be met through auxiliary optimization in the later stage of design, and the requirements can also be met through earlier stage design preparation, such as package design. In most cases, the designer selects the later auxiliary optimization and process control to jointly realize, such as adding a heat dissipation hole to improve the heat dissipation performance of the device, setting a solder resist isolation area or controlling a steel mesh opening (process improvement) to control the welding offset phenomenon of the device. Although the problems of heat dissipation and welding offset can be solved by the measures, the workload in the later stage of design is relatively large, especially in the PCB design of a plurality of large heat dissipation pads with multiple types, the workload of the later stage of design optimization is quite large, and the phenomenon of omission is easy to occur. And the welding offset of the device is stopped through the control of the design source, so that more production cost is saved compared with the improvement of the subsequent process.

In the packaging design stage, the heat dissipation and welding offset prevention auxiliary functions are integrated in the SMD packaging, so that the repeated work of the PCB design stage can be avoided to the greatest extent, especially the PCB design aiming at a plurality of types and a plurality of large heat dissipation pads can be realized, and meanwhile, the packaging transplanting and the design sharing can be realized among different PCB designs. In addition, through PCB design software and packaging design method, the heat dissipation structure is subjected to balanced solder mask design, and the offset phenomenon in the welding process can be effectively prevented. Meanwhile, a radiating hole and a technology are added in the solder mask area to manufacture the plug hole, so that the problems of radiating and welding offset of the device are effectively solved.

Based on the two problems of improving the heat dissipation capacity of the SMD and avoiding the welding offset, the invention uses design software to manufacture the SMD bonding pad into component packaging from the design source, and simultaneously performs the heat dissipation opening and the welding resistance isolation, thereby effectively realizing the heat dissipation and the welding offset prevention effects. And on the premise of ensuring that the electrical performance of the SMD is not influenced, the factors influencing the electrical performance of the device are controlled and eliminated from the perspective of PCB packaging design, and a certain technical accumulation is formed for reference and sharing of subsequent design. Taking a MOS tube as an example, poor heat dissipation can affect the switching characteristics, the service life and the like of the MOS tube. Meanwhile, from the design source, the welding reliability of the PCBA is improved, such as SMT (surface mount technology) process improvement of device deviation in the reflow soldering process. The PCB can furthest reduce the auxiliary work in the later stage of PCB design, improve the welding reliability of PCBA, and reduce the additional cost caused by later stage design improvement or process improvement.

The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. The design method of the PCB heat dissipation and soldering deviation prevention packaging structure is characterized by comprising the following steps of:

when designing, placing a component on a PCB for packaging;

2. The method for designing a heat dissipation and solder offset prevention package structure for a PCB of claim 1, wherein the plurality of spaced apart circular pads are distributed in an array.

3. The method for designing a heat dissipation and solder offset prevention package structure for a PCB of claim 1, wherein the aperture of each circular pad is 0.25-0.35 mm; the hole spacing of the plurality of round bonding pads is 1.5-2.0 mm; the spacing between the hole center of each round bonding pad and the edge of the bonding pad is 1.5-2.0 mm.

4. The method for designing a heat dissipation and solder offset prevention package structure for a PCB according to any one of claims 1 to 3, wherein the plurality of isolation solder resist areas are one or a combination of any several of octagons, squares or circles.

5. The method for designing a heat dissipation and soldering offset prevention package structure for a PCB according to claim 4, wherein the octagon side length is 0.4-0.6 mm; the side length of the square is 0.9-1.1 mm; the diameter of the round shape is 0.9-1.1 mm.

6. The heat dissipation and welding deviation prevention packaging structure of the PCB comprises element packaging and is characterized in that in the element packaging, a plurality of round bonding pads which are arranged at intervals are arranged on bonding pads of the element packaging in a top wiring layer, and the bonding pads are marked as hole plugging processing; and a plurality of isolation solder resist areas which are arranged at intervals are arranged on the round bonding pad in the top-layer solder resist layer, and each isolation solder resist area is overlapped with the center of the round bonding pad and is larger than the round bonding pad.

7. The heat dissipation and solder offset prevention package structure of a PCB of claim 6, wherein the plurality of spaced apart circular pads are distributed in an array.

8. The heat dissipation and solder offset prevention package structure of a PCB of claim 6, wherein the aperture of each circular pad is 0.25-0.35 mm; the hole spacing of the plurality of round bonding pads is 1.5-2.0 mm; the spacing between the hole center of each round bonding pad and the edge of the bonding pad is 1.5-2.0 mm.

9. The heat dissipation and solder offset prevention package structure of a PCB of any one of claims 6 to 8, wherein the plurality of isolation solder mask areas are one or a combination of any of octagons, squares or circles.

10. The heat dissipation and solder offset prevention package structure of a PCB of claim 9, wherein the octagon side is 0.4-0.6 mm; the side length of the square is 0.9-1.1 mm; the diameter of the round shape is 0.9-1.1 mm.