CN111278216A

CN111278216A - Heat dissipation and welding deviation prevention packaging structure of PCB and design method thereof

Info

Publication number: CN111278216A
Application number: CN201811476031.9A
Authority: CN
Inventors: 肖洁; 谢佳; 申冬海
Original assignee: Hunan CRRC Times Electric Vehicle Co Ltd
Current assignee: Hunan CRRC Times Electric Vehicle Co Ltd
Priority date: 2018-12-04
Filing date: 2018-12-04
Publication date: 2020-06-12
Anticipated expiration: 2038-12-04
Also published as: CN111278216B

Abstract

The invention discloses a PCB heat dissipation and welding deviation prevention packaging structure and a design method thereof, wherein the method comprises the following steps: during design, after an element is placed on a PCB for packaging; selecting a top wiring layer, placing a plurality of circular bonding pads which are arranged at intervals on a bonding pad of an element package, and marking the bonding pad as a plug hole; the method comprises the steps of selecting a top solder mask layer, placing a plurality of isolation solder mask areas arranged at intervals on a plurality of circular pads arranged at intervals, and enabling each isolation solder mask area to be overlapped with the center of each circular pad and to be larger than the circular pad. Based on two problems of improving the heat dissipation capability of the SMD and avoiding welding offset, the SMD bonding pad is manufactured into a component for packaging from a design source, and meanwhile, the heat dissipation tapping and the solder resistance isolation are carried out, so that the heat dissipation and the welding offset prevention effects are effectively realized.

Description

Heat dissipation and welding deviation prevention packaging structure of PCB and design method thereof

Technical Field

The invention relates to the field of PCBs, in particular to a PCB heat dissipation and welding deviation prevention packaging structure and a design method thereof.

Background

With the increasingly wide application of electronic products in various industries, the requirements for high integration and high reliability are more and more prominent, so that the requirements for components, PCB design and manufacturing processes of PCBA are more and more high, especially for the design of PCB. Taking the MOS transistor packaged by the SOT-404 as an example, heat dissipation is an important design point to be not neglected, in addition to ensuring the basic electrical performance of the device itself. In addition, because the device has high heat dissipation requirements, the area of the bonding pad is large, and the device is easy to deviate due to the flow of large-area solder paste during reflow soldering, so that the soldering reliability and the heat dissipation performance of the device are influenced, the switching characteristic and the service life of the MOS are further influenced, and meanwhile, the problem of soldering deviation of the device in the PCBA assembling process needs to be considered.

Disclosure of Invention

The invention provides a PCB heat dissipation and welding deviation prevention packaging structure and a design method thereof, which are used for solving the technical problems of device heat dissipation and welding deviation in the PCBA assembly process.

In order to solve the technical problems, the technical scheme provided by the invention is as follows:

a design method of a PCB heat dissipation and solder offset prevention packaging structure comprises the following steps:

during design, after an element is placed on a PCB for packaging;

selecting a top wiring layer, placing a plurality of circular bonding pads which are arranged at intervals on a bonding pad of an element package, and marking the bonding pad as a plug hole;

the method comprises the steps of selecting a top solder mask layer, placing a plurality of isolation solder mask areas arranged at intervals on a plurality of circular pads arranged at intervals, and enabling each isolation solder mask area to be overlapped with the center of each circular pad and to be larger than the circular pad.

As a further improvement of the process of the invention:

preferably, the circular pads arranged at intervals are distributed in an array.

Preferably, the aperture of each circular bonding pad is 0.25-0.35 mm; the hole pitch of the circular bonding pads is 1.5-2.0 mm; the distance between the hole of each circular bonding pad and the edge of the bonding pad is 1.5-2.0 mm.

Preferably, the plurality of isolation solder mask regions are in one of an octagon shape, a square shape or a circular shape or a combination of any of the octagon shape, the square shape or the circular shape.

Preferably, the side length of the octagon is 0.4-0.6 mm; the side length of the square is 0.9-1.1 mm; the diameter of the circle is 0.9-1.1 mm.

The invention also provides a PCB heat dissipation and welding deviation prevention packaging structure which comprises an element package, wherein in the element package, a top wiring layer of a pad is provided with a plurality of circular pads which are arranged at intervals, a top solder mask layer of the pad is provided with a plurality of isolated solder mask areas which are arranged at intervals, and each isolated solder mask area is overlapped with the center of the circular pad and is larger than the circular pad.

The packaging structure as the method of the invention is further improved:

The invention has the following beneficial effects:

1. the invention discloses a design method of a PCB heat dissipation and solder offset prevention packaging structure, and provides an SMD packaging structure integrating heat dissipation and solder offset prevention functions, so that on one hand, the workload of the PCB design at the later stage is reduced, and meanwhile, design transplantation and packaging sharing among different PCBs can be realized. On the other hand, the problem of welding reliability of the PCBA is directly controlled from a design source, the improvement effect is better, and the waste of production cost in the improvement process is reduced.

2. In a preferred scheme, the solder mask isolation and the heat dissipation plug hole are arranged on the device package, so that the problem of performance reduction caused by the influence of heat of the SMD with the large heat dissipation pad is solved, and the condition that the welding reliability and the device performance are influenced by welding deviation is avoided. Moreover, on the premise of not influencing the electrical performance of devices and PCBs, the repeated work brought by adding partial auxiliary functions in the later stage of PCB design is simplified, and meanwhile, the resource transplantation and sharing among different PCB designs can be realized.

In addition to the objects, features and advantages described above, other objects, features and advantages of the present invention are also provided. The present invention will be described in further detail below with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the invention and not to limit the invention. In the drawings:

FIG. 1 is a flow chart illustrating a method for designing a heat dissipation and solder-offset-prevention package structure of a PCB according to a preferred embodiment of the present invention;

fig. 2 is a two-dimensional top view of a heat-dissipating pad of preferred embodiment 1 of the present invention;

fig. 3 is a three-dimensional bottom view of the heat-dissipating pad of the preferred embodiment 1 of the present invention;

fig. 4 is a three-dimensional top view of a heat-radiating pad of preferred embodiment 1 of the present invention;

fig. 5 is a two-dimensional top view of an isolated solder mask region of preferred embodiment 1 of the present invention;

FIG. 6 is a three dimensional bottom view of an isolated solder mask area of preferred embodiment 1 of the present invention;

fig. 7 is a three-dimensional top view of an isolated solder mask region of preferred embodiment 1 of the present invention;

FIG. 8 is a two-dimensional view of the SOT-404 package of the preferred embodiment 1 of the present invention;

FIG. 9 is a three-dimensional view of the SOT-404 package of the preferred embodiment 1 of the present invention.

Detailed Description

The embodiments of the invention will be described in detail below with reference to the drawings, but the invention can be implemented in many different ways as defined and covered by the claims.

The pcb (printed Circuit board) referred to in this embodiment is a printed Circuit board; PCBA (printed circuit Board Assembly) is a printed circuit Board assembly; smt (surface Mounted technology) is surface mount technology; smd (surface Mounted devices) is a surface mount device; top Layer is a Top wiring Layer; TopSolder is a top solder mask.

Referring to fig. 1, the method for designing a heat dissipation and solder offset prevention package structure of a PCB of the present invention includes the steps of:

during design, after an element is placed on a PCB for packaging;

selecting a Top Layer, placing a plurality of circular bonding pads which are arranged at intervals on a bonding pad of an element package, and marking the bonding pad as a plug hole;

and selecting a Top Solder layer, placing a plurality of isolation Solder mask areas which are arranged at intervals on a plurality of circular pads which are arranged at intervals, wherein each isolation Solder mask area is overlapped with the center of the circular pad and is larger than the circular pad.

The step is to design the SMD package integrating the functions of heat dissipation and solder migration prevention, so that on one hand, the workload at the later stage of PCB design is reduced, and meanwhile, the design transplantation and package sharing among different PCBs can be realized. On the other hand, the problem of welding reliability of the PCBA is directly controlled from a design source, the improvement effect is better, and the waste of production cost in the improvement process is reduced.

In practical implementation, the steps may be further expanded and optimized, which is illustrated below by way of example, the embodiments are only for illustration, and the combination manner of the technical features is not limited, and any technical features may be reasonably combined across the embodiments.

Example 1:

the present embodiment takes SOT-404 package as an example to illustrate the design method of the heat dissipation and solder offset prevention package structure of the PCB of the present invention, which comprises the following steps:

s1: conventional package design: and adopting a conventional packaging design method to newly build an SOT-404 package.

S2: designing a heat dissipation welding disc: referring to fig. 2, 3 and 4, a Top Layer is selected, 5 × 5 circular pads with the aperture of 0.3mm are uniformly arranged on a large heat dissipation pad packaged by the SOT-404 in an array to serve as heat dissipation holes of a device, and a hole plugging requirement is made during PCB processing to prevent solder paste from leaking to a bottom Layer. The arrangement of the heat dissipation holes, namely 'NxM', can be determined according to the specific size of the heat dissipation pad, the hole-to-hole distance L1 and the hole-to-pad edge distance L2 are generally required to be between (1.5-2.0) mm reasonably, the aperture d1 of each heat dissipation hole is not required to be too large, the heat dissipation function can be ensured by setting the distance to be (0.3 +/-0.05) mm in the embodiment, meanwhile, the conventional process treatment of hole plugging can also be considered, the design process skills are not repeated here, and the arrangement is determined according to the personal design habits.

S3: isolation resistance welding design: referring to fig. 5, 6 and 7, on the basis of step S2, switching to the "Top solvent" layer, octagonal or square or circular in the same array arrangement are uniformly placed around the pads arranged in the "N × M" as Solder resist areas. The specific distribution of the solder mask area is determined according to the power and heat dissipation requirements of the device, but the distribution must consider the balance of stress (solder paste tension) during soldering. Wherein the octagonal side length a1 is typically set to (0.5 ± 0.1) mm, in this embodiment 0.5 mm. The side length a2 of the square is (1.0. + -. 0.1) mm, preferably 1.0 mm. The circular diameter d2 is (1.0. + -. 0.1) mm, preferably set to 1.0 mm.

Fig. 5, fig. 6 the octagon inner region is promptly for keeping apart the solder mask, this here is green oil cover after the PCB processing, when PCBA crosses the reflow oven, the solder paste high temperature is heated and is melted, and form flowing liquid form, because there is certain resistance in the solder mask region of pad bottom, and this resistance distributes evenly, the uneven phenomenon of atress, compare the pad of no solder mask, the speed that the soldering tin flows can slow down, and the time that the device melts the solder mask in the reflow oven is fixed, so the whole offset of device can diminish, can ignore even, thereby can effectively control the skew of device.

The SOT-404 package structure designed in the above steps is as shown in fig. 8 and fig. 9, in the SOT-404 package structure, 5 × 5 circular pads distributed in an array are arranged on a top wiring layer of a pad, 5 × 5 isolated solder mask regions arranged at intervals are arranged on a top solder mask layer of the pad, and each isolated solder mask region overlaps with the center of the circular pad and is larger than the circular pad. The shape and size of the circular pads and the isolation solder mask regions are set as in the above steps.

In practical application, aiming at the problems of heat dissipation and soldering offset in the assembly process of the PCBA, in the design process of the PCB, the requirements can be met through auxiliary optimization in the later stage of design, and the design can also be realized through design preparation in the earlier stage, such as packaging design. In most cases, designers can select later-stage auxiliary optimization and process control to realize the later-stage auxiliary optimization and process control together, for example, later-stage heat dissipation holes are added to improve the heat dissipation performance of the device, and a solder mask isolation region is arranged or a steel mesh opening is controlled (process improvement) to control the welding offset phenomenon of the device. Although the problems of heat dissipation and welding offset can be solved by the measures, the workload in the later stage of design is large, especially in the PCB design of large-quantity and multi-model heat dissipation welding discs, the workload of design optimization in the later stage is large, and the omission phenomenon is easy to occur. And the welding offset of the device is stopped through the management and control of a design source, and more production cost waste can be saved compared with the subsequent process improvement.

In the packaging design stage, the heat dissipation and welding deviation prevention auxiliary functions are integrated in the SMD packaging, so that the repeated work in the PCB design stage can be avoided to the greatest extent, especially the PCB design aiming at a plurality of types and a plurality of large heat dissipation pads, and meanwhile, the packaging transplantation and the design sharing can be carried out among different PCB designs. In addition, through PCB design software and a packaging design method, the heat dissipation structure is subjected to balanced resistance welding design, and the offset phenomenon in the welding process can be effectively prevented. Meanwhile, a radiating hole is added in the solder mask area, and plug hole manufacturing is carried out by a process, so that the problems of heat dissipation and welding offset of a device are effectively solved.

In summary, the invention is based on two problems of improving the heat dissipation capability of the SMD and avoiding the welding offset, and based on the design source, the SMD bonding pads are manufactured into component packaging by using design software, and meanwhile, the heat dissipation and welding offset prevention effects are effectively realized by carrying out the modes of heat dissipation tapping and welding resistance isolation. And on the premise of ensuring that the electrical performance of the SMD is not influenced, factors influencing the electrical performance of the device are controlled and eliminated from the perspective of PCB packaging design, and certain technology accumulation is formed for reference and sharing of subsequent design. Taking the MOS transistor as an example, the switching characteristics and the service life of the MOS transistor are affected by poor heat dissipation. Meanwhile, the welding reliability of the PCBA is improved from a design source, such as the SMT process improvement of component deviation in the reflow soldering process and the like. The auxiliary work in the later stage of PCB design can be reduced to the maximum extent, the welding reliability of the PCBA is improved, and the additional cost brought by later stage design improvement or process improvement is reduced.

The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A design method of a PCB heat dissipation and solder offset prevention packaging structure is characterized by comprising the following steps:

during design, after an element is placed on a PCB for packaging;

selecting a top wiring layer, placing a plurality of circular bonding pads which are arranged at intervals on the bonding pad of the element package, and marking the bonding pad as a plug hole;

and selecting a top solder mask layer, placing a plurality of isolated solder mask areas arranged at intervals on the plurality of circular pads arranged at intervals, wherein each isolated solder mask area is overlapped with the center of the circular pad and is larger than the circular pad.

2. The method as claimed in claim 1, wherein the plurality of circular pads are arranged in an array.

3. The design method of the PCB heat dissipation and solder offset prevention packaging structure according to claim 1, wherein the diameter of each circular pad is 0.25-0.35 mm; the hole pitch of the plurality of circular bonding pads is 1.5-2.0 mm; the distance between the hole of each circular bonding pad and the edge of the bonding pad is 1.5-2.0 mm.

4. The design method of the heat dissipation and solder offset prevention package structure of the PCB according to any one of claims 1 to 3, wherein the plurality of isolation solder mask regions are one or a combination of any several of octagons, squares or circles.

5. The design method of the PCB heat dissipation and solder offset prevention package structure of claim 4, wherein the octagon has a side length of 0.4-0.6 mm; the side length of the square is 0.9-1.1 mm; the diameter of the circle is 0.9-1.1 mm.

6. The utility model provides a PCB's heat dissipation and packaging structure who prevents welding skew, includes component packaging, its characterized in that, among the component packaging, the top layer wiring layer of pad has set up the circular pad that a plurality of intervals were arranged, the top layer solder mask of pad is provided with the isolation solder mask that a plurality of intervals were arranged, every isolation solder mask with the center coincidence of circular pad is greater than circular pad.

7. The PCB heat dissipation and solder migration prevention package structure of claim 6, wherein the plurality of circular pads arranged at intervals are distributed in an array.

8. The PCB heat dissipation and solder migration prevention packaging structure of claim 6, wherein the diameter of each circular pad is 0.25-0.35 mm; the hole pitch of the plurality of circular bonding pads is 1.5-2.0 mm; the distance between the hole of each circular bonding pad and the edge of the bonding pad is 1.5-2.0 mm.

9. The PCB heat dissipation and solder offset prevention packaging structure of any one of claims 6 to 8, wherein the plurality of isolation solder mask regions are one or a combination of any several of octagons, squares or circles.

10. The PCB heat dissipation and solder offset prevention package structure of claim 9, wherein the octagon has a side length of 0.4-0.6 mm; the side length of the square is 0.9-1.1 mm; the diameter of the circle is 0.9-1.1 mm.