CN111272781A - CVD chip for in-situ characterization of transmission electron microscope and use method thereof - Google Patents
CVD chip for in-situ characterization of transmission electron microscope and use method thereof Download PDFInfo
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- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 40
- 238000005530 etching Methods 0.000 claims description 23
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 23
- 229910052737 gold Inorganic materials 0.000 claims description 23
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
- G01N23/02—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material
- G01N23/04—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material and forming images of the material
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
- G01N23/20—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by using diffraction of the radiation by the materials, e.g. for investigating crystal structure; by using scattering of the radiation by the materials, e.g. for investigating non-crystalline materials; by using reflection of the radiation by the materials
- G01N23/20008—Constructional details of analysers, e.g. characterised by X-ray source, detector or optical system; Accessories therefor; Preparing specimens therefor
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Abstract
The invention discloses a CVD chip for in-situ characterization of a transmission electron microscope. The bottom plate chip comprises a silicon chip substrate, an insulating layer film deposited on the silicon chip substrate, a low-temperature area electrode and a high-temperature area electrode deposited on the insulating layer film, an isolating layer film deposited on the surface of the electrodes, two observation windows etched in the low-temperature area and the high-temperature area, and a hollow area etched in the silicon chip substrate; the cover plate chip comprises a silicon chip substrate, a supporting film deposited on the silicon chip substrate, an observation area etched in the supporting film, and a hollowed-out area etched in the silicon chip substrate, wherein the hollowed-out area covers the observation area. Placing a source material for CVD growth in a high-temperature region, placing a catalyst material in a low-temperature region, then adhering a metal adhesive on the peripheral region of the isolation layer film, enabling the support film to face the metal adhesive, enabling the cover plate chip and the bottom plate chip to be oppositely adhered and sealed to form a CVD chip, and placing the CVD chip into a matched transmission electron microscope sample rod for observation and use.
Description
The technical field is as follows:
the invention relates to a CVD chip for in-situ characterization of a transmission electron microscope and a using method thereof, belonging to the fields of characterization testing of the transmission electron microscope, micro-nano processing and chip manufacturing.
Background art:
in the field of new material preparation, Chemical Vapor Deposition (CVD) is a common technique, and is widely used for growing two-dimensional thin films, one-dimensional nanowires, zero-dimensional nanoparticles, and the like. The main growth mechanism is that carrier gas is used to convey source material (vapor generated by evaporation of gas or solid) to the growth area, and reaction growth is carried out at high temperature and under the action of catalyst. The CVD growth mechanism is divided into two types, namely, gas-liquid-solid (Vapor-liquid-solid) and gas-solid-solid (Vapor-solid-solid), according to different material states of the catalyst during CVD growth. Because the CVD growth equipment does not have the condition for observing the growth process of the material in real time, the growth mechanism of the material can only be presumed by means of post analysis, but the conclusion is often controversial, and the controversial cannot be solved at present. Most of the catalyst materials used in CVD are noble metal nanoparticles or other functional nanoparticles with catalytic properties. The resolution capability of a transmission electron microscope is required for observing the structural evolution of the catalyst particles in the growth process. However, transmission electron microscopy characterization requires working under high vacuum (typically 10)-4～10-5Pa) which does not match the growth conditions of CVD (several tens to several hundreds of Pa), and thus the CVD growth conditions cannot be directly realized in a transmission electron microscope.
A chip which has a sealed Micro-cavity, can be heated and can be adapted to a transmission electron microscope is manufactured by a Micro-Electro-Mechanical Systems (MEMS) processing technology, a CVD material growth environment can be constructed in the transmission electron microscope, dynamic evolution of a catalyst structure in a CVD growth process can be effectively distinguished by combining real-time observation of the transmission electron microscope, and the controversial of a CVD growth mechanism is facilitated to be solved. In order to satisfy the working conditions of the transmission electron microscope and the CVD at the same time, the chip structure is designed to contain: (1) the two heating zones are respectively used for heating evaporation source materials and catalyzing growth, (2) a sealed cavity is formed to separate a vacuum environment of a transmission electron microscope and a CVD growth environment, (3) an ultrathin zone is manufactured on the sealed cavity to meet the characterization imaging condition of the transmission electron microscope, and (4) the sample rod can be adapted to the transmission electron microscope and can be matched with an external power supply and a control circuit for use.
At present, no CVD chip product which can be used for a transmission electron microscope exists in the market, only a conventional heating chip and a liquid cavity chip exist, and the CVD chip suitable for the electron microscope provided by the invention can make up for the market blank. Also, by using the product of the present invention, the controversial problems in CVD growth mechanisms can be clarified and solved intuitively.
Disclosure of Invention
The technical problem is as follows: the invention aims to provide a CVD chip for in-situ characterization of a transmission electron microscope and a using method thereof, and the dynamic observation of the material growth process can be realized by using the chip, so that the controversial problem in a CVD growth mechanism is solved, and an experimental basis and a technical support are further provided for regulation and control of material growth.
The technical scheme is as follows: in order to achieve the purpose, the invention adopts the following technical scheme:
a CVD chip for in-situ characterization of a transmission electron microscope comprises a bottom plate chip and a cover plate chip;
the bottom plate chip comprises a first silicon chip substrate, an insulating layer film is deposited on the first silicon chip substrate, a pair of low-temperature area electrodes and a pair of high-temperature area electrodes are deposited on the insulating layer film, an isolating layer film is deposited on the surfaces of the low-temperature area electrodes and the high-temperature area electrodes, a first observation window is etched on the part, located between the pair of low-temperature area electrodes, of the isolating layer film, a second observation window is etched on the part, located between the pair of high-temperature area electrodes, of the isolating layer film, the etching depth of the first observation window and the etching depth of the second observation window are smaller than the thickness of the insulating layer film, a first hollow-out area is etched in the first silicon chip substrate, covers the first observation window and the second observation window, and penetrates through the;
the cover plate chip comprises a second silicon chip substrate, a supporting film is deposited on the second silicon chip substrate, an observation area is etched in the supporting film, the etching depth of the observation area is smaller than the thickness of the supporting film, the observation area covers the first observation window and the second observation window, a second hollowed-out area is etched in the second silicon chip substrate, and the second hollowed-out area covers the observation area and penetrates through the second silicon chip substrate to the supporting film;
the base chip and the cover chip are sealed by the metal adhesive between the isolation layer film and the support film.
Furthermore, the insulating layer film is made of SiC or Si3N4Aluminum oxide Al2O3Any one or a combination of more of them, and the thickness of the insulating layer film is 50 to 2000 nm.
Furthermore, the low-temperature region electrode and the high-temperature region electrode are made of one or a combination of more of copper, gold and platinum, and the thickness of the electrodes is 200-1000 nm.
Furthermore, the isolating layer film is made of SiC or SiO2Silicon nitride Si3N4Aluminum oxide Al2O3One or more combinations of the film structures, and the thickness of the isolating layer film is 300-1000 nm.
Furthermore, the first observation window and the second observation window are rectangular, circular or elliptical, and the thicknesses of the insulating layer films at the first observation window and the second observation window are both 15-50 nm.
Furthermore, the material of the supporting film is silicon carbide SiC or silicon nitride Si3N4Aluminum oxide Al2O3The thickness of the support film is 500 to 2000 nm.
Furthermore, the observation area is rectangular, circular or elliptical, the observation area covers the first observation window and the second observation window, and the thickness of the supporting film at the observation area is 15-50 nm.
Further, the metal adhesive is made of silver paste, ITO, indium or vacuum silicone grease.
The use method of the CVD chip for in-situ characterization of the transmission electron microscope specifically comprises the following steps: firstly, respectively applying current to a low-temperature region electrode and a high-temperature region electrode, wherein the intensity of the current applied to the low-temperature region electrode is smaller than that of the current applied to the high-temperature region electrode; then, a source material for CVD growth is placed between two high-temperature region electrodes, and a catalyst material is placed between two low-temperature region electrodes; then, adhering an adhesive on the peripheral edge area of the isolating layer film of the bottom plate chip; and finally, enabling the supporting film of the cover plate chip to face the metal adhesive, and enabling the bottom plate chip and the cover plate chip to be oppositely adhered and sealed through extrusion, so that the observation area covers the first observation window and the second observation window, thereby forming the CVD chip.
Has the advantages that:
according to the CVD chip for in-situ characterization of the transmission electron microscope and the using method thereof, the dynamic process of material growth in the traditional CVD equipment can be visually presented in the transmission electron microscope by utilizing the chip, the structural evolution of catalyst particles can be directly observed, and the problem of controversial existence in a CVD growth mechanism can be solved. The product of the invention can also be used for exploring the problems of growth process, influencing factors, material structure and quality regulation and control and the like of various nano materials, and is beneficial to providing parameter reference and technical support for the traditional CVD growth process. In addition, the product of the invention can be used for analyzing the dynamic correlation of the structure and the physical property of the nano material on line, and can avoid the problems of pollution and oxidation caused by secondary transfer of the nano material prepared by the traditional CVD technology. The product has a larger potential market after the production of the product, and is expected to have higher economic benefit.
Description of the drawings:
FIG. 1 is a schematic structural diagram of a substrate chip and a cover chip in a CVD chip for in-situ characterization of a transmission electron microscope according to the present invention;
FIG. 2 is a schematic structural diagram of a CVD chip for in-situ characterization of a transmission electron microscope according to the present invention;
FIG. 3 is a top view of a CVD chip for in-situ characterization by transmission electron microscopy according to the present invention;
wherein: 1. a first silicon wafer substrate; 2. an insulating layer film; 3. a low temperature region electrode; 4. an isolation layer film; 5. a first viewing window; 6. a first hollowed-out area; 7. a second viewing window; 8. a high temperature region electrode; 9. supporting the film; 10. a second hollowed-out area; 11. an observation area; 12: a second silicon wafer substrate; 13: a metal adhesive.
The specific implementation mode is as follows:
the invention provides a CVD chip for in-situ characterization of a transmission electron microscope and a using method thereof. The following is a more detailed description taken in conjunction with the accompanying drawings.
As shown in fig. 1, the CVD chip includes a bottom plate chip and a cover plate chip. The bottom plate chip comprises a first silicon chip substrate, an insulating layer film is deposited on the first silicon chip substrate, a pair of low-temperature area electrodes and a pair of high-temperature area electrodes are deposited on the insulating layer film, an isolating layer film is deposited on the surfaces of the low-temperature area electrodes and the high-temperature area electrodes, a first observation window is etched on the portion, located between the pair of low-temperature area electrodes, of the isolating layer film, a second observation window is etched on the portion, located between the pair of high-temperature area electrodes, of the isolating layer film, the etching depth of the first observation window and the etching depth of the second observation window are smaller than the thickness of the insulating layer film, a first hollow-out area is etched in the first silicon chip substrate, covers the first observation window and the second observation window, and penetrates through the.
The cover plate chip comprises a second silicon chip substrate, a supporting film is deposited on the second silicon chip substrate, an observation area is etched in the supporting film, the etching depth of the observation area is smaller than the thickness of the supporting film, the observation area covers the first observation window and the second observation window, a second hollowed-out area is etched in the second silicon chip substrate, and the second hollowed-out area covers the observation area and penetrates through the second silicon chip substrate to the supporting film.
As shown in fig. 2, the base chip and the cover chip are sealed by metal adhesive between the spacer film and the support film.
Furthermore, the insulating layer film is made of SiC or Si3N4Aluminum oxide Al2O3Any one or a combination of more of them, and the thickness of the insulating layer film is 50 to 2000 nm.
Furthermore, the low-temperature region electrode and the high-temperature region electrode are made of one or a combination of more of copper, gold and platinum, and the thickness of the electrodes is 200-1000 nm.
Furthermore, the isolating layer film is made of SiC or SiO2Silicon nitride Si3N4Aluminum oxide Al2O3One or more combinations of the film structures, and the thickness of the isolating layer film is 300-1000 nm.
Furthermore, the first observation window and the second observation window are rectangular, circular or elliptical, and the thicknesses of the insulating layer films at the first observation window and the second observation window are both 15-50 nm.
Furthermore, the material of the supporting film is silicon carbide SiC or silicon nitride Si3N4Aluminum oxide Al2O3The thickness of the support film is 500 to 2000 nm.
Furthermore, the observation area is rectangular, circular or elliptical, the observation area covers the first observation window and the second observation window, and the thickness of the supporting film at the observation area is 15-50 nm.
Further, the metal adhesive is made of silver paste, ITO, indium or vacuum silicone grease.
The use method of the CVD chip for in-situ characterization of the transmission electron microscope specifically comprises the following steps: firstly, respectively applying current to a low-temperature region electrode and a high-temperature region electrode, wherein the intensity of the current applied to the low-temperature region electrode is smaller than that of the current applied to the high-temperature region electrode; then, a source material for CVD growth is placed between two high-temperature region electrodes, and a catalyst material is placed between two low-temperature region electrodes; then, adhering an adhesive on the peripheral edge area of the isolating layer film of the bottom plate chip; and finally, enabling the supporting film of the cover plate chip to face the metal adhesive, and enabling the bottom plate chip and the cover plate chip to be oppositely adhered and sealed through extrusion, so that the observation area covers the first observation window and the second observation window, thereby forming the CVD chip.
The following description is given by way of example only of the material composition, size range and metal adhesive material composition of the base plate chip and the cover plate chip, but the scope of the present invention is not limited thereto, and any person skilled in the art can understand that the changes and substitutions are included in the scope of the present invention, and therefore, the scope of the present invention shall be subject to the claims.
Example 1
A CVD chip for in-situ characterization of a transmission electron microscope is shown in FIG. 1, and comprises a bottom plate chip and a cover plate chip. The bottom plate chip comprises a first silicon chip substrate and a silicon carbide insulating layer film deposited on the first silicon chip substrate, wherein the thickness of the film is 50 nm; a pair of low temperature region gold electrodes and a pair of high temperature region gold electrodes of 200nm thickness deposited on the insulating layer film as shown in FIG. 3; silicon carbide isolating layer films deposited on the surfaces of the two gold electrodes, wherein the thickness of the films is 300 nm; etching a first observation window and a second observation window in an area formed by the insulating layer film and surrounded by the two pairs of gold electrodes, wherein the patterns of the two observation windows are rectangular, and the thickness of the film at the bottom of each observation window is 15 nm; and etching a first hollow-out area in the first silicon chip substrate, wherein the first hollow-out area covers the two observation windows and penetrates through the first silicon chip substrate to the surface insulating layer film. The cover plate chip comprises a second silicon chip substrate and a silicon carbide supporting film deposited on the second silicon chip substrate, wherein the thickness of the film is 500 nm; etching a rectangular observation area in the support film, wherein the observation area covers the first observation window and the second observation window, and the thickness of the support film at the bottom of the observation area is 15 nm; and etching a second hollow-out area in the second silicon chip substrate, wherein the second hollow-out area covers the observation area.
A method of using a CVD chip for transmission electron microscopy in situ characterization, the method comprising: firstly, respectively applying current to a low-temperature area gold electrode and a high-temperature area gold electrode, wherein the intensity of the current applied to the low-temperature area gold electrode is smaller than that of the current applied to the high-temperature area gold electrode; then, placing a source material for CVD growth between two high-temperature-region gold electrodes, and placing a catalyst material between two low-temperature-region gold electrodes; and then, adhering silver glue as a metal adhesive on the peripheral edge area of the isolation layer film of the bottom plate chip, enabling the support film of the cover plate chip to face the metal adhesive, enabling the bottom plate chip and the cover plate chip to be oppositely adhered and sealed through extrusion, enabling the observation area to cover the first observation window and the second observation window, forming a CVD chip as shown in figure 2, and loading the CVD chip into a matched transmission electron microscope sample rod for observation and use.
Example 2
A CVD chip for in-situ characterization of a transmission electron microscope, as shown in fig. 1, comprises a bottom chip and a cover chip. The bottom plate chip comprises a first silicon chip substrate and a silicon carbide insulating layer film deposited on the first silicon chip substrate, wherein the thickness of the film is 500 nm; a pair of low temperature area gold electrodes and a pair of high temperature area gold electrodes with the thickness of 400nm deposited on the insulating layer film; a silicon oxide isolating layer film deposited on the surface of the gold electrode, wherein the thickness of the film is 500 nm; a first observation window and a second observation window which are etched in the region formed by the insulating layer film and surrounded by the two pairs of gold electrodes, wherein the patterns of the two observation windows are circular, and the thickness of the film at the bottom of each window is 30 nm; and etching a first hollow-out area in the first silicon chip substrate, wherein the first hollow-out area covers the two observation windows and penetrates through the first silicon chip substrate to the surface insulating layer film. The cover plate chip comprises a second silicon chip substrate and an alumina support film deposited on the second silicon chip substrate, wherein the thickness of the film is 800 nm; etching a circular observation area in the support film, wherein the observation area covers the first observation window and the second observation window, and the thickness of the support film at the bottom of the observation area is 30 nm; and etching a second hollow-out area in the second silicon chip substrate, wherein the second hollow-out area covers the observation area.
A method of using a CVD chip for transmission electron microscopy in situ characterization, the method comprising: firstly, respectively applying current to a low-temperature area gold electrode and a high-temperature area gold electrode, wherein the intensity of the current applied to the low-temperature area gold electrode is smaller than that of the current applied to the high-temperature area gold electrode; then, placing a source material for CVD growth between two high-temperature-region gold electrodes, and placing a catalyst material between two low-temperature-region gold electrodes; then, ITO is adhered on the peripheral edge area of the isolation layer film of the bottom plate chip to serve as a metal adhesive, the supporting film of the cover plate chip faces the metal adhesive, the bottom plate chip and the cover plate chip are oppositely adhered and sealed through extrusion, the observation area covers the first observation window and the second observation window, as shown in figure 2, a CVD chip is formed, and the CVD chip is arranged in a matched transmission electron microscope sample rod for observation and use.
Example 3
A CVD chip for in-situ characterization of a transmission electron microscope is shown in FIG. 1, and comprises a bottom plate chip and a cover plate chip. The bottom plate chip comprises a first silicon chip substrate and a silicon nitride insulating layer film deposited on the first silicon chip substrate, wherein the thickness of the film is 1000 nm; a pair of platinum electrodes with low temperature area and a pair of platinum electrodes with high temperature area of 500nm thickness deposited on the insulating layer film, and a silicon nitride isolating layer film deposited on the surface of the platinum electrodes, wherein the film thickness is 800 nm; etching a first observation window and a second observation window in an area formed by the insulating layer film and surrounded by the two pairs of platinum electrodes, wherein the patterns of the two observation windows are circular, and the film thickness at the bottom of each window is 40 nm; and etching a first hollow-out area in the first silicon chip substrate, wherein the first hollow-out area covers the two observation windows and penetrates through the first silicon chip substrate to the surface insulating layer film. The cover plate chip comprises a second silicon chip substrate and a silicon nitride supporting film deposited on the second silicon chip substrate, wherein the thickness of the film is 1000 nm; etching an elliptical observation area in the support film, wherein the observation area covers the first observation window and the second observation window, and the thickness of the film at the bottom of the observation area is 25 nm; and etching a second hollow-out area in the second silicon chip substrate, wherein the second hollow-out area covers the observation area.
A method of using a CVD chip for transmission electron microscopy in situ characterization, the method comprising: firstly, respectively applying current to a platinum electrode in a low-temperature area and a platinum electrode in a high-temperature area, wherein the intensity of the current applied to the platinum electrode in the low-temperature area is less than that of the current applied to the platinum electrode in the high-temperature area; then, placing a source material for CVD growth between two high-temperature-region platinum electrodes, and placing a catalyst material between two low-temperature-region platinum electrodes; and then, adhering indium as a metal adhesive on the peripheral edge area of the isolation layer film of the bottom plate chip, enabling the support film of the cover plate chip to face the metal adhesive, enabling the bottom plate chip and the cover plate chip to be oppositely adhered and sealed through extrusion, enabling the observation area to cover the first observation window and the second observation window, forming a CVD chip as shown in figure 2, and placing the CVD chip into a matched transmission electron microscope sample rod for observation and use.
Example 4
A CVD chip for in-situ characterization of a transmission electron microscope is shown in FIG. 1, and comprises a bottom plate chip and a cover plate chip. The bottom plate chip comprises a first silicon chip substrate and an aluminum oxide insulating layer film deposited on the first silicon chip substrate, wherein the thickness of the film is 2000 nm; a pair of low-temperature-region copper electrodes and a pair of high-temperature-region copper electrodes which are deposited on the insulating layer film and are 1000nm thick, and an alumina isolation layer film deposited on the surface of each copper electrode, wherein the thickness of each film is 1000 nm; etching a first observation window and a second observation window in an area formed by the insulating layer film and surrounded by the two pairs of platinum electrodes, wherein the patterns of the two observation windows are elliptic, and the thickness of the film at the bottom of each window is 50 nm; and etching a first hollow-out area in the first silicon chip substrate, wherein the first hollow-out area covers the two observation windows and penetrates through the first silicon chip substrate to the surface insulating layer film. The cover plate chip comprises a second silicon chip substrate and a silicon nitride supporting film deposited on the second silicon chip substrate, wherein the thickness of the film is 2000 nm; etching an elliptical observation area in the support film, wherein the observation area covers the first observation window and the second observation window, and the thickness of the film at the bottom of the observation area is 50 nm; and etching a second hollow-out area in the second silicon chip substrate, wherein the second hollow-out area covers the observation area.
A method of using a CVD chip for transmission electron microscopy in situ characterization, the method comprising: firstly, respectively applying current to a platinum electrode in a low-temperature area and a platinum electrode in a high-temperature area, wherein the intensity of the current applied to the platinum electrode in the low-temperature area is less than that of the current applied to the platinum electrode in the high-temperature area; then, placing a source material for CVD growth between two high-temperature-region platinum electrodes, and placing a catalyst material between two low-temperature-region platinum electrodes; and then, adhering vacuum silicone grease as a metal adhesive on the peripheral edge area of the isolation layer film of the bottom plate chip, enabling the support film of the cover plate chip to face the metal adhesive, enabling the bottom plate chip and the cover plate chip to be oppositely adhered and sealed through extrusion, enabling the observation area to cover the first observation window and the second observation window, forming a CVD chip as shown in figure 2, and loading the CVD chip into a matched transmission electron microscope sample rod for observation and use.
Claims (9)
1. A CVD chip for transmission electron microscope in-situ characterization is characterized in that: the CVD chip comprises a bottom plate chip and a cover plate chip;
the bottom plate chip comprises a first silicon chip substrate (1), an insulating layer film (2) is deposited on the first silicon chip substrate (1), a pair of low-temperature-region electrodes (3) and a pair of high-temperature-region electrodes (8) are deposited on the insulating layer film (2), an isolating layer film (4) is deposited on the surfaces of the low-temperature-region electrodes (3) and the high-temperature-region electrodes (8), a first observation window (5) is etched on the portion, located between the pair of low-temperature-region electrodes (3), of the isolating layer film (4), a second observation window (7) is etched on the portion, located between the pair of high-temperature-region electrodes (8), of the isolating layer film (4), the etching depth of the first observation window (5) and the second observation window (7) is smaller than the thickness of the insulating layer film (2), a first hollow-out region (6) is etched in the first silicon chip substrate (1), and the first hollow-out region (6) covers the first observation window (5) and, Penetrating through the first silicon wafer substrate (1) to the insulating layer film (2);
the cover plate chip comprises a second silicon chip substrate (12), a supporting film (9) is deposited on the second silicon chip substrate (12), an observation area (11) is etched in the supporting film (9), the etching depth of the observation area (11) is smaller than the thickness of the supporting film (9), the observation area (11) covers a first observation window (5) and a second observation window (7), a second hollow-out area (10) is etched in the second silicon chip substrate (12), and the second hollow-out area (10) covers the observation area (11) and penetrates through the second silicon chip substrate (12) to the supporting film (9);
the base chip and the cover chip are sealed by a metal adhesive (13) between the separator film (4) and the support film (9).
2. The CVD chip for in-situ characterization of a transmission electron microscope according to claim 1, wherein: the insulating layer film (2) is made of SiC or Si3N4Aluminum oxide Al2O3In which the thickness of the insulating film (2) is 50 to 2000 nm.
3. The CVD chip for in-situ characterization of a transmission electron microscope according to claim 1, wherein: the low-temperature region electrode (3) and the high-temperature region electrode (8) are made of one or a combination of copper, gold and platinum, and the thickness of the electrodes is 200-1000 nm.
4. The CVD chip for in-situ characterization of a transmission electron microscope according to claim 1, wherein: the isolating layer film (4) is made of SiC or SiO2Silicon nitride Si3N4Aluminum oxide Al2O3One or more combinations of the film structures, and the thickness of the isolating layer film (4) is 300-1000 nm.
5. The CVD chip for in-situ characterization of a transmission electron microscope according to claim 1, wherein: the first observation window (5) and the second observation window (7) are rectangular, circular or elliptical, and the thickness of the insulating layer thin film (2) at the first observation window (5) and the second observation window (7) is 15-50 nm.
6. The CVD chip for in-situ characterization of a transmission electron microscope according to claim 1, wherein: the material of the supporting film (9) is silicon carbide SiC or silicon nitride Si3N4Aluminum oxide Al2O3The thickness of the support film (9) is 500 to 2000 nm.
7. The CVD chip for in-situ characterization of a transmission electron microscope according to claim 1, wherein: the observation area (11) is rectangular, circular or elliptical, the observation area (11) covers the first observation window (5) and the second observation window (7), and the thickness of the supporting film (9) at the observation area (11) is 15-50 nm.
8. The CVD chip for in-situ characterization of a transmission electron microscope according to claim 1, wherein: the metal adhesive (13) is made of silver adhesive, ITO, indium or vacuum silicone grease.
9. Use of a CVD chip for in-situ characterization by transmission electron microscopy according to any of claims 1 to 8, wherein: firstly, respectively applying current to a low-temperature region electrode (3) and a high-temperature region electrode (8), wherein the intensity of the current applied to the low-temperature region electrode (3) is smaller than that of the current applied to the high-temperature region electrode (8); then, a source material for CVD growth is placed between two high-temperature-region electrodes (8), and a catalyst material is placed between two low-temperature-region electrodes (3); then, adhering an adhesive (13) on the peripheral edge area of the isolating layer film (4) of the bottom plate chip; finally, the support film (9) of the cover chip is made to face the metal adhesive (13), and the base chip and the cover chip are sealed by pressing so that the observation area (11) covers the first observation window (5) and the second observation window (7) to form a CVD chip.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112837984A (en) * | 2021-01-06 | 2021-05-25 | 东南大学 | Double-temperature-zone sealed cavity chip suitable for transmission electron microscope characterization and manufacturing method thereof |
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| CN112837984A (en) * | 2021-01-06 | 2021-05-25 | 东南大学 | Double-temperature-zone sealed cavity chip suitable for transmission electron microscope characterization and manufacturing method thereof |
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