CN111263507A

CN111263507A - Circuit board jointed board and manufacturing method thereof, photosensitive assembly and camera module

Info

Publication number: CN111263507A
Application number: CN201811453031.7A
Authority: CN
Inventors: 易峰亮; 黄华; 席逢生
Original assignee: Ningbo Sunny Opotech Co Ltd
Current assignee: Ningbo Sunny Opotech Co Ltd
Priority date: 2018-11-30
Filing date: 2018-11-30
Publication date: 2020-06-09

Abstract

The invention discloses a circuit board spliced board, a manufacturing method thereof, a photosensitive assembly and a camera module. The circuit board jointed board comprises a circuit board main body layer, wherein the circuit board main body layer is provided with a plurality of circuit board areas and a plurality of first interval areas, the circuit board areas are transversely arranged at intervals, and the first interval areas are defined between the adjacent circuit board areas in the same row; and the solder resist ink layer is coated on the surface of the main body layer of the circuit board, the solder resist ink layer is provided with at least one guide groove, the guide groove is positioned in the first interval area, and the guide groove guides the ink to release stress in the curing process of the solder resist ink layer.

Description

Circuit board jointed board and manufacturing method thereof, photosensitive assembly and camera module

Technical Field

The invention relates to the field of camera modules, in particular to a circuit board jointed board with a guide groove and a manufacturing method thereof, which are convenient for reducing the distance between adjacent circuit boards of the circuit board jointed board, so that the circuit board jointed board with the same size can be distributed with more circuit board areas, the yield is improved, and the cost is reduced.

Background

With the popularization and development of smart phones, consumers pay more and more attention to the cost performance of smart phones. The camera shooting function is one of the essential functions of the current smart phones, and the requirements of consumers on the camera shooting function are higher and higher. This just makes the module firm of making a video recording not only need constantly improve the module performance of making a video recording and develop new technology, still needs reduce cost, improves the price/performance ratio of the module of making a video recording.

Among the conventional camera modules, Molding technology is one of the commonly used camera module manufacturing technologies, such as MOC camera module (Molding On Chip) and MOB camera module (Molding On Board). The MOB camera module enables the molding base to be only formed in a non-chip area of the circuit board, namely an outer area of the photosensitive chip; the MOC camera module makes the molding base form the surface of the circuit board and the outer edge area of the photosensitive chip. In the molding process, the upper mold is pressed at a preset position of the circuit board, liquefied molding materials are injected, and the molding materials are solidified through heating and other modes to form a molding base of the camera module, namely, the lens base of the non-molding camera module is used. Therefore, during the molding process, the circuit board imposition needs to provide a location to carry the molded runner. Specifically, the top side of each circuit board region of the circuit board panel is required to be provided with continuous transverse flow channels, and adjacent circuit board regions in the same row are required to be provided with longitudinal flow channels. And the arrangement of the longitudinal flow channels of the adjacent circuit board areas in the same row also needs to consider the subsequent cutting process.

Currently, in the existing molding process, the adjacent circuit board regions in the same row are spaced apart by more than 1 mm. If more circuit board regions are arranged on the same-size circuit board panel to reduce the cost, the interval between adjacent circuit board regions in the same row needs to be reduced. However, the problem is that the spacing between adjacent circuit board regions in the same row is reduced, and the arrangement space for the copper-containing layer between adjacent circuit board regions in the same row cannot be provided. In the prior art, in order to provide a flat setting surface for a solder mask ink layer of a circuit board jointed board, copper-containing layers are arranged in spacing areas of adjacent circuit board areas, the spacing between adjacent circuit board areas in the same row is large, and avoiding spaces can be reserved on two sides of the copper-containing layers in the spacing areas for a subsequent cutting process, as shown in fig. 1 to 3. Therefore, in the molding process of the prior art, the adjacent circuit board areas in the same row need to be cut twice to be separated, namely, the reserved avoiding spaces on two sides of the copper-containing layer in the interval area are respectively cut once.

However, if the interval between adjacent circuit board areas in the same row is small, the avoidance space reserved on two sides of the copper-containing layer in the interval area is also small, and in the cutting process, the cutting knife can easily cut the copper-containing layer in the interval area. The copper-containing layer has high hardness and is difficult to cut, so that the cutting tool is abraded, and the cutting efficiency is influenced. Meanwhile, the cutter generates heat in the process of cutting the copper-containing layer, and further the flatness of each circuit board area and even electronic components are damaged possibly.

However, if the copper-containing layer is not additionally disposed in the spacing area between adjacent circuit board areas, the solder resist ink layer is cured without the copper-containing layer, and cracking, tilting, and the like may occur. Therefore, many problems to be solved are encountered when more circuit board regions are arranged on the same size circuit board panel.

Disclosure of Invention

The invention aims to provide a circuit board jointed board, a manufacturing method thereof, a photosensitive assembly and a camera module, wherein the interval between adjacent circuit board areas in the same row in the circuit board jointed board is smaller than that in the prior art, so that the circuit board jointed board with the same size is distributed with more circuit board areas, the yield is improved, and the cost is reduced.

The invention aims to provide a circuit board jointed board, a manufacturing method thereof, a photosensitive assembly and a camera module, wherein the interval between adjacent circuit board areas in the same row can be between 0.3mm and 0.4mm, and the problem of cracking and tilting when a copper-containing layer and a solder resist ink layer are cut and cured can be avoided.

The invention aims to provide a circuit board jointed board, a manufacturing method thereof, a photosensitive assembly and a camera module, wherein compared with the prior art, adjacent circuit board areas in the same row do not need to be additionally provided with copper-containing layers, and the problems of cracking and tilting of a solder resist ink layer during curing can be avoided.

The invention aims to provide a circuit board jointed board, a manufacturing method thereof, a photosensitive assembly and a camera module, wherein adjacent circuit board areas in the same row do not need to be additionally provided with copper-containing layers, so that the problem that a cutting knife is easy to cut the copper-containing layers in the interval areas in the cutting process can be avoided, the heating problem in the cutting process is further avoided, and the flatness of each circuit board area is kept.

The invention aims to provide a circuit board spliced plate, a manufacturing method thereof, a photosensitive assembly and a camera module, wherein the circuit board spliced plate can avoid heat generation to damage electronic components in the cutting process, and further the yield is improved.

The invention aims to provide a circuit board jointed board, a manufacturing method thereof, a photosensitive assembly and a camera module, wherein adjacent circuit board areas in the same row do not need to be additionally provided with copper-containing layers, so that the requirement on the subsequent cutting process is reduced, and the cutting efficiency is improved.

The invention aims to provide a circuit board spliced board, a manufacturing method thereof, a photosensitive assembly and a camera module, wherein a stress guide groove is arranged between solder resist ink layers of adjacent circuit board areas in the same row, so that the stress during ink curing is conveniently released, and the problems of cracking and tilting in the ink curing process are solved.

The invention aims to provide a circuit board jointed board, a manufacturing method thereof, a photosensitive assembly and a camera module, wherein adjacent circuit board areas in the same row can be separated by cutting once, and compared with the prior art, the circuit board jointed board needs to be cut twice, so that the cutting efficiency is improved.

In order to achieve at least one of the above objects, according to one aspect of the present invention, there is further provided a circuit board panel having a guide groove, comprising:

the circuit board comprises a circuit board main body layer, a circuit board main body layer and a circuit board main body layer, wherein the circuit board main body layer is provided with a plurality of circuit board areas and a plurality of first spacing areas, the circuit board areas are transversely arranged at intervals, and the first spacing areas are defined between the circuit board areas adjacent to each other in the same row; and

and the solder resist ink layer is coated on the surface of the main body layer of the circuit board, the solder resist ink layer is provided with at least one guide groove, the guide groove is positioned in the first interval area, and the guide groove guides the ink to release stress in the process of curing the solder resist ink layer.

According to an embodiment of the present invention, the guide groove located in the first partition region has an elongated shape extending from an upper edge of the first partition region to a lower edge of the first partition region.

According to an embodiment of the present invention, the guide grooves located in the first spaced area are arranged at intervals in the first spaced area.

According to an embodiment of the present invention, the peripheral wall of the guide groove located in the first partition region is located inside with respect to the wiring board region.

According to one embodiment of the invention, the width of the guide groove in the first spaced area does not exceed the width of the first spaced area, but is not less than 0.2 mm.

According to an embodiment of the invention, the width of the first spacer region is between 0.3mm and 0.4 mm.

According to an embodiment of the invention, the first spacer region is implemented as an insulating spacer region.

According to one embodiment of the invention, the circuit board panels further have at least one second spacing region, wherein the circuit board regions are arranged in at least two rows in a spaced array, and the second spacing region is defined between the circuit board regions adjacent to each other in the same row.

According to an embodiment of the invention, the second spaced area is provided with the guide groove.

According to an embodiment of the present invention, the guide groove located in the second spaced area is in an elongated shape and extends from one end of the second spaced area to the other end thereof.

According to an embodiment of the invention, the guide groove provided in the second partition region and the guide groove provided in the second partition region communicate with each other.

According to an embodiment of the present invention, the guide grooves located in the second spaced area are arranged at intervals in the second spaced area.

According to one embodiment of the invention, the width of the guide groove in the second spaced area does not exceed the width of the second spaced area, but is not less than 0.2 mm.

According to an embodiment of the invention, the width of the second spacer region is between 0.3mm and 0.4 mm.

According to an embodiment of the invention, the first spacer region and the second spacer region are implemented as insulating spacer regions.

According to another aspect of the present invention, there is further provided a circuit board assembly comprising:

the circuit board comprises a circuit board main body layer, a circuit board substrate layer and a circuit board substrate layer, wherein the circuit board main body layer is provided with a plurality of circuit board areas and a plurality of insulation spacing areas, the circuit board areas are transversely arranged at intervals, and the insulation spacing areas are defined between the circuit board areas adjacent to each other in the same row; and

and the solder resist ink layer is coated on the surface of the circuit board main body layer.

According to one embodiment of the invention, the circuit board regions are arranged in at least two rows at intervals in an array manner, wherein the insulating interval regions are defined between the circuit board regions adjacent to each other in the same row.

According to another aspect of the invention, the invention further provides a method for manufacturing the jointed board of the circuit board, which comprises the following steps:

forming a circuit board main body layer, wherein the circuit board main body layer is provided with a plurality of circuit board areas arranged in an array and a plurality of spacing areas, and the spacing areas space the adjacent circuit board areas;

printing a solder resist ink layer on the outer surface of the circuit board main body layer, wherein the solder resist ink layer is provided with a plurality of guide grooves, and the guide grooves are positioned in the spacing area; and

and curing the solder resist ink layer, wherein the guide groove guides the solder resist ink layer to release stress.

According to an embodiment of the invention, the spacer region is implemented as an insulating spacer region.

According to another aspect of the present invention, the present invention further provides a photosensitive assembly, comprising:

the circuit board is provided with a circuit main body layer and an ink layer, wherein the ink layer covers the surface of the circuit main body layer, and the edge of the ink layer is positioned outside the edge of the copper-containing layer of the circuit main body layer;

the photosensitive chip is electrically connected and attached to the surface of the circuit board; and

and the molding base adopts a molding process to package the photosensitive chip on the surface of the circuit board.

According to an embodiment of the present invention, the mold base has a bottom edge portion, wherein the bottom edge portion protrudes relative to the bottom of the mold base, is located outside the ink layer, and covers a portion of the edge of the ink layer.

According to another aspect of the present invention, the present invention further provides a camera module, comprising:

a photosensitive assembly as described above; and

an optical assembly, wherein the optical assembly is supported on a top side of the photosensitive assembly corresponding to a photosensitive path of the photosensitive assembly.

the circuit board comprises a circuit main body layer and an ink layer, wherein the ink layer covers the surface of the circuit main body layer, the circuit main body layer is provided with at least two circuit board areas and a spacing area, the spacing area is defined between the adjacent circuit board areas, and the ink layer is provided with at least one guide groove in the spacing area;

at least two photosensitive chips, wherein each photosensitive chip is electrically connected with the corresponding circuit board area; and

and the molding base adopts a molding process to package the photosensitive chips on the surface of the circuit board and fills the guide grooves.

a photosensitive assembly as described above; and

at least two optical assemblies, wherein the optical assemblies are supported on the top side of the photosensitive assembly corresponding to the photosensitive path of the photosensitive assembly.

Drawings

FIG. 1 is a top view of a prior art circuit board imposition relevant to the present invention.

FIG. 2 is an enlarged view of a portion of the prior art circuit board imposition.

FIG. 3 is a partial cross-sectional view taken along the direction B-B of the above-described prior art wiring board imposition.

FIG. 4A is a top view of a circuit board imposition according to an embodiment of the invention.

Fig. 4B is a partially enlarged view of the layout of the circuit board according to the above embodiment of the present invention.

Fig. 4C is a perspective view of a partially enlarged view of the layout of the circuit board according to the above embodiment of the present invention.

FIG. 4D is a partial cross-sectional view along the direction D-D of the layout of a circuit board according to the above-described embodiment of the present invention.

FIG. 5 is a schematic diagram of a circuit board main body layer of a circuit board imposition according to the present invention.

Fig. 6A is a partial top view of a wiring board imposition according to a modified embodiment of the above-described embodiment of the present invention.

Fig. 6B is a partial perspective view of the circuit board imposition according to the above-described modified embodiment of the present invention.

FIG. 7 is a top view of a circuit board imposition according to another embodiment of the present invention.

Fig. 8A is a partially enlarged view of the layout of the circuit board according to the above-mentioned another embodiment of the present invention.

Fig. 8B is a sectional view of the circuit board imposition along the direction F-F according to the above another embodiment of the present invention.

FIG. 8C is a sectional view of the wiring board imposition along the G-G direction according to the above another embodiment of the present invention.

Fig. 8D is a partial perspective view of the circuit board imposition according to the above another embodiment of the present invention.

FIG. 9A is a partial top view of a wiring board imposition according to a modified embodiment of the above-described another embodiment of the present invention

And (6) view.

FIG. 9B is a partial view of a circuit board imposition according to a modified embodiment of the above-mentioned another embodiment of the present invention

Figure in volume.

FIG. 10 is a perspective view of a photosensitive assembly according to an embodiment of the invention.

Fig. 11A is a sectional view of the photosensitive assembly according to the above-described embodiment of the present invention.

Fig. 11B is a cross-sectional view of a camera module according to the present invention.

Fig. 12A is a cross-sectional view of a photosensitive element of a dual camera module according to the present invention.

Fig. 12B is a cross-sectional view of a dual camera module according to the present invention.

FIG. 13 is a flow chart of a method for making a circuit board imposition according to the present invention.

Detailed Description

The following description is presented to disclose the invention so as to enable any person skilled in the art to practice the invention. The preferred embodiments in the following description are given by way of example only, and other obvious variations will occur to those skilled in the art. The basic principles of the invention, as defined in the following description, may be applied to other embodiments, variations, modifications, equivalents, and other technical solutions without departing from the spirit and scope of the invention.

It will be understood by those skilled in the art that in the present disclosure, the terms "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in an orientation or positional relationship indicated in the drawings for ease of description and simplicity of description, and do not indicate or imply that the referenced devices or components must be in a particular orientation, constructed and operated in a particular orientation, and thus the above terms are not to be construed as limiting the present invention.

It is understood that the terms "a" and "an" should be interpreted as meaning that a number of one element or element is one in one embodiment, while a number of other elements is one in another embodiment, and the terms "a" and "an" should not be interpreted as limiting the number.

Fig. 4A to 4D are schematic views illustrating a circuit board panel according to a preferred embodiment of the present invention. The circuit board panel 100 includes a circuit board main layer 110 and a solder resist ink layer 120. The solder resist ink layer 120 is coated on the surface of the circuit board main body layer 110 to form a protective film layer, thereby forming the circuit board jointed board 100.

The circuit board main body layer 110 is a circuit board main body in which a signal layer, a copper-containing layer, an insulating layer, and the like required for a circuit board are stacked in a certain order. For example, the wiring board main body layer 110 may be implemented such that signal layers are respectively disposed at the uppermost layer and the lowermost layer, and a plurality of copper-containing layers and a plurality of insulating layers are alternately disposed between the two signal layers, as shown in fig. 5.

It is noted that the signal layer, the copper-containing layer and the insulating layer are not limited thereto, but are for illustrative purposes only. The wiring board body layer 110 may also include other functional layers, such as a mechanical layer that defines the track plan frame size. That is, the structure and design of the circuit board body layer 110 are not limited by the present invention, and those skilled in the art can realize the structure of the circuit board body layer 100 by using the known lamination method.

The solder resist ink layer 120 is coated on the surface of the circuit board main body layer 110. The solder resist ink layer 120 can selectively mask the conductive lines, so that the pattern is not damaged and short circuit does not occur during solder resist. Meanwhile, the film-forming substance of the solder resist ink layer 120 may have good chemical resistance, solvent resistance, heat resistance, and insulation properties, and have moisture and salt mist prevention functions, thereby preventing solder from adhering to an unnecessary portion, preventing copper from contaminating a solder bath, and the like.

Specifically, the solder resist ink layer 120 may be formed by applying solder resist ink to the surface of the circuit board body layer 110 by screen printing, gravure printing, inkjet printing, etc., and then curing the solder resist ink layer 120. For example, on the surface of the circuit board main body layer 110 on which the circuit is arranged, ink with a specific pattern is printed on the outer surface of the circuit board main body layer 110 in a screen printing manner or a rolling coating manner on a negative film. The ink is then cured by exposure to light or the like. The solidified printing ink protects the circuit from being damaged and does not generate short circuit during solder resistance.

Further, the wiring board body layer 110 has a plurality of wiring board regions 130 and a plurality of first spacing regions 140. The circuit board regions 130 are transversely arranged at intervals on the circuit board jointed board 100, and the first interval region 140 is defined between the adjacent circuit board regions 130 in the same row. Specifically, the wiring board panel 100 includes a plurality of connectors 160 electrically connected to corresponding wiring board regions 130. The connectors 160 extend outward from the corresponding wiring board regions 130. In this embodiment, the circuit board panels are adjacent end to end in the column direction. I.e., connectors 160 of the previous row of circuit board panels meet or are adjacent to circuit board region 130 of the next row of circuit board panels.

That is, in the preferred embodiment of the present invention, the circuit board region 130 and the first spacing region 140 are arranged to be spaced apart from each other. The circuit board region 130 corresponds to a wiring region of the circuit board main body layer 110 (i.e., a region where a signal layer, a copper-containing layer, an insulating layer, and the like are arranged in the circuit board main body layer 110), and when the circuit board jointed board 100 is cut, the circuit board region 130 forms a corresponding circuit board single body. The first spacing region 140 corresponds to a non-wiring region of the circuit board main body layer 110 (i.e., a signal layer, a copper-containing layer, and an insulating layer are not disposed in the circuit board main body layer 110), and can be used for cutting. That is, the circuit board region 130 may be cut along the first spacing region 140 to form a single circuit board.

In the prior art, the solder resist ink layer is continuously laid on the surface of the circuit board main body layer. I.e. continuously over the board area and the spacer area. In order to make the ink well cured, in the prior art, the copper-containing layer is arranged in the spacing region of the circuit board main body layer, so that the solder resist ink is cured on the copper layer, the toughness of the copper is good, and the functions of compaction and tilting and cracking prevention are achieved, as shown in the figure. These arrangements benefit from the large size of the spacing region in the prior art, typically at least 1 mm. Not only can provide arrangement space for the copper-containing layer, but also can reserve space for the cutting region on two sides of the copper-containing layer, as described above, and the description is omitted here.

In the invention, in order to arrange more circuit board areas on the circuit board spliced board with the same size, the yield is improved and the cost is reduced. Compared with the prior art, the interval between the circuit board areas adjacent to each other in the same row is small. Preferably, the interval between the circuit board areas adjacent to each other in the same row can be between 0.3mm and 0.4mm, and the problem of cracking and lifting when the copper-containing layer and the solder mask ink layer are cut and cured can be avoided.

Specifically, in the preferred embodiment of the present invention, the width W of the first spacing region 140₁And the thickness of the copper-containing layer is between 0.3mm and 0.4mm, and a copper-containing layer is not required to be arranged in the interval area of the circuit board main body layer. That is, the first spacer region 140 in the present invention is implemented as an insulating spacer region and is formed by laying an insulating layer.

The solder resist ink layer 120 has at least one guiding groove 121 for guiding the ink to release stress when the solder resist ink is cured, so as to prevent tilting and cracking. The guide grooves 121 are located in the first partition region 140, i.e., between the adjacent wiring board regions 130. Preferably, the width W of the first spacing region 140₁Is 0.33 mm.

In the preferred embodiment of the present invention, the guiding groove 121 is elongated and extends from the upper edge of the first spacing region 140 to the lower edge of the first spacing region 140. Preferably, the width W of the guide groove 121₂Not exceeding the width W of the first spaced area 140₁But W₂Not less than 0.2 mm.

Fig. 4D is a cross-sectional view of the circuit board panels 100 in the first spacing region 140 and its periphery. In this embodiment, the formation of the guiding grooves 121 exposes the insulation layer of the circuit board panels 100. The explanation will be made with the direction toward the center of the first partition area 140 as inward and the direction from the first partition area 140 toward the board areas 130 on both sides thereof as outward. In the present invention, the peripheral wall of the guide groove 121 is located inside with respect to the wiring board region 130. That is, in the preferred embodiment of the present invention, the guide groove 121 partitions the solder resist ink layer 120 into a plurality of solder resist ink areas 122. The solder resist ink area 122 covers the corresponding circuit board area 130 and the adjacent outer edge of the first spacing area 140. Alternatively, the edge of the solder resist ink area 122 is located outside the edge of the circuit board area 130 and inside the first spacing area 140.

Of course, the guiding groove 121 may be implemented in other shapes and sizes, for example, the guiding groove 121 has a cylindrical shape, a truncated cone shape, a trapezoidal cross section, and the like, or a plurality of guiding grooves 121 are disposed at intervals in the first interval region 140, as shown in fig. 6A and 6B, and the invention is not limited thereto.

The guide groove 121 may be formed by pre-designing a printing plate for screen printing, gravure printing, or inkjet printing, so as to prevent ink from being printed at a predetermined position of the guide groove 121. While the shape and size of the guide groove 121 disregarded can also be realized by adjusting or changing the printing plate.

Thereafter, a plurality of photosensitive chips 200 and a series of electronic components 300 are mounted on each of the wiring board regions 130, respectively. During molding, the circuit board jointed board 100 provided with the photosensitive chip 200 and the electronic component 300 is placed in a lower mold, an upper mold is pressed at a preset position of a circuit board area, and liquefied molding materials are injected. The molding material flows through the flow channels corresponding to the spacing areas and is filled to a preset position. The molding material is cured by heating or the like to form a molded base. During cutting, the cutting blade separates the circuit board regions 130 adjacent to each other in the same row along the first spacing region 140 to form a plurality of photosensitive assemblies. Preferably, a cutting blade may cut along the guide groove 121. In the just-cut photosensitive assembly, the corresponding edge of the solder resist ink area 122 is still located outside the edge of the circuit board area 130. Then, the excess portion can be further cut off to reduce the size of the photosensitive member.

Therefore, since the first spacing region 140 is not provided with a copper-containing layer, the cutting knife does not need to worry about the copper-containing layer in the cutting process, and further, the cutting knife does not generate heat, thereby protecting the electronic components and improving the cutting efficiency. Compared with the prior art, the copper-containing layers in the interval areas need to be avoided, two cutting knives are needed to be used for completely separating the circuit board areas 130 adjacent to each other in the same row, and the circuit board areas 130 adjacent to each other in the same row can be completely separated by only one cutting knife without avoiding the copper-containing layers, so that the cutting efficiency is improved.

Fig. 7 to 8D are views illustrating a circuit board panel with a guiding groove according to another embodiment of the present invention. In the present embodiment, the circuit board panel 100A includes a circuit board main layer 110A and a solder resist ink layer 120A. The solder resist ink layer 120A is coated on the surface of the circuit board main body layer 110A.

Unlike the previous embodiment, the panel 100A has a plurality of panel regions 130A, a plurality of first spaced-apart regions 140A and second spaced-apart regions 150A. The circuit board regions 130A are arranged in the circuit board jointed board 100A at intervals in an array, and are arranged in two rows. The first spacing region 140A is defined between the adjacent circuit board regions 130A in the same row, and the second spacing region 150A is defined between the adjacent circuit board regions 130A in the same column. The first spaced apart region 140A and the second spaced apart region 150A meet to correspond to a runner during molding. The first spaced regions 140A are located at both sides of the second spaced regions 140A. In this embodiment, the circuit board panels are adjacent end to end in the column direction. I.e., a plurality of connectors 160A electrically connected to corresponding board regions 130A, extend outwardly from each side of board panel 100A. The circuit board area 130A of the previous row of circuit board panels is adjacent to the circuit board area 130A of the next row of circuit board panels.

In this embodiment, the solder resist ink layer 120A is provided with corresponding guide grooves 121A in the second partition area 150A in addition to the corresponding guide grooves 121A in the first partition area 140A. The guiding groove 121A disposed in the first spacing region 140A may be used to release stress generated when the ink in the first spacing region 140A is cured. The guiding grooves 121 disposed in the second spaced areas 150A may be used to release stress generated when the ink in the second spaced areas 150A is cured.

Preferably, the guide groove 121A is elongated. Preferably, the guide groove 121 disposed in the second partition region 150A communicates with the guide groove 121A disposed in the second partition region 150A. Specifically, for the upper row of the circuit board panels 100A, the guiding groove 121A disposed in the first spacing region 140A may extend from the upper edge of the first spacing region 140A to the upper edge of the second spacing region 150A. For the lower row of circuit board panels 100A, the guiding groove 121A disposed in the first spacing region 140A may extend from the lower edge of the second spacing region 150A to the lower edge of the first spacing region 140A. The guide groove 121A disposed in the second spaced area 150A extends from one end to the other end of the second spaced area 150A.

Alternatively, as will be appreciated by those skilled in the art, the guide groove 121A may be intermittently disposed in the second spaced area 150A, as shown in fig. 9A and 9B. The guide grooves 121A may be intermittently provided in the second spaced area 150A. The guide grooves 121A disposed in the second spaced area 150A and the guide grooves 121A disposed in the second spaced area 150A may not be connected to each other or may not be different from each other. Further, the guiding groove 121A may also be implemented in other shapes and sizes, for example, the guiding groove 121A has a cylindrical shape, a truncated cone shape, a trapezoidal cross section, and the like, or a plurality of guiding grooves 121A are disposed at intervals in the first interval area 140A or the second interval area 150A, which is not limited herein.

Specifically, in the present embodiment, the width W of the first spacing region 140A₁And a width W of the second spaced region 150A₃Between 0.3mm and 0.4mm, and all need not be equipped with the copper-containing layer in the interval region of circuit board bulk layer. That is, in the present embodiment, the first and second spaced-

apart regions

140A and 150A are each implemented as an insulating spaced-apart region, and are formed by laying an insulating layer.

Preferably, the width W of the first spacing region 140A₁And a width W of the second spaced region 150A₃Is 0.33 mm. Correspondingly, the width W of the guiding groove 121A disposed in the first spacing region 140A₂Not exceeding the width W of the first spacing region 140A₁But W₂Not less than 0.2 mm. A width W of the guide groove 121A provided in the second spaced area 150A₂Not exceeding the width W of the second spaced region 150A₃But W₂Not less than 0.2 mm.

As shown in fig. 8B, a cross-sectional view of the first spacing region 140A and its periphery is shown as an interface view of the circuit board panel 100A in the F-F direction. Similar to the previous embodiment, the formation of the guiding grooves 121A in the first spacing region 140A exposes the insulation layer of the circuit board panel 100A in the first spacing region 140A. The explanation will be made with the direction toward the center of the first partition area 140A as inward and the direction from the first partition area 140A toward the board areas 130A on both sides thereof as outward. In the present embodiment, the peripheral wall of the guide groove 121A is located inside with respect to the wiring board region 130A. That is, in the preferred embodiment of the present invention, the guide groove 121A partitions the solder resist ink layer 120A into a plurality of solder resist ink areas 122A. The solder resist ink area 122A covers the corresponding circuit board area 130A and the adjacent outer edge of the first spacing area 140A. Alternatively, the edge of solder resist ink area 122A is located outside the edge of circuit board area 130A and inside first spacing area 140A.

As shown in fig. 8C, a cross-sectional view of the second spacing region 150A and its periphery is shown as an interface view of the circuit board panel 100A in the G-G direction. In this embodiment, the guiding grooves 121A of the second spacing region 150A are formed such that the circuit board jointed board 100A is exposed with an insulating layer in the second spacing region 150A. The explanation will be made with the direction toward the center of the second partition region 150A as inward and the direction from the second partition region 150A toward the board regions 130A on both sides thereof as outward. In the present embodiment, the peripheral wall of the guide groove 121A is located inside with respect to the wiring board region 130A. The solder resist ink area 122A covers the outer edges of the corresponding circuit board area 130A and the adjacent second spacing area 150A. Alternatively, the edge of the solder resist ink area 122A is located outside the edge of the circuit board area 130A and inside the second spacing area 150A.

Thereafter, a plurality of photosensitive chips 200 and a series of electronic components 300 are mounted on each of the wiring board regions 130, respectively. During molding, the circuit board jointed board 100 provided with the photosensitive chip 200 and the electronic component 300 is placed in a lower mold, an upper mold is pressed at a preset position of a circuit board area, and liquefied molding materials are injected. The molding material is filled to a predetermined position through a flow passage corresponding to the first and second spaced-apart regions. The molding material is cured by heating or the like to form the molded conjoined base.

In this embodiment, during dicing, a dicing blade or a laser separates the circuit board regions 130A adjacent to each other in the same row along the first spacing region 140A, and separates the circuit board regions 130A adjacent to each other in the same column along the second spacing region 150A to form a plurality of photosensitive elements. Preferably, a cutting blade may cut along the guide groove 121A. In the just-cut photosensitive assembly, the corresponding edge of the solder resist ink area 122A is still located outside the edge of the circuit board area 130A. Then, the excess portion can be further cut off to reduce the size of the photosensitive member.

That is, the photosensitive assembly just cut includes a circuit board 400, the photosensitive chip 200, a series of the electronic components 300, and a mold base 500. The photosensitive chip 200 and the electronic component 300 are communicably attached to the circuit board 400. The mold base 500 encapsulates the photosensitive chip 200 and the electronic component 300 on the circuit board 400 through a molding process, so as to form a MOB or MOC camera module. The mold base 500 has an optical window 520 corresponding to the photosensitive chip 200. The circuit board 400 is obtained by cutting the circuit board panel 100, that is, the circuit board 400 has a circuit main body layer 410 and an ink layer 420. The circuit main body layer 410 is obtained by cutting the circuit board main body layer 110 of the circuit board patch 100, and the ink layer 420 is obtained by cutting the solder resist ink layer 110 of the circuit board patch 100. Correspondingly, the ink layer 420 covers the surface of the circuit body layer 410. The edge of the ink layer 420 is located outside the edge of the copper-containing layer of the line body layer 410, as shown in fig. 10 and 11A.

Further, during the molding process, the guide groove 121 is filled with a molding material, that is, the guide groove 121 is filled with a molded connected base formed by curing the molding material. After the cutting, particularly along the guide grooves 121, the bottom edge 510 of the mold base 500 is in surface contact with the upper surface of the circuit body layer 410 of the circuit board 400 in the resulting photosensitive assembly. The bottom rim 510 is protruded with respect to the bottom of the mold base 500, and the height of the bottom rim 510 is the same as the depth of the guide groove 121. And the bottom edge 510 is located outside the ink layer 420 and covers a part of the edge of the ink layer 420.

The present invention further provides a camera module, as shown in fig. 11B. The camera module comprises the photosensitive assembly and an optical assembly 600, wherein the optical assembly is supported on the top side of the photosensitive assembly and corresponds to a photosensitive path of the photosensitive assembly. The optical assembly 600 may be a set of optical lens, or a motor and an optical lens, so as to form a fixed focus camera module or a moving focus camera module, which is not limited in the present invention.

It should be noted that the circuit board panels 100 of the present invention are also suitable for producing multi-camera modules, as shown in fig. 12A and 12B. Namely, in the cutting process, laser cutting or blade cutting is used for cutting the circuit board jigsaw 100 into a plurality of circuit boards 400 with at least two circuit board regions 130, wherein a spacing region (part of the first spacing region or the second spacing region) is defined between the adjacent 130 of the circuit board regions. The ink layer 420 is coated on the surface of the circuit body layer 410 of the circuit board 400, and the guiding grooves 121 are formed in the spacing region. The cut circuit board electrically connects the plurality of photosensitive chips 200 and the plurality of electronic components 300, and the mold base 500 covers the surface of the circuit board 400 after cutting and fills the guide grooves 121. The mold base 500 has at least two light windows 520 corresponding to the photosensitive chips 200

Taking a double camera module as an example, the circuit board 400 obtained by cutting has 130 adjacent two circuit board regions, wherein each circuit board region is correspondingly and electrically connected with the corresponding photosensitive chip 200 and the electronic component 300. A spacing region is defined between 130 of two adjacent circuit board regions, and the ink layer 420 is provided with a guiding groove in the spacing region. The molding base 500 encapsulates the photosensitive chip 200 and the electronic component 300 on the surface of the circuit board 400, and fills the guiding groove 121 between two adjacent circuit board areas 130.

Further, in the multi-camera module, especially when cut along the guide groove 121, the bottom edge portion 510 of the mold base 500 is in contact with the upper surface of the circuit body layer 410 of the circuit board 400. And the bottom edge 510 is located outside the ink layer 420 and covers a part of the edge of the ink layer 420. The bottom rim 510 protrudes from the bottom of the mold base 500 to the same height as the depth of the guide groove 121.

The optical assemblies 600 are correspondingly supported on the top sides of the photosensitive assemblies of the multi-camera module and respectively correspond to the photosensitive paths of the corresponding photosensitive chips.

According to another aspect of the present invention, there is further provided a method for manufacturing a circuit board imposition, which can be used for the above manufacturing of the circuit board imposition to achieve the object and advantages of the present invention, as shown in FIG. 13.

Step 610: forming a circuit board main body layer, wherein the circuit board main body layer is provided with a plurality of circuit board areas arranged in an array and a plurality of spacing areas, and the spacing areas space the adjacent circuit board areas.

The formation of the circuit board body layer can adopt various methods, and the invention is not limited. For example, the inner substrate is subjected to pretreatment processes such as cutting, edge grinding, brushing, and dust removal, and then a dry film is pressed thereon. And (3) attaching a preset negative film to the dry film, and performing exposure treatment by using light irradiation. Then 1% Na may be used₂CO₃Pressurizing 2.5kg/cm²And (5) flushing to realize development. Etching copper using the exposed dry film as a resist using an acidic etchant. The polymerized ink is rinsed with a strong base, such as 5% NaOH, to effect the stripping step, revealing the desired pattern of the copper layer. Correspondingly, in this step, compared to the prior art, no copper layer needs to be provided in the spacer region. And the width of the spacing region can be further reduced. Preferably, the width of the spacing region is between 0.3mm and 0.4 mm.

Step 620: printing a solder resist ink layer on the outer surface of the circuit board main body layer, wherein the solder resist ink layer is provided with a plurality of guide grooves, and the guide grooves are positioned in the spacing area.

The solder resist ink layer may be printed by screen printing, gravure printing, inkjet printing, or other printing techniques. The guide slot is preferably elongate and extends through the spacer region. Preferably, the width of the guide groove is at least 0.2 mm. The width of the guide groove is smaller than that of the spacing area.

Step 630: and curing the solder resist ink layer, wherein the guide groove guides the solder resist ink layer to release stress.

Step 640: and the photosensitive chip and/or the electronic component are electrically connected with the corresponding circuit board area.

Step 650: and packaging the photosensitive chip and/or the electronic component by adopting a molding process to form a photosensitive assembly jointed board.

Step 660: and cutting the photosensitive assembly jointed board along the spacing region to form a plurality of photosensitive assemblies.

At this time, since the spacer region is an insulating spacer region in the present invention, a copper-containing layer is not provided in the spacer region, and each spacer region needs to be cut only once. Compared with the existing method that the copper-containing layer needs to be avoided for cutting twice, the method is higher in efficiency.

The foregoing describes the general principles of the present application in conjunction with specific embodiments, however, it is noted that the advantages, effects, etc. mentioned in the present application are merely examples and are not limiting, and they should not be considered essential to the various embodiments of the present application. Furthermore, the foregoing disclosure of specific details is for the purpose of illustration and description and is not intended to be limiting, since the foregoing disclosure is not intended to be exhaustive or to limit the disclosure to the precise details disclosed.

The block diagrams of devices, apparatuses, systems referred to in this application are only given as illustrative examples and are not intended to require or imply that the connections, arrangements, configurations, etc. must be made in the manner shown in the block diagrams. These devices, apparatuses, devices, systems may be connected, arranged, configured in any manner, as will be appreciated by those skilled in the art. Words such as "including," "comprising," "having," and the like are open-ended words that mean "including, but not limited to," and are used interchangeably therewith. The words "or" and "as used herein mean, and are used interchangeably with, the word" and/or, "unless the context clearly dictates otherwise. The word "such as" is used herein to mean, and is used interchangeably with, the phrase "such as but not limited to".

It should also be noted that in the devices, apparatuses, and methods of the present application, the components or steps may be decomposed and/or recombined. These decompositions and/or recombinations are to be considered as equivalents of the present application.

The previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the scope of the application. Thus, the present application is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

The foregoing description has been presented for purposes of illustration and description. Furthermore, the description is not intended to limit embodiments of the application to the form disclosed herein. While a number of example aspects and embodiments have been discussed above, those of skill in the art will recognize certain variations, modifications, alterations, additions and sub-combinations thereof.

It will be appreciated by persons skilled in the art that the embodiments of the invention described above and shown in the drawings are given by way of example only and are not limiting of the invention. The objects of the invention have been fully and effectively accomplished. The functional and structural principles of the present invention have been shown and described in the examples, and any variations or modifications of the embodiments of the present invention may be made without departing from the principles.

Claims

1. A circuit board jigsaw with a guide groove is characterized by comprising:

2. A wiring board panel as defined in claim 1, wherein said guide slot in said first spaced region is elongated and extends from an upper edge of said first spaced region to a lower edge of said first spaced region.

3. A wiring board panel as defined in claim 1, wherein the guide grooves in the first spacing region are arranged at intervals in the first spacing region.

4. A wiring board panel as defined in claim 1, wherein the peripheral wall of the guide groove located in the first spaced-apart region is located inwardly with respect to the wiring board region.

5. A wiring board panel as defined in claim 1, wherein the width of said guide groove in said first spacing region does not exceed the width of said first spacing region but is not less than 0.2 mm.

6. A circuit board panel according to any one of claims 1 to 4, wherein the width of the first spaced region is between 0.3mm and 0.4 mm.

7. A wiring board panel as claimed in any one of claims 1 to 4, wherein the first spacer region is embodied as an insulating spacer region.

8. A wiring board panel as defined in any one of claims 1 to 4, wherein said wiring board panel further has at least a second spacing region, wherein said wiring board regions are arranged in a spaced array in at least two rows, wherein adjacent wiring board regions in a same row define said second spacing region therebetween.

9. A wiring board panel as defined in claim 8, wherein the second spaced-apart region is provided with the guide slot.

10. A wiring board panel as defined in claim 9, wherein said guide slot in said second spaced region is elongated and extends from one end of said second spaced region to the other end thereof.

11. A wiring board puzzle according to claim 9, wherein the guide groove provided in the second partition region and the guide groove provided in the second partition region communicate with each other.

12. A wiring board panel as defined in claim 9, wherein said guide grooves in said second spaced region are spaced from said second spaced region.

13. A wiring board panel as defined in claim 9, wherein the width of said guide groove in said second spaced region does not exceed the width of said second spaced region but is not less than 0.2 mm.

14. A wiring board panel as defined in claim 9, wherein the width of the second spaced region is between 0.3mm and 0.4 mm.

15. A wiring board panel as defined in claim 8, wherein the first and second spacing regions are embodied as insulating spacing regions.

16. A circuit board panel, comprising:

17. A wiring board panel as defined in claim 16, wherein said wiring board regions are arranged in a spaced array in at least two rows, wherein adjacent said wiring board regions in a same column define said insulating spacer region therebetween.

18. A method for manufacturing jointed boards of circuit boards is characterized by comprising the following steps:

19. A wiring board panel manufacturing method according to claim 18, wherein the spacing region is implemented as an insulating spacing region.

20. A photosensitive assembly, comprising:

and the molding base adopts a molding process to form an optical window corresponding to the photosensitive chip.

21. The photosensitive assembly of claim 20, wherein the mold base has a bottom edge, wherein the bottom edge is raised relative to the bottom of the mold base, and is located outside the ink layer, covering a portion of the edge of the ink layer.

22. A camera module, comprising:

a photosensitive assembly according to claim 20 or 21; and

23. A photosensitive assembly, comprising:

and the molding base is packaged by adopting a molding process to form at least two light windows corresponding to the photosensitive chip.

24. Photosensitive assembly according to claim 23, wherein the spacer regions are implemented as insulating spacer regions.

25. A camera module, comprising:

a photosensitive assembly according to claim 20 or 21; and