CN111245206B - Frequency converter IGBT drive control method and control device - Google Patents
Frequency converter IGBT drive control method and control device Download PDFInfo
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- CN111245206B CN111245206B CN202010280301.XA CN202010280301A CN111245206B CN 111245206 B CN111245206 B CN 111245206B CN 202010280301 A CN202010280301 A CN 202010280301A CN 111245206 B CN111245206 B CN 111245206B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0012—Control circuits using digital or numerical techniques
Abstract
The drive control method of the IGBT of the frequency converter comprises the following steps: the first processor judges whether to generate a trigger level signal according to the working state of the frequency converter; if the trigger level signal is generated, the first processor receives a feedback signal output by the driving circuit and judges whether an output pulse exists in the feedback signal; if the feedback signal has output pulse and the current feedback signal is the same as the level state of the trigger level signal, the first processor outputs a driving abnormal level signal to the second processor; and if the feedback signal has output pulses and the current feedback signal is opposite to the level state of the trigger level signal, the first processor outputs a driving normal level signal to the second processor. By adopting the method, the protection effect on the IGBT inversion unit can be realized on the premise of not arranging an external crystal oscillator, the whole logic control can be completed as long as the driving circuit can feed back a pulse signal, and the frequency converter system is adaptive to various driving circuits.
Description
Technical Field
The invention belongs to the technical field of power electronics, and particularly relates to a frequency converter IGBT drive control method and a frequency converter IGBT drive control device.
Background
In recent years, frequency conversion technology using an inverter circuit as a core has been increasing and rapidly developed. The application of high-power frequency conversion technology is increasing day by day. The high-power frequency converter usually adopts a high-power IGBT as a main switch device of an inverter circuit, and the on-off state change of the high-power frequency converter is realized by a main control circuit taking a single chip microcomputer as a core through a drive circuit.
For the selected driving circuit, various drivers are available on the market. Such as the single channel plug and play driver 1SP0335 manufactured and sold by Power Integrations, which is capable of safely and reliably driving high voltage, high Power IGBT modules in parallel. The driving logic of the driver in normal operation is to return a high-level pulse signal of 700ns after receiving the trigger signal and return a high-level pulse signal of 700ns after receiving the turn-off signal, so as to represent that the driver is in normal operation. During the trigger operation, if a fault occurs, a high level signal of 9 mus is fed back. In order to acquire a timing signal fed back by the driver, an external crystal oscillator with high precision and high processing performance needs to be configured for the CPLD for capture under normal conditions. If the IGBT module is used for driving an inductive load, such as a motor, six paths of IGBT clock signals need to be acquired, and very high requirements are provided for the selection and matching of an external crystal oscillator. In addition, the driver, the direct current voltage detection module, the output voltage detection module and the current detection module can be integrated on the same PCB, and external crystal oscillators can introduce high-frequency signals, so that EMC exceeds standards easily, and detection precision is affected.
The above information disclosed in this background section is only for enhancement of understanding of the background of the application and therefore it may comprise prior art that does not constitute known to a person of ordinary skill in the art.
Disclosure of Invention
The invention designs and provides a frequency converter IGBT drive control method without a crystal oscillator, aiming at the problems that in the prior art, the frequency converter IGBT drive control needs the assistance of an external crystal oscillator, the matching degree of a chip is low, and high-frequency signals are easily introduced, so that the EMC exceeds the standard.
A frequency converter IGBT drive control method comprises the following steps: the first processor judges whether to generate a trigger level signal according to the working state of the frequency converter; if the trigger level signal is generated, the first processor receives a feedback signal output by the driving circuit and judges whether an output pulse exists in the feedback signal; if the feedback signal has output pulse and the current feedback signal is the same as the level state of the trigger level signal, the first processor outputs a driving abnormal level signal to the second processor; and if the feedback signal has output pulses and the current feedback signal is opposite to the level state of the trigger level signal, the first processor outputs a driving normal level signal to the second processor.
In order to ensure the normal working logic in the standby state, if the first processor judges that a trigger level signal is not generated according to the working state of the frequency converter, the first processor outputs a system holding level signal to the second processor; wherein the system holding level signal is the same as the level state of the driving abnormal level signal.
Preferably, the driving abnormal level signal is a high level signal, the driving normal level signal is a low level signal, and the system holding level signal is a high level signal.
As another alternative, the system may be adapted to different processors, the abnormal driving level signal is a low level signal, the normal driving level signal is a high level signal, and the system holding level signal is a low level signal.
In order to improve the processing speed and the processing capacity of the system, the method further comprises the following steps: configuring a first zone bit, a second zone bit, a third zone bit and a fourth zone bit in the first processor; in an initial state, the first zone bit, the second zone bit, the third zone bit and the fourth zone bit are configured to be 0; if the first processor judges that the trigger level signal is not generated according to the working state of the frequency converter, the first flag bit and the second flag bit are configured to be 0; if the first processor judges to generate the trigger level signal according to the working state of the frequency converter and receives a feedback signal output by a driving circuit, configuring the first flag bit and the second flag bit into 1; configuring the third flag bit to follow the trigger level signal if the first processor determines that an output pulse exists in the feedback signal; configuring the third flag bit to 1 if the trigger level signal is generated; judging whether the first zone bit, the second zone bit and the third zone bit are all configured to be 1; if the first flag bit, the second flag bit and the third flag bit are all configured to be 1, the fourth flag bit is configured to be 1, and the first processor outputs a driving abnormal level signal to the second processor; if the first flag bit, the second flag bit and the third flag bit are not all configured to be 1, the fourth flag bit is configured to be 0, and if the first flag bit and the second flag bit are all configured to be 0, the first processor outputs a system maintenance level signal to the second processor; and if the first flag bit and the second flag bit are both configured to be 1, the first processor outputs a driving normal level signal to the second processor.
Preferably, the first processor is a CPLD controller.
Another aspect of the present invention provides a frequency converter IGBT drive control apparatus, including: the trigger level signal generation module is used for judging whether to generate a trigger level signal according to the working state of the frequency converter; the first judging module is used for receiving a feedback signal output by a driving circuit and judging whether an output pulse exists in the feedback signal or not in the state of generating the trigger level signal; a second determining module, configured to determine whether a level state of a current feedback signal is the same as a level state of the trigger level signal when the output pulse exists in the feedback signal; the signal output module is used for outputting a driving abnormal level signal to an external processor when the second judging module judges that the level states of the current feedback signal and the trigger level signal are the same; and the second judging module is used for configuring and outputting a driving normal level signal to an external processor when judging that the level states of the current feedback signal and the trigger level signal are opposite.
Further, the signal output module is further configured to output a system hold level signal to an external processor in a state where the trigger level signal is not generated; wherein the system holding level signal is the same as the level state of the driving abnormal level signal.
Preferably, the driving abnormal level signal is a high level signal, the driving normal level signal is a low level signal, and the system holding level signal is a high level signal.
As another alternative, the driving abnormal level signal is a low level signal, the driving normal level signal is a high level signal, and the system holding level signal is a low level signal.
Compared with the prior art, the invention has the advantages and positive effects that:
by generating and outputting the trigger level signal according to the working state of the frequency converter, outputting the pulse in the feedback signal of the driving circuit and sampling and monitoring the level states of the current feedback signal and the trigger level signal, the protection effect on the IGBT inversion unit can be achieved on the premise of not arranging an external crystal oscillator.
Other features and advantages of the present invention will become more apparent from the following detailed description of the invention when taken in conjunction with the accompanying drawings.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a flowchart of a first embodiment of a driving control method for an IGBT of a frequency converter disclosed in the present invention;
FIG. 2 is a flowchart illustrating a second embodiment of a driving control method for an IGBT of a frequency converter according to the present invention;
FIG. 3 is a flowchart illustrating a third exemplary embodiment of a method for driving and controlling an IGBT of a frequency converter according to the present invention;
FIG. 4 is a system architecture diagram of a frequency converter IGBT drive system;
fig. 5 is a block diagram schematically illustrating the structure of the inverter IGBT drive control device disclosed in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings and examples.
The terms "first," "second," "third," and the like in the description and in the claims, and in the drawings, are used for distinguishing between different objects and not necessarily for describing a particular sequential or chronological order. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference throughout this specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. One skilled in the art will appreciate that the embodiments described herein can be combined with other embodiments.
In order to achieve the functions of early warning and protection and avoid introducing an external crystal oscillator, so that the system can be matched with driving circuits of various models, a newly designed frequency converter IGBT driving control method is shown in figure 1. First, referring to fig. 4, a basic hardware architecture of a frequency converter control system is described, and in a frequency converter (a variable frequency speed control system), a PWM signal generated by a DSP is output to an IGBT inverter unit to control an on/off state thereof and further control an operation state of a load. The PWM signals generated by the DSP may be transmitted in a serial manner or in a parallel manner. Optical fibers are preferably used as transmission media to meet the requirement of long-distance signal transmission of the high-power frequency converter. The normal work and the protection of the IGBT inversion unit are realized by a driving circuit. In this embodiment, the driving circuit of the IGBT inverter unit may be a driving circuit integrated chip manufactured and sold by a plurality of companies, and the type of the driving circuit integrated chip includes, but is not limited to, a single-channel plug-and-play driver 1SP0335\1SP 0635 manufactured and sold by Power Integrations. The drive circuit and the first processor are in bidirectional communication to upload the working state of the IGBT inversion unit. In view of the problem of mismatch between the potential signal path expansion requirements of the system and the limited output ports of the DSP, in the present invention the first processor is preferably implemented by a CPLD controller. Facing to the loaded IGBT inverter unit circuit, the CPLD controller has higher signal transmission speed with more stable performance and can flexibly realize multiple functions. The transmission medium of the CPLD controller also preferably adopts optical fiber to meet the requirement of long-distance signal transmission of the high-power frequency converter.
Under the condition of not configuring an external crystal oscillator, the working state of the IGBT inversion unit is automatically monitored by the following control method. Specifically, the method comprises the following steps:
and S1, the first processor judges whether to generate a trigger level signal according to the working state of the frequency converter. When the frequency converter is in a working state, the first processor generates a trigger level signal so as to ensure the normal work of the whole frequency converter system. When the frequency converter is in a standby state, the first processor interrupts to generate a trigger level signal. Generally, the trigger level signal is preferably set to a high level signal.
And S2, if the frequency converter is in a normal working state, a trigger level signal is generated, and the first processor starts to receive a feedback signal output by the IGBT inverter unit driving circuit. Specifically, the first processor determines whether an output pulse is present in the feedback signal. When it is further described that the output pulse includes at least one falling edge of the signal, that is, when the feedback signal includes a complete combination of a high level signal, a falling edge, and a low level signal, the first processor determines that the output pulse exists in the feedback signal, and the communication between the first processor and the driving circuit is normal.
S31, if there is an output pulse in the feedback signal, the first processor further determines whether the current feedback signal is in the same level state as the trigger level signal. If the current feedback signal is in the same level state as the trigger level signal, the switching behavior of the IGBT inversion unit controlled by the driving circuit is abnormal, and the first processor outputs a driving abnormal level signal to the second processor.
And S32, if the feedback signal has output pulse, the first processor further judges that the current feedback signal is opposite to the level state of the trigger level signal, which indicates that the switching behavior of the IGBT inverter unit controlled by the driving circuit is normal, and the first processor outputs a driving normal level signal to the second processor.
The second processor may be an upper computer of the CPLD controller, or may be another integrated chip having data processing capability and independent multiple I/O interfaces, and the model of the second processor is not further limited herein.
The trigger level signal is generated and output according to the working state of the frequency converter, the output pulse in the feedback signal of the driving circuit is output, and the sampling and monitoring of the current feedback signal and the level state of the trigger level signal can play a role in protecting the IGBT inversion unit on the premise of not setting an external crystal oscillator.
As shown in fig. 2, when the inverter is in standby, in step S22, the first processor determines not to generate the trigger level signal according to the operating state of the inverter, and the first processor further outputs the system holding level signal to the second processor. The system maintains the level signal in the same level state as the driving abnormal level signal.
In the present invention, it is preferable to design the abnormal level driving signal as a high level signal, the normal level driving signal as a low level signal, and the system holding level signal as a high level signal.
As another alternative, it may also be designed that the abnormal level signal is driven to be a low level signal, the normal level signal is driven to be a high level signal, and the system holding level signal is a low level signal.
Taking the example that the driving abnormal level signal is a high level signal, the driving normal level signal is a low level signal, and the system holding level signal is a high level signal, a specific control method of the system using the CPLD controller as the first processor will be described with reference to fig. 3.
S10, the first flag, the second flag, the third flag, and the fourth flag are configured in the first processor. In the initial state, the first flag bit, the second flag bit, the third flag bit and the fourth flag bit are all configured as 0 by default.
And S11, if the first processor judges that no trigger level signal is generated according to the working state of the frequency converter, keeping the configuration of the first flag bit and the second flag bit as 0 so as to provide identification for the next judgment.
And S12, if the first processor judges and generates a trigger level signal according to the working state of the frequency converter, and simultaneously the first processor receives a feedback signal output by the driving circuit, configuring the first flag bit and the second flag bit as 1 so as to provide identification for the next judgment.
S13, if the first processor determines that there is an output pulse in the feedback signal, the third flag is configured to follow the trigger level signal. That is to say. And if the trigger level signal is generated according to the working state of the frequency converter in the current state, configuring the third zone bit to be 1, and if the trigger level signal is not generated according to the working state of the frequency converter in the current state, keeping the third zone bit to be 0.
S14, further determining which output signal to generate according to the first flag, the second flag, and the third flag. Specifically, it is determined whether the first flag bit, the second flag bit, and the third flag bit are all set to 1.
S15, if the first flag bit, the second flag bit and the third flag bit are all configured to be 1, the fourth flag bit is configured to be 1, and the first processor outputs a driving abnormal level signal to the second processor. Meanwhile, the external processor can also obtain the working state of the current system by directly calling the fourth zone bit, namely early warning or intervention.
S16, if the first flag bit, the second flag bit and the third flag bit are not all configured to be 1, keeping the fourth flag bit configured to be 0.
S17, if the first flag bit and the second flag bit are both configured to be 0, the first processor outputs a system holding level signal to the second processor; s18, if the first flag bit and the second flag bit are both configured as 1, the first processor outputs a drive normal level signal to the second processor.
Through the preferable data processing mode, the system can judge which output signal is generated through the first zone bit, the second zone bit and the third zone bit, and whether the current IGBT inversion unit is in a normal working state or not. The external processor can also acquire the working state of the system through the fourth marker bit, and when the fourth marker bit is at position 1, the system is quickly intervened, so that the response speed of the system is quickly improved.
Another aspect of the present invention provides an inverter IGBT driving control apparatus, as shown in fig. 5 at 10, which includes the following modules:
a trigger level signal generation module 10; the trigger level signal generating module 10 is configured to determine whether to generate a trigger level signal according to the working state of the frequency converter: when the frequency converter is in a working state, the trigger level signal generation module 10 is configured to control to output a trigger level signal outwards; the trigger level signal generation module 10 is configured to interrupt the generation of the trigger level signal when the frequency converter is in the standby state. Preferably, the trigger level signal is a high level signal.
A first judgment module 12; the first judging module 12 is configured to receive a feedback signal output by the driving circuit and judge whether an output pulse exists in the feedback signal in a state where the trigger level signal is generated. When the output pulse comprises a falling edge of at least one signal, i.e. the feedback signal comprises a complete combination of a high level signal, a falling edge and a low level signal, the first determining module 12 is configured to determine that the output pulse is present in the feedback signal.
A second determination module 13; the second judging module 13 is configured to judge whether the level states of the current feedback signal and the trigger level signal are the same in a state where an output pulse exists in the feedback signal; if the current feedback signal is the same as the level state of the trigger level signal, the switching behavior of the IGBT inversion unit controlled by the driving circuit is abnormal; if the current feedback signal is opposite to the level state of the trigger level signal, the switching behavior of the IGBT inversion unit controlled by the driving circuit is normal.
A signal output module 14; the signal output module 14 is configured to output a driving abnormal level signal to the external processor when the second determination module 13 determines that the level states of the current feedback signal and the trigger level signal are the same; and is configured to output a driving normal level signal to the external processor when the second determining module 13 determines that the level states of the current feedback signal and the trigger level signal are opposite.
Through the cooperative control of the plurality of modules, the trigger level signal can be generated and output according to the working state of the frequency converter, the pulse is output in the feedback signal of the driving circuit, the current feedback signal and the trigger level state are sampled and monitored, any driving circuit with the feedback pulse or the square wave signal can be matched with the protection control device, an external crystal oscillator is not required to be arranged, the matching degree of the control device is higher, and the use is more flexible.
The signal output module is also used for configuring and outputting a system holding level signal to the external processor under the state that the trigger level signal is not generated; wherein the system maintains the level signal in the same level state as the driving abnormal level signal. So as to realize the normal operation of the system in the standby state.
In this embodiment, it is preferable that the abnormal driving level signal is set to a high level signal, the normal driving level signal is set to a low level signal, and the system holding level signal is set to a high level signal. As another set of alternatives, the abnormal driving level signal may be set to be a low level signal, the normal driving level signal may be set to be a high level signal, and the system holding level signal may be set to be a low level signal.
Embodiments of the present application also provide a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, and the computer program enables a frequency converter to execute part or all of the steps of any one of the methods described in the above method embodiments.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the above-described units or modules is only one type of division of logical functions, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be an electrical or other form.
The units described as the separate components may or may not be physically separate, and the components displayed as the units may or may not be physical units, that is, may be located in one physical space, or may also be distributed on a plurality of network units, and some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions.
Claims (9)
1. A frequency converter IGBT drive control method is characterized by comprising the following steps:
the first processor judges whether to generate a trigger level signal according to the working state of the frequency converter; when the frequency converter is in a working state, the first processor generates a trigger level signal, and when the frequency converter is in a standby state, the first processor interrupts to generate the trigger level signal; wherein the trigger level signal is a high level signal;
if the first processor generates the trigger level signal, the first processor starts to receive a feedback signal output by a driving circuit and judges whether an output pulse exists in the feedback signal or not; if the feedback signal comprises a complete combination of a high level signal, a falling edge and a low level signal, the first processor judges that an output pulse exists in the feedback signal;
if an output pulse exists in the feedback signal output by the driving circuit, the communication between the first processor and the driving circuit is normal;
the first processor further judges whether the level states of the current feedback signal and the trigger level signal are the same;
if the feedback signal has output pulse and the current feedback signal is the same as the level state of the trigger level signal, the first processor outputs a driving abnormal level signal to the second processor;
if the feedback signal has output pulse and the current feedback signal is opposite to the level state of the trigger level signal, the first processor outputs a driving normal level signal to the second processor;
the drive circuit is a single-channel plug-and-play driver 1SP0335 of Power Integrations.
2. The inverter IGBT drive control method according to claim 1, characterized in that:
if the first processor judges that a trigger level signal is not generated according to the working state of the frequency converter, the first processor outputs a system holding level signal to the second processor; wherein the system holding level signal is the same as the level state of the driving abnormal level signal.
3. The inverter IGBT drive control method according to claim 2, characterized in that:
the driving abnormal level signal is a high level signal, the driving normal level signal is a low level signal, and the system maintaining level signal is a high level signal.
4. The inverter IGBT drive control method according to claim 2, characterized in that:
the driving abnormal level signal is a low level signal, the driving normal level signal is a high level signal, and the system maintaining level signal is a low level signal.
5. The inverter IGBT drive control method according to any one of claims 1 to 4,
the first processor is a CPLD controller.
6. A frequency converter IGBT drive control device is characterized by comprising:
the trigger level signal generation module is used for judging whether to generate a trigger level signal according to the working state of the frequency converter; when the frequency converter is in a working state, the first processor generates a trigger level signal; when the frequency converter is in a standby state, the first processor interrupts to generate a trigger level signal; wherein the trigger level signal is a high level signal;
the first judging module is used for receiving a feedback signal output by a driving circuit and judging whether an output pulse exists in the feedback signal or not in the state of generating the trigger level signal; if the feedback signal comprises a complete combination of a high level signal, a falling edge and a low level signal, the first processor judges that an output pulse exists in the feedback signal;
a second determining module, configured to determine whether a level state of a current feedback signal is the same as a level state of the trigger level signal when the output pulse exists in the feedback signal; and
the signal output module is configured to output a driving abnormal level signal to an external processor when the second judging module judges that the level states of the current feedback signal and the trigger level signal are the same; and is used for configuring and outputting a driving normal level signal to an external processor when the second judging module judges that the level states of the current feedback signal and the trigger level signal are opposite;
the drive circuit is a single-channel plug-and-play driver 1SP0335 of Power Integrations.
7. The inverter IGBT drive control device according to claim 6,
the signal output module is also used for outputting a system holding level signal to an external processor under the condition that the trigger level signal is not generated; wherein the system holding level signal is the same as the level state of the driving abnormal level signal.
8. The inverter IGBT drive control device according to claim 7,
the driving abnormal level signal is a high level signal, the driving normal level signal is a low level signal, and the system maintaining level signal is a high level signal.
9. The inverter IGBT drive control device according to claim 7,
the driving abnormal level signal is a low level signal, the driving normal level signal is a high level signal, and the system maintaining level signal is a low level signal.
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| CN202010280301.XA CN111245206B (en) | 2020-04-10 | 2020-04-10 | Frequency converter IGBT drive control method and control device |
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| PCT/CN2020/128972 WO2021203699A1 (en) | 2020-04-10 | 2020-11-16 | Frequency converter igbt drive control method and control apparatus |
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| JP2017157935A (en) * | 2016-02-29 | 2017-09-07 | 株式会社東芝 | Switch driving device, and failure determination method by switch driving device |
| CN111245206B (en) * | 2020-04-10 | 2021-05-28 | 青岛中加特电气股份有限公司 | Frequency converter IGBT drive control method and control device |
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2020
- 2020-04-10 CN CN202010280301.XA patent/CN111245206B/en active Active
- 2020-11-16 WO PCT/CN2020/128972 patent/WO2021203699A1/en active Application Filing
- 2020-11-16 AU AU2020441878A patent/AU2020441878B2/en active Active
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| CN206294107U (en) * | 2016-12-09 | 2017-06-30 | 上海大郡动力控制技术有限公司 | Motor controller of new energy automobile pwm signal feeds back and supervisory circuit |
| CN108233804A (en) * | 2018-01-25 | 2018-06-29 | 江西精骏电控技术有限公司 | A kind of PWM redundancy detections system |
| CN109256751A (en) * | 2018-11-14 | 2019-01-22 | 苏州绿控新能源科技有限公司 | A kind of electric machine controller drive waveforms monitoring method |
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| Publication number | Publication date |
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| CN111245206A (en) | 2020-06-05 |
| WO2021203699A1 (en) | 2021-10-14 |
| AU2020441878B2 (en) | 2023-07-06 |
| AU2020441878A1 (en) | 2022-09-22 |
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