CN111223430B - Driving circuit and driving method thereof - Google Patents
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- CN111223430B CN111223430B CN201911040917.3A CN201911040917A CN111223430B CN 111223430 B CN111223430 B CN 111223430B CN 201911040917 A CN201911040917 A CN 201911040917A CN 111223430 B CN111223430 B CN 111223430B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
A driving circuit and a driving method thereof. The driving circuit includes a detection circuit and a transmission circuit. The detection circuit is used for generating a detection signal to the transmission channel and detecting the channel length of the transmission channel according to the detection time of the detection signal, and the detection circuit generates a data adjusting signal according to the detection time. The transmitting circuit is coupled to the detecting circuit. The transmission circuit is used for generating a data signal and adjusting a plurality of set values of the data signal according to a data adjusting signal.
Description
Technical Field
The present invention relates to a display device, and more particularly, to a driving circuit and a driving method thereof.
Background
With the progress of electronic technology, consumer electronics have become a necessary tool in people's life. There is also a trend to provide high quality display devices on consumer electronics products in order to provide good human-machine interfaces.
In the conventional display technology, the driving circuit of the Timing Controller (Timing Controller) usually transmits the data signals to the corresponding source driving circuits through a plurality of transmission channels. However, in the prior art, since the channel lengths of the transmission channels between the driving circuits of the timing controller and the source driving circuits are different, a designer needs to additionally adjust a plurality of setting values in the data signal according to the channel lengths of different transmission channels. In this case, the conventional technique is time-consuming in operation and is prone to additional labor cost.
Disclosure of Invention
The invention provides a driving circuit and a driving method thereof, which can enable the driving circuit to detect the channel length of a corresponding transmission channel through a detection mechanism of a detection circuit, so that a transmission circuit can adjust a plurality of set values of a data signal according to the detection result of the detection circuit, thereby improving the overall working efficiency and reducing the labor cost.
The drive circuit of the present invention includes a detection circuit and a transmission circuit. The detection circuit is used for generating a detection signal to the transmission channel and detecting the channel length of the transmission channel according to the detection time of the detection signal, and the detection circuit generates a data adjusting signal according to the detection time. The transmission circuit is coupled to the detection circuit and used for generating a data signal and adjusting a plurality of set values of the data signal according to the data adjusting signal.
A driving method of a driving circuit according to the present invention includes: the detection circuit generates a detection signal to the transmission channel, detects the channel length of the transmission channel according to the detection time of the detection signal, and generates a data adjustment signal according to the detection time. The transmission circuit generates a data signal and adjusts a plurality of setting values of the data signal according to a data adjusting signal.
Based on the above, the driving circuit of the present invention can obtain the channel length of the corresponding transmission channel through the detection mechanism of the detection circuit when detecting the time interval, and provide the data adjustment signal to the transmission circuit according to the channel length (or the detection time of the detection signal). Therefore, the transmission circuit can adjust a plurality of set values of the data signal according to the data adjusting signal during the normal display time. Therefore, no matter what the channel length of the transmission channel between the driving circuit and the source electrode driving circuit is, the driving circuit can adjust a plurality of set values in the data signal according to the channel lengths of different transmission channels without extra technicians, so that the overall working efficiency is improved, and the labor cost is reduced.
The invention is described in detail below with reference to the drawings and specific examples, but the invention is not limited thereto.
Drawings
Fig. 1 is a schematic diagram illustrating a driving circuit according to an embodiment of the invention.
FIG. 2 is a schematic diagram of the detection circuit and the source driving circuit of FIG. 1 according to the embodiment of the invention.
FIG. 3 is a diagram illustrating a lookup table according to an embodiment of the invention.
Fig. 4 is a timing diagram illustrating a driving circuit according to an embodiment of the invention.
FIG. 5A is a diagram illustrating a relationship between the detection time and a setting value of the data signal in the lookup table shown in FIG. 3 according to the invention.
FIG. 5B is a diagram illustrating the relationship between the detection time and the channel length in the lookup table of FIG. 3 according to the present invention.
Fig. 6 is a flowchart of a driving method of a driving circuit according to an embodiment of the invention.
Wherein, the reference numbers:
100. 100_1 to 100_ N: driving circuit
110: detection circuit
120: transmission circuit
130: counter with a memory
140: pulse generating circuit
150: lookup table
200. 200_1 to 200_ N: source electrode driving circuit
210: receiving circuit
A. B, C: node point
CH. CH 1-CHN: transmission channel
CS1, CS2, CS 3: control signal
And (2) DS: detecting the signal
DAS: data adjustment signal
EQ: equalizing coefficient
GND: reference ground
ISS: current source
And (3) PEMP: pre-emphasis coefficient
REF _ CLK: reference clock pulse signal
RF: resistance (RC)
SW1, SW2, SW 3: change-over switch
SW: voltage amplitude potential
S610 and S620: step (ii) of
T1: initial time interval
T2: detecting time intervals
T3: normal display time interval
TX: data signal
TDS, TDS1, TDS 2: time of detection
V11, V12, V21, V22: voltage potential
Detailed Description
The invention will be described in detail with reference to the following drawings, which are provided for illustration purposes and the like:
the term "coupled" as used throughout this specification, including the claims, may refer to any means for directly or indirectly connecting. For example, if a first device couples (or connects) to a second device, it should be construed that the first device may be directly connected to the second device or the first device may be indirectly connected to the second device through some other device or some connection means. Further, wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts. Elements/components/steps in different embodiments using the same reference numerals or using the same terms may be referred to one another in relation to the description.
Fig. 1 is a schematic diagram illustrating a driving circuit 100 according to an embodiment of the invention. Referring to fig. 1, in the present embodiment, the driving circuit 100 includes a detecting circuit 110, a transmitting circuit 120, and a switch SW 1. Wherein. The driving circuit 100 may be coupled to the transmission channel CH, and the transmission channel CH may be coupled to the source driving circuit 200.
In the driving circuit 100 shown in fig. 1, the detecting circuit 110 is coupled to the transmitting circuit 120. The switch SW1 is coupled between the detection circuit 110, the transmission circuit 120 and the transmission channel CH. The switch SW1 can be switched between the node a and the node B according to the timing state of the control signal CS1, so as to turn on the data transmission path between the transmitting circuit 120 and the transmission channel CH or the data transmission path between the detecting circuit 110 and the transmission channel CH.
It should be noted that the number of the driving circuits, the number of the transmission channels, and the number of the source driving circuits are not limited in the present embodiment. The number of the driving circuits, the number of the transmission channels and the number of the source driving circuits can be determined by one skilled in the art according to design requirements. For example, under some design requirements, the present embodiment may further include a plurality of driving circuits 100_1 to 100_ N, a plurality of transmission channels CH1 to CHN, and a plurality of source driving circuits 200_1 to 200_ N. The coupling and operation relationships among the driving circuits 100_1 to 100_ N, the transmission channels CH1 to CHN, and the source driving circuits 200_1 to 200_ N are the same as those of the driving circuit 100, the transmission channels CH, and the source driving circuit 200.
In addition, under other design requirements, the present embodiment can also be coupled to a plurality of transmission channels CH, CH 1-CHN through one driving circuit 100, and the transmission channels CH, CH 1-CHN are further coupled to a plurality of source driving circuits 200, 200_ 1-200 _ N, respectively, so as to achieve a circuit architecture of one driving circuit 100 for a plurality of source driving circuits 200, 200_ 1-200 _ N, where N is a positive integer. In the embodiment of fig. 1, the driving circuits 100 and 100_1 to 100_ N may be configured in a clock Controller (Timing Controller) for performing related operations therein.
Regarding the operation of the driving circuit 100 of the present embodiment, specifically, when the driving circuit 100 operates in the detection time interval, the switch SW1 can be switched to the node B according to the control signal CS1 to turn on the data transmission path between the detection circuit 110 and the transmission channel CH. Meanwhile, the detection circuit 110 can provide the detection signal DS to the source driving circuit 200 through the transmission channel CH, and obtain the channel length of the transmission channel CH according to the detection time of the detection signal DS. Then, the detection circuit 110 can provide the data-adjusting signal DAS to the transmission circuit 120 according to the detection time of the detection signal DS (or the channel length of the transmission channel CH).
On the other hand, when the driving circuit 100 operates in the normal display interval, the switch SW1 can be switched to the node A according to the control signal CS1 to turn on the data transmission path between the transmitting circuit 120 and the transmission channel CH. At the same time, the transmitting circuit 120 can adjust a plurality of setting values of the data signal TX according to the data adjusting signal DAS. Then, the transmitting circuit 120 can provide the adjusted data signal TX to the corresponding source driving circuit 200 through the transmission channel CH.
The driving circuits 100_1 to 100_ N, the transmission channels CH1 to CHN, and the source driving circuits 200_1 to 200_ N shown in fig. 1 can be analogized with reference to the related descriptions of the driving circuit 100, the transmission channels CH, and the source driving circuit 200, and thus are not repeated.
As can be seen from the above description of the embodiment of fig. 1, the driving circuit 100 can obtain the channel length of the corresponding transmission channel CH by the detection mechanism of the detection circuit 110 during the detection time interval, and provide the data adjusting signal DAS to the transmission circuit 120 according to the channel length (or the detection time of the detection signal DS). Therefore, the transmitting circuit 120 can adjust a plurality of setting values of the data signal TX to be transmitted to the source driving circuit 200 according to the data adjusting signal DAS at the normal display time. That is to say, no matter what the channel length of the transmission channel between the driving circuit and the source driving circuit is, the driving circuit of the embodiment can adjust the plurality of setting values of the data signal according to the result detected by the detection circuit, and does not need to adjust the plurality of setting values of the data signal according to the channel lengths of different transmission channels by an extra technician, thereby improving the overall working efficiency and reducing the labor cost.
FIG. 2 is a schematic diagram of the detecting circuit 110 and the source driving circuit 200 according to the embodiment of the invention in FIG. 1. Referring to fig. 2, the detection circuit 110 may include a counter 130 and a pulse generation circuit 140. The counter 130 is coupled between the transmitting circuit 120 and the pulse generating circuit 140. The pulse generating circuit 140 is coupled between the counter 130 and the node B. The pulse generating circuit 140 may include a resistor RF, a switch SW3, and a current source ISS. The resistor RF is coupled between the node B and the ground reference GND, the switch SW3 is coupled between the node B and the current source ISS, and the current source ISS is coupled between the switch SW3 and the ground reference GND. It is noted that, in some design requirements, the pulse generating circuit 140 may be a pulse generating circuit for generating pulses, or other pulse generating circuits known to those skilled in the art.
In addition, referring to fig. 2 and fig. 3, fig. 3 is a schematic diagram illustrating the lookup table 150 according to an embodiment of the invention. In the present embodiment, the look-up table 150 may be coupled to the counter 130, wherein the look-up table 150 may be used to record a relationship between the channel length of the transmission channel CH (or the detection time of the detection signal DS) and a plurality of setting values of the data signal TX (e.g., the voltage amplitude Level (Swing Level), the Pre-emphasis (Pre-emphasis) coefficient, and the equalization (equalization) coefficient). In the embodiment, the lookup table 150 may be built in the driving circuit 100, or under other design requirements, the lookup table 150 may be externally connected to the driving circuit 100 and coupled to the counter 130.
Specifically, the pulse generating circuit 140 is configured to generate the detection signal DS according to the timing state of the control signal CS 3. For example, when the switch SW3 is turned on according to the control signal CS3, the pulse generating circuit 140 can generate the detection signal DS according to the current generated by the current source ISS and the resistor RF. Then, the counter 130 may count a detection time of the detection signal DS in the detection time interval according to the reference clock pulse signal REF _ CLK. The detecting circuit 110 can search a plurality of setting values corresponding to the data signal TX from the look-up table 150 according to the counting result (i.e. the detecting time of the detecting signal DS) of the counter 130 to correspondingly generate the data adjustment signal DAS.
On the other hand, in the source driving circuit 200 shown in fig. 2, the source driving circuit 200 may include a receiving circuit 210 and a switching switch SW 2. The receiving circuit 210 is coupled to the transmission channel CH through a node C. The switch SW2 is coupled between the node C and the ground reference GND. The source driving circuit 200 can determine to turn on the data transmission path between the transmission channel CH and the receiving circuit 210 or the data transmission path between the transmission channel CH and the ground GND according to the timing state of the control signal CS 2.
Fig. 4 is a timing diagram illustrating a driving circuit 100 according to an embodiment of the invention. Referring to fig. 1 to 4, for details of the operation of the driving circuit 100, in detail, when the driving circuit 100 operates in the initial time interval T1, the control signal CS1 may be set to a high voltage level (e.g., the voltage level V11), so that the switch SW1 may switch to the node a according to the control signal CS1 and turn on the data transmission path between the transmission circuit 120 and the transmission channel CH. In addition, the control signal CS2 can be set to a high voltage level (e.g., the voltage level V21) such that the switch SW2 can be turned off according to the control signal CS 2. In other words, in the initial time interval T1, the transmitting circuit 120, the transmitting channel CH, and the receiving circuit 210 of the source driving circuit 200 can form the first data transmission path.
Further, in the initial time interval T1, the transmitting circuit 120 can provide the data signal TX to the receiving circuit 210 through the first data transmission path, so that both the driving circuit 100 and the source driving circuit 200 can confirm that the first data transmission path is formed. The data signal TX of the present embodiment may be a differential signal, and when the first data transmission path is formed, a positive polarity signal and a negative polarity signal of the differential signal may be set to a high voltage potential.
It should be noted that, when the driving circuit 100 switches from the initial time interval T1 to the detection time interval T2, the control signal CS2 may be set to a low voltage level (e.g., the voltage level V22) first, so that the switch SW2 is turned on according to the control signal CS 2. Then, when the driving circuit 100 operates in the detection time interval T2, the control signal CS1 can be set to the low voltage level (e.g., the voltage level V12) again, so that the switch SW1 can switch to the node B according to the control signal CS1 and turn on the data transmission path between the detection circuit 110 and the transmission channel CH. At the same time, the switch SW3 can be turned on according to the control signal CS3 set to the enabled state, so that the driving circuit 100 can start the detection mechanism of the detection circuit 110. In other words, in the detection time interval T2, the detection circuit 110, the transmission channel CH, and the ground reference GND of the source driving circuit 200 may form the second data transmission path.
In detail, in the detection time interval T2, the detection circuit 110 may provide the generated detection signal DS to the reference ground GND of the source driving circuit 200 through the second data transmission path. It should be noted that, in the present embodiment, the time when the detection circuit 110 transmits the detection signal DS to the ground reference GND of the source driving circuit 200 is defined as the detection time TDS 1. Then, after the ground GND of the source driving circuit 200 receives the detection signal DS, the source driving circuit 200 can further transmit or reflect the reversed detection signal DS to the detection circuit 110 according to the effect of the characteristic impedance (characteristic impedance). The time for transmitting or reflecting the reversed detection signal DS to the detection circuit 110 can be defined as the detection time TDS 2.
In other words, the longer the channel length of the transmission channel CH between the driving circuit 100 and the source driving circuit 200 is, the longer the detection time TDS of the whole detecting circuit 110 (i.e. the sum of the detection times TDS1 and TDS 2) is, and the shorter the channel length of the transmission channel CH between the driving circuit 100 and the source driving circuit 200 is, the shorter the detection time TDS of the whole detecting circuit 110 is. That is, the channel length of the transmission channel CH is positively correlated to the detection time TDS.
Referring to fig. 5A, fig. 5A is a schematic diagram illustrating a relationship between the detection time TDS and the setting value of the data signal TX in the lookup table 150 shown in fig. 3 according to the invention. In this embodiment, the set values of the data signal TX may be a voltage amplitude potential SW, a pre-emphasis coefficient PEMP, and an equalization coefficient EQ of the data signal TX, respectively. The voltage amplitude potential SW can be used for adjusting a dc voltage potential of the data signal TX; the pre-emphasis coefficient PEMP may be used to adjust the switching speed (or the amplitude of the rising edge and the falling edge) of the data signal TX; the equalization coefficient EQ may be used to equalize the data signal TX to optimize the data signal TX.
Referring to fig. 1 to fig. 5A again, when the driving circuit 100 operates in the detection time interval T2, the counter 130 may start to count the detection time TDS of the detection signal DS. After the counting operation of the counter 130 is finished, the detection circuit 110 may search a plurality of setting values (i.e., the voltage amplitude potential SW, the pre-emphasis coefficient PEMP, and the equalization coefficient EQ) corresponding to the data signal TX from the lookup table 150 shown in fig. 5A according to the counting result of the counter 130, so as to correspondingly generate the data adjustment signal DAS according to the setting values.
For example, if the counting result of the counter 130 indicates that the detection time TDS of the detection signal DS is between 5 nanoseconds (ns) and 6ns, the detection circuit 110 can correspondingly generate the data adjusting signal DAS to the transmission circuit 120 according to the detection time TDS and a plurality of setting values (e.g., a voltage amplitude potential SW of 200 millivolts (mV), a pre-emphasis coefficient PEMP of 1.5 decibels (dB), and an equalization coefficient EQ of 3dB) of the data signal TX. It should be noted that, persons skilled in the art can set other values of the data signal TX in the lookup table 150 according to design requirements, and the embodiment is not limited thereto.
In addition, referring to fig. 5B, fig. 5B is a schematic diagram illustrating a relationship between the detection time TDS and the channel length in the lookup table shown in fig. 3 according to the invention. In the embodiment, the detection circuit 110 can further obtain the channel length of the corresponding transmission channel CH from the lookup table 150 shown in fig. 5B according to the counting result (i.e. the detection time TDS of the detection signal DS) of the counter 130. For example, assuming that the counting result of the counter 130 indicates that the detection time TDS of the detection signal DS is 12ns, the detection circuit 110 can obtain the channel length of the corresponding transmission channel CH as 11.8 unit length by looking up the table 150.
Referring back to fig. 1 to 4, in the process of switching the driving circuit 100 from the detection time interval T2 to the normal display time interval T3, the positive polarity signal and the negative polarity signal of the data signal TX (or the differential signal) may be set to the low voltage potential first. Then, when the driving circuit 100 operates in the normal display time interval T3, the control signal CS1 can be set to the high voltage level (e.g., the voltage level V11) again, so that the switch SW1 can switch to the node a again according to the control signal CS1 and turn on the data transmission path between the transmitting circuit 120 and the transmission channel CH. In addition, the control signal CS2 can be set to the high voltage level again (e.g., the voltage level V21), so that the switch SW2 can be turned off according to the control signal CS 2. In other words, in the normal display time interval T3, the transmitting circuit 120, the transmitting channel CH, and the receiving circuit 210 of the source driving circuit 200 can form the first data transmission path again.
Specifically, in the normal display time interval T3, the transmitting circuit 120 can adjust and set a plurality of setting values of the data signal TX according to the data adjusting signal DAS provided by the detecting circuit 110. For example, also assuming that the detection time interval T2 is, the counting result of the counter 130 indicates that the detection time TDS of the detection signal DS is between 5ns and 6 ns. In this case, in the normal display time interval T3, the transmitting circuit 120 can adjust the voltage amplitude potential SW of the data signal TX to 200mV, the pre-emphasis coefficient PEMP to 1.5dB, and the equalization coefficient EQ to 3dB according to the data adjustment signal DAS. Thus, the transmitting circuit 120 can transmit the adjusted data signal TX to the corresponding source driving circuit 200 through the first data transmission path.
In other words, no matter what the channel length of the transmission channel CH between the driving circuit 100 and the source driving circuit 200 is, the driving circuit 100 of the embodiment can adjust a plurality of setting values of the data signal TX according to the result detected by the detecting circuit 110, and it is not necessary to adjust a plurality of setting values of the data signal TX according to the channel lengths of different transmission channels CH by an additional technician, thereby improving the overall working efficiency and reducing the labor cost.
Fig. 6 is a flowchart of a driving method of the driving circuit 100 according to an embodiment of the invention. Referring to fig. 1 and fig. 6, in step S610, the driving circuit may generate a detection signal to the transmission channel by the detection circuit, detect a channel length of the transmission channel according to a detection time of the detection signal, and generate a data adjustment signal by the detection circuit according to the detection time. In step S620, the driving circuit may generate the data signal from the transmitting circuit and adjust a plurality of setting values of the data signal according to the data adjusting signal.
The details of the steps are elaborated in the foregoing examples and embodiments, and are not repeated herein.
In summary, the driving circuit of the present invention can obtain the channel length of the corresponding transmission channel through the detection mechanism of the detection circuit when detecting the time interval, and provide the data adjustment signal to the transmission circuit according to the channel length (or the detection time of the detection signal). Therefore, the transmission circuit can adjust a plurality of set values of the data signal according to the data adjusting signal during the normal display time. Therefore, no matter what the channel length of the transmission channel between the driving circuit and the source electrode driving circuit is, the driving circuit can adjust a plurality of set values in the data signal according to the channel lengths of different transmission channels without extra technicians, so that the overall working efficiency is improved, and the labor cost is reduced.
The present invention is capable of other embodiments, and various changes and modifications can be made by one skilled in the art without departing from the spirit and scope of the invention.
Claims (12)
1. A driver circuit, comprising:
the detection circuit is used for generating a detection signal to a transmission channel and detecting the channel length of the transmission channel according to detection time of the detection signal, and the detection circuit generates a data adjusting signal according to the detection time; and
a transmission circuit, coupled to the detection circuit, for generating a data signal and adjusting a plurality of setting values of the data signal according to the data adjustment signal;
the driving circuit further includes:
the first switch is coupled among the transmission circuit, the detection circuit and the transmission channel and conducts a data transmission path between the transmission circuit and the transmission channel or a data transmission path between the detection circuit and the transmission channel according to a first control signal.
2. The driving circuit of claim 1, further comprising:
the look-up table records the relation between the detection time and the set values of the data signal, and the detection circuit generates the data adjusting signal through the look-up table according to the detection signal.
3. The driving circuit of claim 1, wherein when the first switch turns on a data transmission path between the transmission circuit and the transmission channel according to the first control signal, the transmission circuit provides the data signal to a source driving circuit through the transmission channel, and,
when the first switch switches on the data transmission path between the detection circuit and the transmission channel according to the first control signal, the detection circuit provides the detection signal to the source electrode driving circuit through the transmission channel.
4. The driving circuit of claim 3, wherein the source driving circuit comprises:
a receiving circuit for receiving the data signal; and
the second switch is coupled among the transmission channel, the receiving circuit and a reference grounding terminal and conducts a data transmission path between the transmission channel and the receiving circuit or a data transmission path between the transmission channel and the reference grounding terminal according to a second control signal.
5. The driving circuit as claimed in claim 4, wherein when the driving circuit operates in a detection time interval, the first switch turns on a data transmission path between the detection circuit and the transmission channel according to the first control signal, and the second switch turns on a data transmission path between the transmission channel and the ground reference according to the second control signal, the detection circuit provides the detection signal to the ground reference through the transmission channel to detect a channel length of the transmission channel, and,
when the driving circuit operates in a normal display time interval, the first switch switches on a data transmission path between the transmission circuit and the transmission channel according to the first control signal, the second switch switches on a data transmission path between the transmission channel and the receiving circuit according to the second control signal, and the transmission circuit provides the data signal to the receiving circuit through the transmission channel.
6. The driving circuit of claim 1, wherein the detection circuit comprises:
a pulse generating circuit for generating the detecting signal according to a first control signal; and
a counter coupled between the pulse generating circuit and the transmitting circuit for counting the detecting time of the detecting signal,
the detection circuit generates the data adjusting signal according to a counting result of the counter.
7. A driving method of a driving circuit, comprising:
generating a detection signal to a transmission channel by a detection circuit, detecting the channel length of the transmission channel according to a detection time of the detection signal, and generating a data adjusting signal by the detection circuit according to the detection time; and
generating a data signal by a transmission circuit, and adjusting a plurality of set values of the data signal according to the data adjusting signal;
further comprising:
a first switch is used for conducting a data transmission path between the transmission circuit and the transmission channel or a data transmission path between the detection circuit and the transmission channel according to a first control signal.
8. The driving method as claimed in claim 7, further comprising:
recording the relation between the detection time and the set values of the data signal by a lookup table; and
the detection circuit generates the data adjustment signal through the lookup table according to the detection signal.
9. The driving method as claimed in claim 7, wherein the step of turning on the data transmission path between the transmission circuit and the transmission channel or the data transmission path between the detection circuit and the transmission channel by the first switch according to the first control signal comprises:
when the first switch switches on a data transmission path between the transmission circuit and the transmission channel according to the first control signal, the transmission circuit provides the data signal to a source electrode driving circuit through the transmission channel; and
when the first switch switches on the data transmission path between the detection circuit and the transmission channel according to the first control signal, the detection circuit provides the detection signal to the source electrode driving circuit through the transmission channel.
10. The driving method as claimed in claim 9, wherein the step of providing the data signal from the transmitting circuit to the source driving circuit via the transmission channel comprises:
receiving the data signal by a receiving circuit; and
a second switch is used for conducting a data transmission path between the transmission channel and the receiving circuit or a data transmission path between the transmission channel and a reference grounding terminal according to a second control signal.
11. The driving method as claimed in claim 10, wherein the step of turning on the data transmission path between the transmission channel and the receiving circuit or the data transmission path between the transmission channel and the ground reference by the second switch according to the second control signal comprises:
when the driving circuit operates in a detection time interval, the first switch switches on a data transmission path between the detection circuit and the transmission channel according to the first control signal, and the second switch switches on a data transmission path between the transmission channel and the reference ground terminal according to the second control signal;
providing the detection signal to the reference ground terminal through the transmission channel by the detection circuit to detect the channel length of the transmission channel;
when the driving circuit operates in a normal display time interval, the first switch switches on the data transmission path between the transmission circuit and the transmission channel according to the first control signal, and the second switch switches on the data transmission path between the transmission channel and the receiving circuit according to the second control signal; and
the data signal is provided from the transmitting circuit to the receiving circuit via the transmission channel.
12. The driving method as claimed in claim 7, wherein the step of generating the detection signal to the transmission channel by the detection circuit and detecting the channel length of the transmission channel according to the detection time of the detection signal comprises:
generating the detection signal by a pulse generating circuit according to a first control signal;
counting the detection time of the detection signal by a counter; and
the detection circuit generates the data adjusting signal according to a counting result of the counter.
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| Application Number | Priority Date | Filing Date | Title |
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| TW108113483A TWI690918B (en) | 2019-04-17 | 2019-04-17 | Driving circuit and driving method thereof |
| TW108113483 | 2019-04-17 |
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| CN111223430A CN111223430A (en) | 2020-06-02 |
| CN111223430B true CN111223430B (en) | 2022-09-02 |
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| CN114967807B (en) * | 2022-03-28 | 2023-06-06 | 清华大学 | Timing detection circuit and adaptive voltage regulation circuit |
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| JP2008233123A (en) * | 2007-03-16 | 2008-10-02 | Sony Corp | Display device |
| CN101958705A (en) * | 2009-07-13 | 2011-01-26 | 南亚科技股份有限公司 | Signal regulation system and signal regulation method |
| JP5449464B2 (en) * | 2012-06-27 | 2014-03-19 | シャープ株式会社 | Touch panel controller, touch panel device, and electronic information device |
| TWI550573B (en) * | 2013-12-19 | 2016-09-21 | 天鈺科技股份有限公司 | Display device and method for transmitting and processing clock embedded data |
| CN105321479B (en) * | 2014-07-21 | 2018-08-24 | 联咏科技股份有限公司 | Source electrode driver, display driver circuit and display device |
| JP6883377B2 (en) * | 2015-03-31 | 2021-06-09 | シナプティクス・ジャパン合同会社 | Display driver, display device and operation method of display driver |
| CN104835472B (en) * | 2015-05-28 | 2018-01-02 | 合肥京东方光电科技有限公司 | For driving driving chip, display device and the drive control method of display panel |
| US20180254004A1 (en) * | 2017-03-06 | 2018-09-06 | Novatek Microelectronics Corp. | Integrated circuit for driving display panel and fan-out compensation method thereof |
| KR102298339B1 (en) * | 2017-06-01 | 2021-09-07 | 엘지디스플레이 주식회사 | OLED display device and optical compensation method thereof |
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| TWI690918B (en) | 2020-04-11 |
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