CN111211794A - Anti-radiation reinforcement general software radio platform - Google Patents
Anti-radiation reinforcement general software radio platform Download PDFInfo
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- CN111211794A CN111211794A CN201911204342.4A CN201911204342A CN111211794A CN 111211794 A CN111211794 A CN 111211794A CN 201911204342 A CN201911204342 A CN 201911204342A CN 111211794 A CN111211794 A CN 111211794A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0028—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at baseband stage
- H04B1/0035—Channel filtering, i.e. selecting a frequency channel within a software radio system
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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Abstract
The invention discloses an anti-radiation reinforcement general software radio platform, which belongs to one software radio development platform. The embedded microprocessor comprises a 2-way Spacewire controller, a 4-way can bus controller and a 2-way 1553B controller. The invention has the characteristics of high performance, flexible structure, tailorable resources, high reliability and radiation resistance, and is widely applied to the fields of communication, electronic countermeasure, navigation and effective load.
Description
Technical Field
The invention relates to a radiation-resistant reinforced general software radio platform, and belongs to the fields of software radio, task payload, communication and navigation.
Background
The software radio is a general programmable radio, integrates control, communication and computing capabilities, has the characteristics of digitalization, programmability, modularization, expandability and openness, and can serve as a general platform for equipment systems. Software radio technology is becoming more and more widely used, and system architectures based on this technology are continually perfecting. At present, software radio technology is widely applied to the fields of communication, electronic countermeasure, navigation and the like. The existing software radio universal platform is often applied to the ground and the near-ground area, and the requirement on the radiation resistance of the whole platform is low. For the software radio technology facing the deep space field, a software radio platform is lacked to meet the requirement of universality. Especially for deep space mission payloads, requirements on size, weight and power consumption are high, it is expected that different functions can be realized by using the same set of hardware, existing software radio technologies are rarely combined with deep space aerospace technologies, and a mature radiation-resistant reinforced general software radio platform does not exist in the market.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the radio platform overcomes the defects of the prior art, combines a software radio technology with a deep space task payload technology, provides a radiation-resistant reinforced general software radio platform, realizes navigation, communication and payload functions, has the characteristics of high performance and high reliability, and meets the application requirements of deep space aerospace.
The technical solution of the invention is as follows:
a radiation-resistant reinforced general software radio platform is applied to the deep space field, has navigation and communication functions and can be used as a payload; the system comprises two programmable radio frequency front ends, two FPGAs, an embedded microprocessor and a FLASH;
when the software radio platform is used for navigation, the programmable radio frequency front end receives a navigation signal in a space, down-converts the navigation signal into a digital baseband signal, and transmits the digital baseband signal to the FPGA, the FPGA performs baseband signal processing to extract effective information and transmits the information to the embedded microprocessor, the embedded microprocessor performs back-end processing on the extracted information to calculate position information, and the FLASH is used for storing specific position information; the two programmable radio frequency front ends are backups of each other, and the two FPGAs are backups of each other and can be used independently to realize two independent navigation functions;
when the software radio platform is used for communication, the programmable radio frequency front end receives a communication signal in the space, down-conversion sampling of the communication signal is converted into a digital baseband signal, the FPGA performs digital baseband signal processing, communication information is extracted and forwarded to the embedded microprocessor, and the embedded microprocessor stores the communication information into the FLASH or sends the communication information out; when the information is sent, the embedded microprocessor sends the information to the FPGA for baseband signal processing, converts the baseband signal into a radio frequency signal of a specific frequency point through the programmable radio frequency front end and sends the radio frequency signal out; the two programmable radio frequency front ends are backups of each other, and the two FPGAs are backups of each other and can be used independently to realize two independent communication functions;
when the software radio platform is used for navigation and communication at the same time, one path of the embedded processor-FPGA-radio frequency front-end channel realizes the navigation function, the other path realizes the communication function, and the FLASH is used for storing application data;
when the software radio platform is used for the effective load, the embedded processor is used as a control center and a software programming center of the effective load to carry out overall control and back-end processing, the FPGA is used as a hardware programming center to carry out baseband digital signal processing, the programmable radio frequency front end is used for generating radio frequency signals of different frequency points, and the FLASH is used for storing corresponding software hardware codes and application data.
2-way Spacewire controllers, 4-way can bus controllers and 2-way 1553B controllers are embedded in the embedded microprocessor, and two pieces of FPGA are connected with the embedded microprocessor and used as programmable resources to be mounted on the bus of the embedded microprocessor; the data paths of the two programmable radio frequency front ends are respectively connected with the two FPGAs, and the control path is connected with the embedded microprocessor through the SPI interface; the FLASH is connected with the embedded microprocessor; all devices are designed and manufactured by adopting an anti-radiation reinforcement process library, and have anti-radiation capability.
The embedded microprocessor is a main control and software development core of the whole software radio development platform, is used for the integral control of the platform and the processing of baseband digital signals, adopts an ARM Cortex A5 architecture, has the lowest dominant frequency of 300MHz, comprises special computation IP hard core peripherals for FFT and Viterbi decoding, and is mounted on a high-performance embedded processor core through an AXI4 on-chip bus.
The two FPGAs are used for digital signal processing, and peripheral equipment is added according to user requirements in a self-defined mode, the FPGAs adopt radiation-resistant reinforced FPGAs, are fully compatible with Xilinx VirtexSx95T type FPGAs, and can be expanded upwards; when in use, the FPGA is mounted on an AXI4 bus of the embedded microprocessor and performs data interaction with the processor.
The two programmable radio frequency front ends are used for receiving and transmitting radio frequency signals, a zero intermediate frequency scheme is adopted, 12-bit ADCs and 12-bit DACs are arranged in the two programmable radio frequency front ends, data interaction is carried out between the two programmable radio frequency front ends and the two FPGAs respectively, the two programmable radio frequency front ends are mounted on the embedded microprocessor through SPI interfaces, and the embedded microprocessor is configured with the programmable radio frequency front ends through SPI.
FLASH is used for nonvolatile storage and is mounted on the embedded microprocessor through the SPI interface.
The embedded microprocessor can be directly debugged and simply downloaded through a JTAG interface, and the program can also be downloaded into FLASH through a matching upper computer; the embedded microprocessor supports linux and ucos embedded operating systems, and the embedded microprocessor configures the two FPGAs.
Each FPGA can be independently used through a JTAG interface, the program of the FPGA is downloaded into FLASH through a matching upper computer, and the embedded microprocessor reads the configured FPGA from the FLASH; each FPGA is provided with a 1553B controller, a CAN controller and a spacewire controller soft core, and the quantity of the 1553B controllers, the CAN controllers and the spacewire controllers CAN be expanded through the FPGA under the condition of requirement.
Each programmable radio frequency front end supports 2 receiving and 2 sending, the frequency point range is 70Mhz-6GHz, the radio frequency bandwidth is 56MHz at most, and the programmable radio frequency front end is compatible with AD936x series products of ADI company; when two programmable radio frequency front ends are used simultaneously, 4x4MIMO technology is supported.
Compared with the prior art, the invention has the beneficial effects that:
(1) the anti-radiation reinforcement general software radio platform can realize navigation, communication and effective load functions according to requirements, has complete functions, excellent performance and high reliability, and can perfectly meet the application requirements in the field of deep space aerospace. Each core component has radiation resistance, and the reliability of the platform is further improved through software radio technology and redundancy design.
(2) The embedded microprocessor has very friendly user development experience, can use IDE development tools provided by ARM original factories such as KEIL, IAR and ADS for software development and debugging, and is very easy to master.
(3) The anti-radiation reinforcement general software radio platform provided by the invention provides a main-stream bus controller (1553B, CAN and spacewire controller) for aerospace, and CAN well meet the requirements of deep space application. Meanwhile, the interfaces have corresponding FPGA soft cores, and can be expanded through the FPGA, so that the communication interaction capacity of the platform is greatly improved.
(4) The radio platform has excellent compatibility, the programmable radio frequency front end of the radio platform is completely compatible with AD936x series of ADI company, the FPGA is completely compatible with Virtex5 Sx95T series FPGA of Xilinx company, and design tools and design resources provided by the two companies can be used for rapid design.
(5) The anti-radiation reinforcement general software radio platform has good upgradability, and the performance of the general platform is further improved.
(6) The anti-radiation reinforcement general software radio platform has good openness, can directly design software radio by using a GUN radio design tool under the condition of transplanting an embedded linux operating system, and can be well combined with the existing software radio design resources.
(7) The radio universal platform for the anti-radiation reinforcement software can provide a plurality of soft and hard cores such as FFT (fast Fourier transform), Viterbi decoding, digital up-down frequency conversion, digital filters and the like for users in the field of communication and navigation, and improves the depth and the breadth of the users.
Drawings
FIG. 1 is a diagram of the overall architecture of a radio universal platform for radiation hardening software;
fig. 2 is a flowchart of radio boot loading of the anti-radiation hardening software.
Detailed Description
The following detailed description of the in-vehicle terminal system of the present invention is made with reference to the accompanying drawings:
the software radio platform is applied to the deep space field, has navigation and communication functions, and can be used as an effective load; the system comprises two programmable radio frequency front ends, two pieces of FPGA, an embedded microprocessor and FLASH.
When the software radio platform is used for navigation, the programmable radio frequency front end receives a navigation signal in a space, down-converts the navigation signal into a digital baseband signal, and transmits the digital baseband signal to the FPGA, the FPGA performs baseband signal processing to extract effective information and transmits the information to the embedded microprocessor, the embedded microprocessor performs back-end processing on the extracted information to calculate position information, and the FLASH is used for storing specific position information; the two programmable radio frequency front ends are backups of each other, and the two FPGAs are backups of each other and can be used independently to realize two independent navigation functions;
when the software radio platform is used for communication, the programmable radio frequency front end receives a communication signal in the space, down-conversion sampling of the communication signal is converted into a digital baseband signal, the FPGA performs digital baseband signal processing, communication information is extracted and forwarded to the embedded microprocessor, and the embedded microprocessor stores the communication information into the FLASH or sends the communication information out; when the information is sent, the embedded microprocessor sends the information to the FPGA for baseband signal processing, converts the baseband signal into a radio frequency signal of a specific frequency point through the programmable radio frequency front end and sends the radio frequency signal out; the two programmable radio frequency front ends are backups of each other, and the two FPGAs are backups of each other and can be used independently to realize two independent communication functions;
when the software radio platform is used for navigation and communication at the same time, one path of the embedded processor-FPGA-radio frequency front-end channel realizes the navigation function, the other path realizes the communication function, and the FLASH is used for storing application data;
when the software radio platform is used for the effective load, the embedded processor is used as a control center and a software programming center of the effective load to carry out overall control and back-end processing, the FPGA is used as a hardware programming center to carry out baseband digital signal processing, the programmable radio frequency front end is used for generating radio frequency signals of different frequency points, and the FLASH is used for storing corresponding software hardware codes and application data.
As shown in fig. 1, the radio platform for anti-radiation and strengthening general software implemented by the present invention includes a high performance embedded microprocessor, a programmable radio frequency front end, an FPGA, and a FLASH nonvolatile memory. Wherein:
(1) high performance embedded microprocessor
The embedded microprocessor is a main control and software programming core of the software radio platform, a cortex xA5 dual-core architecture is adopted, the main frequency CAN reach more than 300Mhz, the external hardcores are processed by the external baseband of the plug-in navigation receiver, the embedded microprocessor comprises CAN, 1553B and SPACEWIRE bus controllers, UcosIII, Vxworks and Linux operating systems are supported, and the development without operating systems CAN be carried out by using main ARM tools such as Keil and IAR. A user develops application software for the embedded high-performance processor according to the configuration of the FPGA and the programmable radio frequency front end, the embedded high-performance processor is the most flexible part of the whole platform, and the embedded high-performance processor embodies the characteristics of high software radio technology development and good compatibility. The embedded microprocessor adopts the design of an anti-radiation library-added process library and has the anti-radiation reinforcement capability.
(2) Programmable radio frequency front end
The baseband data input and output of the two programmable radio frequency front ends are respectively connected with the two FPGAs, and the embedded microprocessor is respectively provided with the two radio frequency front ends through the SPI interface. The programmable radio frequency front end supports 70MHz-6GHz frequency point, the bandwidth can reach 56MHz, and the programmable radio frequency front end is completely compatible with AD9361 programmable radio frequency front end of ADI company. The programmable radio frequency front end is designed by adopting an anti-radiation reinforcement process library and has anti-radiation reinforcement capability. The two programmable radio frequency front ends are mutually redundant, and the reliability of the platform is further improved.
(3)FPGA
The two FPGAs are connected with the embedded microprocessor, can be configured to be mounted on the embedded microprocessor corresponding to peripheral equipment, and can also be used as independent FPGAs. The FPGA is completely compatible with Xilinx Virtex5 series FPGA. The Xilinx ISE tool can be directly used for developing the FPGA. Two FPGAs are mutually redundant, and the reliability of the platform can be further improved in a severe environment.
(4) FLASH nonvolatile memory
FLASH is connected with the embedded microprocessor through an SPI interface, and radiation resistance reinforcement is carried out on FLASH data by adopting a triple-modular redundancy technology. The capacity of the single-chip FLASH can reach 128Mb at most.
The configuration of the power-on configuration flow of the radio platform of the anti-radiation reinforcement general software is shown in fig. 2:
the method comprises the following steps: after the power-on, the embedded microprocessor runs a bootloader program in the ROM to complete the basic peripheral configuration of the embedded microprocessor.
Step two: and the embedded microprocessor jumps to the first stage to start the loading program to run, and configures the running environment required by the application program.
Step three: and the first stage starts a loading program to load the application program into the random access memory with a specific address, judges whether the FPGA needs to be configured or not, configures the FPGA if the FPGA needs to be configured, and enters the fourth step if the FPGA does not need to be configured.
Step four: and jumping to the application program to run, and completing the configuration.
When the anti-radiation reinforced embedded software platform is developed, the embedded microprocessor can be subjected to related software development including simple application and transplantation development with an operating system by adopting a general compiler and an integrated development environment of an ARM processor. And the FPGA development adopts the version of the Xilinx ISE supporting the V5 device for development and debugging. And downloading the cured program into the FLASH through the upper computer.
The radio platform of the anti-radiation reinforcement general software designed by the invention is already applied to the fields of task effective load, deep space communication measurement and control and the like, and simultaneously provides a general platform for prototype design verification of various communication and effective loads.
The invention has the characteristics of high performance, flexible structure, tailorable resources, high reliability and radiation resistance, and can be widely applied to the fields of communication, electronic countermeasure, navigation and effective load.
The above description is only for the best mode of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.
Parts of the specification that are not described in detail are within the common general knowledge of a person skilled in the art.
Claims (9)
1. A radio platform of anti-radiation and reinforcement general software is characterized in that: the software radio platform is applied to the deep space field, has navigation and communication functions, and can be used as a payload; the system comprises two programmable radio frequency front ends, two FPGAs, an embedded microprocessor and a FLASH;
when the software radio platform is used for navigation, the programmable radio frequency front end receives a navigation signal in a space, down-converts the navigation signal into a digital baseband signal, and transmits the digital baseband signal to the FPGA, the FPGA performs baseband signal processing to extract effective information and transmits the information to the embedded microprocessor, the embedded microprocessor performs back-end processing on the extracted information to calculate position information, and the FLASH is used for storing specific position information; the two programmable radio frequency front ends are backups of each other, and the two FPGAs are backups of each other and can be used independently to realize two independent navigation functions;
when the software radio platform is used for communication, the programmable radio frequency front end receives a communication signal in the space, down-conversion sampling of the communication signal is converted into a digital baseband signal, the FPGA performs digital baseband signal processing, communication information is extracted and forwarded to the embedded microprocessor, and the embedded microprocessor stores the communication information into the FLASH or sends the communication information out; when the information is sent, the embedded microprocessor sends the information to the FPGA for baseband signal processing, converts the baseband signal into a radio frequency signal of a specific frequency point through the programmable radio frequency front end and sends the radio frequency signal out; the two programmable radio frequency front ends are backups of each other, and the two FPGAs are backups of each other and can be used independently to realize two independent communication functions;
when the software radio platform is used for navigation and communication at the same time, one path of the embedded processor-FPGA-radio frequency front-end channel realizes the navigation function, the other path realizes the communication function, and the FLASH is used for storing application data;
when the software radio platform is used for the effective load, the embedded processor is used as a control center and a software programming center of the effective load to carry out overall control and back-end processing, the FPGA is used as a hardware programming center to carry out baseband digital signal processing, the programmable radio frequency front end is used for generating radio frequency signals of different frequency points, and the FLASH is used for storing corresponding software hardware codes and application data.
2. The radio platform of claim 1, wherein: 2-way Spacewire controllers, 4-way can bus controllers and 2-way 1553B controllers are embedded in the embedded microprocessor, and two pieces of FPGA are connected with the embedded microprocessor and used as programmable resources to be mounted on the bus of the embedded microprocessor; the data paths of the two programmable radio frequency front ends are respectively connected with the two FPGAs, and the control path is connected with the embedded microprocessor through the SPI interface; the FLASH is connected with the embedded microprocessor; all devices are designed and manufactured by adopting an anti-radiation reinforcement process library, and have anti-radiation capability.
3. The radio platform of claim 1, wherein: the embedded microprocessor is a main control and software development core of the whole software radio development platform, is used for the integral control of the platform and the processing of baseband digital signals, adopts an ARM Cortex A5 architecture, has the lowest dominant frequency of 300MHz, comprises special computation IP hard core peripherals for FFT and Viterbi decoding, and is mounted on a high-performance embedded processor core through an AXI4 on-chip bus.
4. The radio platform of claim 1, wherein: the two FPGAs are used for digital signal processing, and peripheral equipment is added according to user requirements in a self-defined mode, the FPGAs adopt radiation-resistant reinforced FPGAs, are fully compatible with XilinxVirtexSx95T type FPGAs, and can be expanded upwards; when in use, the FPGA is mounted on an AXI4 bus of the embedded microprocessor and performs data interaction with the processor.
5. The radio platform of claim 1, wherein: the two programmable radio frequency front ends are used for receiving and transmitting radio frequency signals, a zero intermediate frequency scheme is adopted, 12-bit ADCs and 12-bit DACs are arranged in the two programmable radio frequency front ends, data interaction is carried out between the two programmable radio frequency front ends and the two FPGAs respectively, the two programmable radio frequency front ends are mounted on the embedded microprocessor through SPI interfaces, and the embedded microprocessor is configured with the programmable radio frequency front ends through SPI.
6. The radio platform of claim 1, wherein: FLASH is used for nonvolatile storage and is mounted on the embedded microprocessor through the SPI interface.
7. The radio platform of claim 1, wherein: the embedded microprocessor can be directly debugged and simply downloaded through a JTAG interface, and the program can also be downloaded into FLASH through a matching upper computer; the embedded microprocessor supports linux and ucos embedded operating systems, and the embedded microprocessor configures the two FPGAs.
8. The radio platform of claim 1, wherein: each FPGA can be independently used through a JTAG interface, the program of the FPGA is downloaded into FLASH through a matching upper computer, and the embedded microprocessor reads the configured FPGA from the FLASH; each FPGA is provided with a 1553B controller, a CAN controller and a spacewire controller soft core, and the quantity of the 1553B controllers, the CAN controllers and the spacewire controllers CAN be expanded through the FPGA under the condition of requirement.
9. The radio platform of claim 1, wherein: each programmable radio frequency front end supports 2 receiving and 2 sending, the frequency point range is 70Mhz-6GHz, the radio frequency bandwidth is 56MHz at most, and the programmable radio frequency front end is compatible with AD936x series products of ADI company; when two programmable radio frequency front ends are used simultaneously, 4x4MIMO technology is supported.
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| CN101272391A (en) * | 2008-05-09 | 2008-09-24 | 清华大学 | Software radio system based on Ethernet exchange |
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