CN111200482B - GFP frame positioning processing method, device, electronic equipment and storage medium - Google Patents

GFP frame positioning processing method, device, electronic equipment and storage medium Download PDF

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CN111200482B
CN111200482B CN201911424861.1A CN201911424861A CN111200482B CN 111200482 B CN111200482 B CN 111200482B CN 201911424861 A CN201911424861 A CN 201911424861A CN 111200482 B CN111200482 B CN 111200482B
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core frame
frame
frame header
gfp
core
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CN111200482A (en
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卢士鹏
张磊
隋威威
刘立
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Dawning Network Technology Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/16Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605Fixed allocated frame structures
    • H04J3/1652Optical Transport Network [OTN]
    • H04J3/167Optical Transport Network [OTN] interaction with SDH/SONET, e.g. carrying SDH/SONET frames, interfacing with SDH/SONET
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0078Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083Formatting with frames or packets; Protocol or part of protocol for error control

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The application provides a GFP frame positioning processing method, a GFP frame positioning processing device, electronic equipment and a storage medium. The GFP frame positioning processing method comprises the following steps: acquiring SDH frame data stream with a first clock period; converting the SDH frame data stream into a continuous payload data stream having a second clock period; wherein the first clock cycle is greater than the second clock cycle, the continuous payload data stream includes a plurality of unit data of length N bytes, N is greater than or equal to 2; descrambling each unit data to obtain the plain codes of N core frame headers to be selected corresponding to each unit data; descrambling one unit data every second clock period; and performing core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data to acquire the position of the actual core frame header of each GFP frame and the length of the payload area of the GFP frame. The method and the device can reduce the requirement on clock frequency and the complexity of positioning and synchronizing the core frame header of the GFP frame.

Description

GFP frame positioning processing method, device, electronic equipment and storage medium
Technical Field
The present application relates to the field of communications technologies, and in particular, to a GFP frame positioning processing method and apparatus, an electronic device, and a storage medium.
Background
With the rapid development of networks, SDH (Synchronous Digital Hierarchy) backbone networks have been developed into 10GSDH (10G Synchronous Digital Hierarchy) format. In order to facilitate more efficient and simplified application of various service signals to the SDH backbone network, GFP (Generic Framing Procedure) is proposed as an encapsulation technique. The GFP frame is filled as a payload into the payload area of the SDH frame. GFP frames are in bytes and the payload length of the GFP frame is variable. The GFP frame consists of a core header and a payload. The core frame header is composed of four octets, wherein the first two octets are Payload Length Indicators (PLIs), and the last two octets are CRC-16 error check codes cHEC of the Payload Length. The GFP frame payload includes the portion following the core frame header.
In the prior art, when GFP frame positioning synchronization processing is implemented, 10GSDH is sequentially searched and checked according to a single byte, so as to obtain a possible payload length. For a 10G SDH high-speed transmission network, in a single byte search synchronization mode, to support full bandwidth load data transmission, a clock frequency of approximately 1G is required, which is too high for clock resource requirements. Therefore, the single-byte search synchronization mode cannot support the reception process of the high-bandwidth network data load.
In view of the above problems, no effective technical solution exists at present.
Disclosure of Invention
Embodiments of the present application provide a GFP frame positioning processing method and apparatus, an electronic device, and a storage medium, which can reduce a clock frequency required for implementing positioning processing, thereby supporting receiving processing of a high-bandwidth network data load.
In a first aspect, an embodiment of the present application provides a GFP frame positioning processing method, which is used for positioning each GFP frame in an SDH data stream, and the method includes the following steps:
acquiring SDH frame data stream with a first clock period;
converting the SDH frame data stream into a continuous payload data stream having a second clock period; wherein the first clock cycle is greater than the second clock cycle, the continuous payload data stream includes a plurality of unit data of length N bytes, N is greater than or equal to 2;
descrambling each unit data to obtain clear codes of N core frame headers to be selected corresponding to each unit data; wherein, each second clock cycle descrambles one unit of data;
and performing core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data to obtain the position of the actual core frame header of each GFP frame and the length of the payload area of the GFP frame.
The embodiment of the application converts the SDH frame data stream into the continuous payload data stream, and realizes the verification of the clear codes of N core frame headers to be selected in the same second clock period so as to find the position of the actual core frame header and the length of the payload area of the corresponding frame; the requirements on clock frequency and the complexity of core frame header positioning synchronization of the GFP frame can be reduced, and the full bandwidth of a 10GSDH data network can be supported to receive GFP frame data.
Optionally, in the method for processing GFP frame positioning according to the embodiment of the present application, after the step of obtaining the position of the actual core frame header of each GFP frame and the length of the payload area of the GFP frame, the method further includes:
and finishing the data encapsulation of the payload area of each GFP frame according to the position of the actual core frame header of each GFP frame and the length of the payload area.
Optionally, in the GFP frame positioning processing method according to the embodiment of the present application, the SDH frame data stream includes a plurality of SDH frames, and each SDH frame includes a first payload area and an overhead field area;
said step of converting said SDH frame data stream to a continuous payload data stream having a second clock period comprises:
the overhead field of the overhead field area is removed to obtain a continuous payload data stream having a second clock cycle.
According to the method and the device, the continuous payload data flow is obtained by removing the overhead field, so that the workload of the searching step can be reduced, and the efficiency is improved.
Optionally, in the GFP frame positioning processing method according to the embodiment of the present application, the step of descrambling each of the unit data to obtain the clear codes of the N core frame headers to be selected corresponding to each of the unit data includes:
in each second clock cycle, taking N bytes of each unit data as possible core frame header starting positions respectively to obtain N core frame header data to be selected;
and respectively carrying out exclusive or operation on the N pieces of core frame header data to be selected and a 16-system numerical value 0xB6AB31E0 to obtain the plain code of each core frame header to be selected.
Optionally, in the GFP frame positioning processing method according to the embodiment of the present application, the core frame header includes a CRC field and a length field;
the step of performing core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data to obtain the position of the actual core frame header of each GFP frame and the length of the GFP frame payload area includes:
a searching step: searching the plain code of N core frame headers to be selected of the unit data, and performing CRC (cyclic redundancy check) domain check on the plain code to acquire the actual core frame header and the corresponding length domain in the N core frame headers to be selected;
a pre-synchronization step: positioning a core frame header of the next GFP frame according to the length field; checking a CRC (cyclic redundancy check) field of the core frame header of the next GFP (generic framing procedure) frame, entering a synchronization step if the check is passed, and returning to the search step to restart the search if the check is not passed;
a synchronization step: and taking the core frame header of the next GFP frame positioned in the pre-synchronization step as the current core frame header, and positioning the core frame header of the next GFP frame of the current core frame header based on the length field of the current core frame header until the core frame header of each GFP frame is synchronized.
The embodiment of the application can quickly locate the core frame header of each GFP frame and the length of the payload area of the GFP frame by adopting the searching step, the pre-synchronization step and the synchronization step.
Optionally, in the GFP frame positioning processing method according to the embodiment of the present application, in the synchronizing step, the step of positioning the core frame header of the next GFP frame of the current core frame header based on the length field of the current core frame header until the core frame header of each GFP frame is synchronized includes:
positioning a core frame header of a next GFP frame of the current core frame header based on the length field of the current core frame header;
performing CRC (cyclic redundancy check) domain check on a core frame header of a next GFP (green fluorescent protein) frame of the current core frame header;
if the CRC field check does not meet the preset condition, synchronously losing the lock, returning to the searching step and restarting the search;
and if the CRC domain check meets the preset condition, synchronous locking is carried out, the synchronous step is kept, the core frame head of the next GFP frame is positioned based on the length domain of the core frame head of the next GFP frame of the current core frame head passed by the CRC domain check, and the CRC domain check is carried out iteratively.
Optionally, in the GFP frame positioning processing method according to the embodiment of the present application, the number of bytes of the core frame header of the GFP frame is 4, and the value of N is 4.
In a second aspect, an embodiment of the present application provides a GFP frame location processing apparatus for performing location processing on each GFP frame in an SDH frame data stream, the apparatus including:
the first acquisition module is used for acquiring an SDH frame data stream with a first clock period;
a conversion module, configured to convert the SDH frame data stream into a continuous payload data stream having a second clock period; wherein the first clock cycle is greater than the second clock cycle, the continuous payload data stream includes a plurality of unit data of length N bytes, N is greater than or equal to 2;
the second obtaining module is used for descrambling each unit data to obtain the plain codes of the N core frame headers to be selected corresponding to each unit data; wherein, each second clock cycle descrambles one unit of data;
and the positioning module is used for performing core frame header synchronization processing on the basis of the plain codes of the N core frame headers to be selected corresponding to each unit data so as to obtain the position of the actual core frame header of each GFP frame and the length of the payload area of the GFP frame.
In a third aspect, an embodiment of the present application provides an electronic device, including a processor and a memory, where the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the electronic device executes the method as provided in the first aspect.
In a fourth aspect, embodiments of the present application provide a storage medium, on which a computer program is stored, where the computer program, when executed by a processor, performs the method as provided in the first aspect.
As can be seen from the above, the GFP frame positioning processing method, apparatus, electronic device and storage medium provided in this embodiment convert the SDH frame data stream into a continuous payload data stream, and implement the verification of the plain codes of N core frame headers to be selected in the same second clock cycle, so as to find the position of the actual core frame header and the length of the payload area of the corresponding frame; the requirement on the clock frequency and the complexity of the core frame header positioning synchronization of the GFP frame can be reduced, and the full bandwidth of a 10GSDH data network can be supported to receive GFP frame data.
Additional features and advantages of the present application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the embodiments of the present application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
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In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a flowchart of a GFP frame positioning processing method according to an embodiment of the present application.
Fig. 2 is another flowchart of a GFP frame positioning processing method according to the embodiment of the present application.
Fig. 3 is another flowchart of a GFP frame positioning processing method according to the embodiment of the present application.
Fig. 4 is a schematic structural diagram of a GFP frame positioning processing apparatus according to an embodiment of the present application.
Fig. 5 is a schematic structural diagram of another GFP frame positioning processing apparatus according to the embodiment of the present application.
Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
Referring to fig. 1, fig. 1 is a flowchart of a GFP frame positioning processing method in some embodiments of the present application. The GFP frame positioning processing method is used for positioning each GFP frame in an SDH data stream, and comprises the following steps:
s101, SDH frame data stream with a first clock cycle is obtained.
S102, converting the SDH frame data stream into a continuous payload data stream with a second clock period; the first clock cycle is greater than the second clock cycle, the continuous payload data stream comprises a plurality of unit data with the length of N bytes, and N is greater than or equal to the number of bytes of a core frame header of a GFP frame.
S103, descrambling each unit data to obtain the plain codes of N core frame headers to be selected corresponding to each unit data; and descrambling one unit of data every second clock cycle.
And S104, performing core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data to acquire the position of the actual core frame header of each GFP frame and the length of the payload area of the GFP frame.
In this step S101, the SDH frame data stream is a 10GSDH data stream. The SDH frame data stream has a plurality of frames of data, each frame corresponding to a first clock cycle. Each SDH frame data includes a first payload area and a corresponding overhead field area, and the first payload area of the multiple SDH frames is partitioned by the overhead field area, resulting in discontinuity of the first payload area. The GFP frame is loaded in the first payload area of the SDH frame. The GFP frame has a core header and a second payload area. The data interface of the SDH frame data stream is 8 bytes wide in data bit, and the first clock frequency is 155.52MHz. The corresponding first clock cycle is the inverse of the first clock frequency. The SDH frame is a data block frame structure, the occupation ratio of the first payload area is 26/27, and the occupation ratio of the overhead field area is 1/27. The second payload region of the GFP frame consists of two parts: payload header, payload field, and an optional FCS field.
In step S102, when the SDH frame data stream is converted, the overhead field in the SDH frame data stream is removed and a continuous payload data stream having a second clock cycle is obtained by performing clock domain crossing conversion, where the second clock frequency is 155.52 × 26 × 2/27=299.52mhz. The corresponding second clock period is the inverse of the second clock frequency. The byte number of the core frame header of the GFP frame is 4, and the value of N is 4. Of course, the value of N may also be 2, 3, 5, 6, 7 or 8.
In this step S103, each unit data of the continuous payload data stream may be descrambled in sequence in this step S103 by using a descrambling method in the prior art. Because the same unit data comprises at least N bytes, synchronous search of at least N bytes is realized, the requirement on the clock frequency can be greatly reduced, and the requirement on the clock frequency is reduced by at least 3/4.
In some embodiments, this step S103 comprises the following sub-steps: s1031, in each second clock cycle, using N bytes of each unit data as possible core frame header start positions, respectively, to obtain N core frame header data to be selected; s1032, the N pieces of core frame header data to be selected are respectively subjected to XOR operation with a 16-system numerical value 0xB6AB31E0, so that a clear code of each core frame header to be selected is obtained. For example, the GFP null frame may be obtained by xoring the core frame header data with a 16-ary value "0xB6AB31E0" to obtain a core frame header 0x000000000. Of course, if the core frame header data is different, the obtained core frame header is also different.
In step S104, the core frame header includes a CRC field and a length field. The CRC field is a check code field, and the length field is the length of the payload area corresponding to the GFP frame, that is, the length of the second payload area.
When the synchronization process is carried out, a core frame header synchronization process is to detect whether the core frame header has a correct CRC domain or not, if so, the length domain of the core frame header corresponding to the correct CRC domain is utilized to point to the starting point of the next core frame header, and then the process is repeated. If the procedure is successful within the pre-programmed number of repetitions, the GFP frame synchronization procedure is completed.
Referring to fig. 2, specifically, in some embodiments, the step S104 includes:
s1041, searching: searching the plain code of N core frame headers to be selected of the unit data, and performing CRC (cyclic redundancy check) domain check on the plain code to acquire the actual core frame header and the corresponding length domain in the N core frame headers to be selected; s1042, pre-synchronization step: positioning a core frame header of the next GFP frame according to the length field; checking a CRC (cyclic redundancy check) field of the core frame header of the next GFP (generic framing procedure) frame, entering a synchronization step if the check is passed, and returning to the search step to restart the search if the check is not passed; s1043, a synchronization step: and taking the core frame header of the next GFP frame positioned in the pre-synchronization step as the current core frame header, and positioning the core frame header of the next GFP frame of the current core frame header based on the length field of the current core frame header until the core frame header of each GFP frame is synchronized.
Here, in step S1041, a specific description is given with N =4, for example. Each unit of data consists of 4 bytes, corresponding to the clear code with 4 core frame headers to be selected. During searching, according to the time sequence, clear codes of four core frame headers to be selected of first unit data of the continuous data stream are searched. And in each second clock cycle, respectively checking the CRC fields of the four plain codes, and when the correct CRC fields are checked, indicating that the correct core frame headers are detected. Since the length of the core frame header is 4 bytes, the four plain codes corresponding to the unit data can search at most one correct CRC field, that is, only the start position of one core frame header can be found at most. After finding a correct CRC field, i.e. finding a core frame header, the process proceeds to step S1042.
In step S1042, when the correct CRC field is checked, the length field of the core frame header corresponding to the CRC field indicates the length of the payload area of the current GFP frame. Thus, the core header of the next GFP frame is found according to the length value. And performing CRC check on the core frame header of the next GFP frame. If the CRC field is correct, it means that the correct core frame header is found twice continuously, and the synchronous processing step is entered. It is understood that the number of consecutive parity bits for the correct core frame header may be configured. Generally, the number is configured to be 2, that is, the synchronization step can be performed by detecting the correct core frame header twice in succession.
In step S1043, the step of locating the core frame header of the next GFP frame of the current core frame header based on the length field of the current core frame header until the core frame header of each GFP frame is synchronized includes:
s10431, positioning a core frame header of a next GFP frame of the current core frame header based on the length field of the current core frame header; s10432, performing CRC field check on the core frame header of the next GFP frame of the current core frame header; s10433, if the CRC field check does not meet the preset condition, then the lock is lost synchronously, and the searching step is returned to restart the searching; s10434 if the CRC field check meets the preset condition, synchronously locking, keeping in the synchronous step, positioning the core frame header of the next GFP frame based on the length field of the core frame header of the next GFP frame of the current core frame header passing the CRC field check, and iteratively performing CRC field check. The "core header of the next GFP frame" refers to the core header of the GFP frame of the next frame of the "core header of the next GFP frame".
In step S10432, if the calculated CRC field value is different from the correct CRC field value, it indicates that a core frame header error exists. If the calculated CRC field value is the same as the correct CRC field value, it indicates that the core frame header is correct. If the core frame header is erroneous, the core frame header error can be divided into a single bit error and a multi-bit error. The CRC check can support only single-bit error correction, and if a single-bit error is allowed in the communication system, the error correction is performed. However, if a multi-bit error occurs, the value of the PLI field in the header of the core frame is erroneous and uncorrectable, and the header of the core frame of the next frame cannot be located according to the value of the PLI field; therefore, if a multi-bit error occurs, synchronization is lost.
It is to be understood that, as shown in fig. 3, in some embodiments, the GFP frame positioning processing method further includes step S105: and finishing the data encapsulation of the payload area of each GFP frame according to the position of the actual core frame header of each GFP frame and the length of the payload area.
In the synchronization processing step, the length field of each core frame header determines the range of the payload area of the current frame. For each second clock cycle of four bytes of data, which may be part or all of the payload area contents of a frame, the payload area start flag, the payload area end flag, the number of valid bytes for the start clock cycle (e.g., one to four), and the number of valid bytes for the end clock cycle (e.g., one to four) are used to locate the contents of the payload area encapsulating and describing a GFP frame.
As can be seen from the above, the GFP frame positioning processing method provided by the present application obtains an SDH frame data stream having a first clock cycle; converting the SDH frame data stream into a continuous payload data stream having a second clock period; wherein the first clock cycle is greater than the second clock cycle, the continuous payload data stream includes a plurality of unit data of length N bytes, N is greater than or equal to 2; descrambling each unit data to obtain the plain codes of N core frame headers to be selected corresponding to each unit data; wherein, each second clock cycle descrambles one unit of data; performing core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data to obtain the position of the actual core frame header of each GFP frame and the length of the payload area of the corresponding frame; the GFP frame positioning processing is realized, and because the SDH frame data stream is converted into the continuous net load data stream, and the clear codes of N core frame headers to be selected are checked in the same second clock period, so as to find the position of the actual core frame header and the length of the net load area of the corresponding frame; the requirement for clock frequency can be reduced; the complexity of the core frame header positioning synchronization of the GFP frame is reduced, and the GFP frame data can be received by the 10GSDH data network in full bandwidth.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a GFP frame localization processing apparatus in some embodiments of the present application. The device is used for positioning the GFP frame in the SDH frame data stream. The GFP frame positioning processing device comprises: a first acquisition module 201, a conversion module 202, a second acquisition module 203, and a positioning module 204.
The first obtaining module 201 is configured to obtain an SDH frame data stream with a first clock cycle. The SDH frame data stream is a 10GSDH data stream. The SDH frame data stream is a 10GSDH data stream. The SDH frame data stream has a plurality of frames of data, each frame corresponding to a first clock cycle. Each SDH frame data includes a first payload area and a corresponding overhead field area, and the first payload area of the multiple SDH frames is partitioned by the overhead field area, resulting in discontinuity of the first payload area. The GFP frame is loaded in the first payload area of the SDH frame. The GFP frame has a core header and a second payload area. The data interface of the SDH frame data stream is 8 bytes wide in data bit, and the first clock frequency is 155.52MHz. The corresponding first clock cycle is the inverse of the first clock frequency. The SDH frame is a data block frame structure, the occupation ratio of the first payload area is 26/27, and the occupation ratio of the overhead field area is 1/27. The second payload region of the GFP frame consists of two parts: payload header, payload field, and an optional FCS field.
Wherein, the conversion module 202 is configured to convert the SDH frame data stream into a continuous payload data stream having a second clock period; the first clock cycle is greater than the second clock cycle, the continuous payload data stream comprises a plurality of unit data with the length of N bytes, and N is greater than or equal to the number of bytes of a core frame header of a GFP frame. When the conversion module 202 performs conversion processing, the overhead fields in the SDH frame data stream are removed and converted across the clock domain to obtain a continuous payload data stream having a second clock cycle, where the second clock frequency is 155.52 × 26 × 2/27=299.52mhz. The corresponding second clock period is the inverse of the second clock frequency. The byte number of the core frame header of the GFP frame is 4, and the value of N is 4. Of course, the value of N may also be 2, 3, 5, 6, 7 or 8.
The second obtaining module 203 is configured to descramble each unit of data to obtain the plaintext codes of N core frame headers to be selected corresponding to each unit of data; and descrambling one unit of data every second clock cycle. The second obtaining module 203 may sequentially descramble each unit data of the continuous payload data stream using a descrambling method in the prior art. Because the same unit data comprises at least N bytes, synchronous search of at least N bytes is realized, the requirement on the clock frequency can be greatly reduced, and the clock frequency is reduced by at least 3/4.
In some embodiments, the second obtaining module 203 is configured to: in each second clock cycle, taking N bytes of each unit data as possible core frame header starting positions respectively to obtain N core frame header data to be selected; and respectively carrying out exclusive or operation on the N pieces of core frame header data to be selected and a 16-system numerical value 0xB6AB31E0 to obtain the plain code of each core frame header to be selected. For example, the GFP null frame may be obtained by xoring the core frame header data with a 16-ary value "0xB6AB31E0" to obtain a core frame header 0x000000000. Of course, if the core frame header data is different, the obtained core frame header is also different.
The positioning module 204 is configured to perform core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data, so as to obtain a position of an actual core frame header of each GFP frame and a length of a payload area of the GFP frame.
When the synchronization process is carried out, a core frame head synchronization process is to detect whether the core frame head has a correct CRC domain or not, if so, the length domain of the core frame head corresponding to the correct CRC domain is utilized to point to the next starting point of the core frame head, and then the process is repeated. If this process is successful within a pre-programmed number of repetitions, the GFP frame synchronization process is complete.
Referring to fig. 5, specifically, in some embodiments, the positioning module 204 includes: search unit 2041, pre-synchronization unit 2042, and synchronization unit 2043.
The searching unit 2041 is configured to search for a plain code of N core frame headers to be selected of the unit data, and perform CRC domain check on the plain code to obtain an actual core frame header and a corresponding length domain in the N core frame headers to be selected. The pre-synchronization unit 2042 is configured to locate a core frame header of a next GFP frame according to the length field; and checking the CRC field of the core frame header of the next GFP frame, if the check is passed, turning to the synchronization unit 2043, and if the check is not passed, returning to the search unit 2041 to restart the search. The synchronizing unit 2043 is configured to use the core frame header of the next GFP frame located by the pre-synchronizing unit as the current core frame header, and locate the core frame header of the next GFP frame of the current core frame header based on the length field of the current core frame header until each core frame header is synchronized.
Here, N =4 is specifically described. Each unit of data consists of 4 bytes, corresponding to the clear code with 4 core frame headers to be selected. During searching, according to the time sequence, the clear codes of the four core frame headers to be selected of the first unit data of the continuous data stream are searched first. And in each second clock cycle, respectively checking the CRC fields of the four plain codes, and when the correct CRC fields are checked, indicating that the correct core frame headers are detected. Since the length of the core frame header is 4 bytes, the four plain codes corresponding to the unit data can search at most one correct CRC field, that is, only the start position of one core frame header can be found at most. When the correct CRC field is checked, the length field of the core frame header corresponding to the CRC field indicates the length of the payload area of the current frame. Thus, the field of the core header of the next GFP frame is found according to the length value. And performing CRC check on the core frame header of the next GFP frame. If the CRC field is correct, it means that the correct core frame header is found twice continuously, and the synchronization processing step is entered. It is understood that the number of consecutive decisions to check for the correct core frame header may be configured.
The synchronization unit 2043 is configured to: positioning a core frame header of a next GFP frame of the current core frame header based on the length field of the current core frame header; positioning a core frame header of a next GFP frame of the current core frame header based on the length field of the current core frame header; s10432, performing CRC field check on the core frame header of the next GFP frame of the current core frame header; s10433, if the CRC field check does not meet the preset condition, then the lock is lost synchronously, and the searching step is returned to restart the searching; s10434 if the CRC field check meets the preset condition, then synchronous locking is carried out, the synchronous step is kept, based on the length field of the core frame head of the next GFP frame of the current core frame head passed by the CRC field check, the core frame head of the next GFP frame is positioned, and CRC field check is carried out iteratively. The "core header of next GFP frame" refers to the core header of the next GFP frame of the "core header of next GFP frame".
If the calculated CRC field value is different from the CRC field value of the core frame header, the CRC field value indicates that a core frame header error exists. If the calculated CRC field value is the same as the CRC field value of the core frame header, it indicates that the core frame header is correct. If the core frame header is erroneous, the core frame header error can be divided into a single bit error and a multi-bit error. The CRC check can support only single-bit error correction, and if a single-bit error is allowed in the communication system, the error correction is performed. However, if a multi-bit error occurs, the value of the PLI field in the core frame header is erroneous and uncorrectable, and the core frame header of the next frame cannot be located according to the value of the PLI field; therefore, if a multi-bit error occurs, synchronization is lost.
As can be seen from the above, the GFP frame positioning processing apparatus provided by the present application obtains the SDH frame data stream having the first clock cycle; converting the SDH frame data stream into a continuous payload data stream having a second clock period; wherein the first clock cycle is greater than the second clock cycle, the continuous payload data stream includes a plurality of unit data of length N bytes, N is greater than or equal to 2; descrambling each unit data to obtain the plain codes of N core frame headers to be selected corresponding to each unit data; wherein, each second clock cycle descrambles one unit of data; performing core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data to obtain the position of the actual core frame header of each GFP frame and the length of the payload area of the corresponding frame; therefore, GFP frame positioning processing is realized, and because SDH frame data flow is converted into continuous payload data flow, and the plain codes of N core frame headers to be selected are verified in the same second clock period, so as to find the position of the actual core frame header and the length of a payload area of a corresponding frame; the requirement for clock frequency can be reduced; the complexity of realizing the core frame header positioning synchronization of the GFP frame is reduced, and the full bandwidth of a 10GSDH data network is supported to receive GFP frame data.
Referring to fig. 6, fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application, and the present application provides an electronic device 3, including: the processor 301 and the memory 302, the processor 301 and the memory 302 being interconnected and communicating with each other via a communication bus 303 and/or other form of connection mechanism (not shown), the memory 302 storing a computer program executable by the processor 301, the processor 301 executing the computer program when the computing device is running to perform the method of any of the alternative implementations of the embodiments described above.
The embodiment of the present application provides a storage medium, and when being executed by a processor, the computer program performs the method in any optional implementation manner of the above embodiment. The storage medium may be implemented by any type of volatile or nonvolatile storage device or combination thereof, such as a Static Random Access Memory (SRAM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), an Erasable Programmable Read-Only Memory (EPROM), a Programmable Read-Only Memory (PROM), a Read-Only Memory (ROM), a magnetic Memory, a flash Memory, a magnetic disk, or an optical disk.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
In addition, units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
Furthermore, the functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (9)

1. A GFP frame positioning processing method, for positioning each GFP frame in an SDH data stream, said method comprising the steps of:
acquiring SDH frame data stream with a first clock period;
converting the SDH frame data stream into a continuous payload data stream having a second clock period; wherein the first clock cycle is greater than the second clock cycle, the continuous payload data stream includes a plurality of unit data of length N bytes, N is greater than or equal to 2;
descrambling each unit data to obtain the plain codes of N core frame headers to be selected corresponding to each unit data; wherein, each second clock cycle descrambles one unit of data;
performing core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data to obtain the position of the actual core frame header of each GFP frame and the length of the payload area of the GFP frame;
the performing core frame header synchronization processing based on the explicit codes of the N core frame headers to be selected corresponding to each unit data to obtain the position of the actual core frame header of each GFP frame and the length of the payload area of the GFP frame includes:
positioning a core frame header of a next GFP frame of the current core frame header based on the length field of the current core frame header;
performing CRC (cyclic redundancy check) domain check on a core frame header of a next GFP (green fluorescent protein) frame of the current core frame header;
if the CRC field check does not meet the preset condition, synchronously losing the lock, returning to the searching step and restarting the search;
if the CRC domain check meets the preset condition, synchronous locking is carried out, the synchronous step is kept, the core frame header of the next GFP frame is positioned based on the length domain of the core frame header of the next GFP frame of the current core frame header passing the CRC domain check, and the CRC domain check is carried out iteratively;
the performing CRC field check on the core frame header of the next GFP frame from the current core frame header includes:
if the calculated CRC field value is different from the correct CRC field value, the core frame header error is present, the core frame header error comprises a single-bit error and a multi-bit error, when the core frame header error is the single-bit error, the core frame header error is corrected, and when the core frame header is the multi-bit error, the synchronization lock loss is determined.
2. The method of claim 1, wherein after the step of obtaining the actual location of the core header of each GFP frame and the length of the payload area of the GFP frame, the method further comprises:
and finishing the data encapsulation of the payload area of each GFP frame according to the position of the actual core frame header of each GFP frame and the length of the payload area.
3. The method of claim 1, wherein the SDH frame data stream includes a plurality of SDH frames, each SDH frame including a first payload area and an overhead field area;
said step of converting said SDH frame data stream into a continuous payload data stream having a second clock period comprises:
the overhead field of the overhead field area is removed to obtain a continuous payload data stream having a second clock cycle.
4. The method of claim 1, wherein the step of descrambling each of the unit data to obtain the clear codes of the N candidate core frame headers corresponding to each unit data comprises:
in each second clock cycle, taking N bytes of each unit data as possible core frame header starting positions respectively to obtain N core frame header data to be selected;
and respectively carrying out exclusive or operation on the N pieces of core frame header data to be selected and a 16-system numerical value 0xB6AB31E0 to obtain the plain code of each core frame header to be selected.
5. The method of claim 1, wherein the core frame header comprises a CRC field and a length field;
the step of performing core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data to obtain the position of the actual core frame header of each GFP frame and the length of the GFP frame payload area includes:
a searching step: searching the plain code of N core frame headers to be selected of the unit data, and performing CRC (cyclic redundancy check) domain check on the plain code to acquire the actual core frame header and the corresponding length domain in the N core frame headers to be selected;
a pre-synchronization step: positioning a core frame header of the next GFP frame according to the length field; checking a CRC (cyclic redundancy check) field of the core frame header of the next GFP (generic framing procedure) frame, entering a synchronization step if the check is passed, and returning to the search step to restart the search if the check is not passed;
a synchronization step: and taking the core frame header of the next GFP frame positioned in the pre-synchronization step as the current core frame header, and positioning the core frame header of the next GFP frame of the current core frame header based on the length field of the current core frame header until the core frame header of each GFP frame is synchronized.
6. The method of claim 1, wherein the number of bytes of a core frame header of the GFP frame is 4, and the value of N is 4.
7. A GFP frame localization processing apparatus for performing localization processing on each GFP frame in an SDH frame data stream, said apparatus comprising:
the first acquisition module is used for acquiring an SDH frame data stream with a first clock period;
a conversion module, configured to convert the SDH frame data stream into a continuous payload data stream having a second clock period; wherein the first clock cycle is greater than the second clock cycle, the continuous payload data stream includes a plurality of unit data of length N bytes, N is greater than or equal to 2;
a second obtaining module, configured to descramble each unit of data to obtain clear codes of N core frame headers to be selected corresponding to each unit of data; wherein, each second clock cycle descrambles one unit of data;
a positioning module, configured to perform core frame header synchronization processing based on the plain codes of the N core frame headers to be selected corresponding to each unit data, so as to obtain a position of an actual core frame header of each GFP frame and a length of a payload area of the GFP frame;
the positioning module is specifically configured to:
positioning a core frame header of a next GFP frame of the current core frame header based on the length field of the current core frame header;
performing CRC (cyclic redundancy check) domain check on a core frame header of a next GFP (green fluorescent protein) frame of the current core frame header;
if the CRC field check does not meet the preset condition, synchronously losing the lock, returning to the searching step and restarting the search;
if the CRC domain check meets the preset condition, synchronous locking is carried out, the synchronous step is kept, the core frame head of the next GFP frame is positioned based on the length domain of the core frame head of the next GFP frame of the current core frame head passed by the CRC domain check, and the CRC domain check is carried out iteratively;
the performing CRC field check on the core frame header of the next GFP frame from the current core frame header includes:
if the calculated CRC field value is different from the correct CRC field value, the core frame header error is present, the core frame header error comprises a single-bit error and a multi-bit error, when the core frame header error is the single-bit error, the core frame header error is corrected, and when the core frame header is the multi-bit error, the synchronization lock loss is determined.
8. An electronic device comprising a processor and a memory, the memory storing computer readable instructions that, when executed by the processor, perform the method of any of claims 1-6.
9. A storage medium on which a computer program is stored, which computer program, when being executed by a processor, is adapted to carry out the method according to any one of claims 1-6.
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