CN111198776A - Method for preventing UART (universal asynchronous receiver/transmitter) from receiving lost data during deep sleep of MCU (microprogrammed control unit) - Google Patents

Method for preventing UART (universal asynchronous receiver/transmitter) from receiving lost data during deep sleep of MCU (microprogrammed control unit) Download PDF

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Publication number
CN111198776A
CN111198776A CN201911359020.7A CN201911359020A CN111198776A CN 111198776 A CN111198776 A CN 111198776A CN 201911359020 A CN201911359020 A CN 201911359020A CN 111198776 A CN111198776 A CN 111198776A
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CN
China
Prior art keywords
uart
mcu
deep sleep
pll
clock
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Pending
Application number
CN201911359020.7A
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Chinese (zh)
Inventor
吴亮
汪成喜
詹胜林
邓敏
徐栋麟
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Shanghai Lightning Semiconductor Technology Co ltd
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Shanghai Lightning Semiconductor Technology Co ltd
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Priority to CN201911359020.7A priority Critical patent/CN111198776A/en
Publication of CN111198776A publication Critical patent/CN111198776A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0745Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in an input/output transactions management context
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793Remedial or corrective actions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4418Suspend and resume; Hibernate and awake

Abstract

The invention discloses a method for preventing UART (universal asynchronous receiver/transmitter) from receiving lost data during deep sleep of an MCU (microprogrammed control unit), which comprises the following steps of: s1, the MCU enters a deep sleep mode, the PLL is closed, the system main Clock is closed, the UART is in an awake on power domain, and the Clock source APB Clock of the UART is switched to the crystal from the PLL; s2, UART receives the first data frame and then initiates a wake-up signal to CPU; and S3, after the MCU is awakened, the PLL is opened, the Clock source APB Clock of the UART is switched from the crystal to the PLL, and the software system enters a normal operation mode. The invention is characterized in that: the MCU is directly awakened through the UART without additional GPIO, the MCU uses the UART to receive data in the deep sleep process, the other side does not need to wait, dummy data does not need to be sent, GPIO interruption resources are not additionally occupied, and the UART is guaranteed to receive data without loss.

Description

Method for preventing UART (universal asynchronous receiver/transmitter) from receiving lost data during deep sleep of MCU (microprogrammed control unit)
Technical Field
The invention relates to the technical field of computer communication, in particular to a method for preventing UART (universal asynchronous receiver/transmitter) from receiving lost data during deep sleep of an MCU (microprogrammed control unit).
Background
A UART (Universal Asynchronous Receiver/Transmitter) Universal Asynchronous Receiver/Transmitter is a peripheral interface commonly used in a Universal MCU and various wireless SOCs, the MCU/SOC needs to save power consumption in some battery-powered application scenarios to prolong the service cycle of the device battery, so that it can enter a deep sleep mode (PLL off, system master off, 32.768KHz low-power low-speed clock on) in a period without task, and in the deep sleep mode, the MCU/SOC can only be awakened by RTC and GPIO interrupt, so that the MCU/SOC cannot be awakened in time in the process of receiving external burst data frames of indefinite length, resulting in data loss, and there are two commonly used methods for waking up the MCU at present:
as shown in fig. 1, a GPIO is used to firstly awaken the MCU/SOC, then wait for a period of time until the MCU/SOC is stable, and then communicate with the MCU/SOC through a UART;
as shown in fig. 2, a GPIO of the MCU/SOC is configured to be in an interrupt mode and connected to the Rx pin of the UART, the UART transmitter first transmits a Dummy data, so that the GPIO connected to the UART Rx pin generates an interrupt to wake up the MCU/SOC, the Dummy data is long enough to ensure that the MCU/SOC can be completely woken up and the UART can normally receive data during the time of transmitting the data.
Disclosure of Invention
The present invention is directed to overcome the above-mentioned disadvantages and to provide a method for preventing UART from receiving lost data during deep sleep of MCU.
The technical scheme adopted by the invention for realizing the purpose is as follows: a method for preventing UART (Universal asynchronous receiver transmitter) from receiving lost data during deep sleep of an MCU (microprogrammed control Unit) comprises the following steps:
s1, the MCU enters a deep sleep mode, the PLL is closed, the system main Clock is closed, the UART is in an awake on power domain, and the Clock source APB Clock of the UART is switched to the crystal from the PLL;
s2, UART receives the first data frame and then initiates a wake-up signal to CPU;
and S3, after the MCU is awakened, the PLL is opened, the Clock source APB Clock of the UART is switched from the crystal to the PLL, and the software system enters a normal operation mode.
The UART writes the received data frame into the FIFO during the period from when the first data frame is received from the UART to when the software system enters the normal operating mode.
The invention is characterized in that: the MCU is directly awakened through the UART without additional GPIO, the MCU uses the UART to receive data in the deep sleep process, the other side does not need to wait, dummy data does not need to be sent, GPIO interruption resources are not additionally occupied, and the UART is guaranteed to receive data without loss.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention.
Fig. 1 is a schematic diagram of waking up an MCU through GPIO in the prior art.
Fig. 2 is a schematic diagram of the prior art waking up the MCU by configuring the GPIO to interrupt mode.
FIG. 3 is a schematic diagram of the present invention for directly waking up the MCU through UART.
Detailed Description
As used herein, the term "comprising" is used in the present specification and claims to mean that the term "comprises" or "comprising" is used in the present specification and claims to mean that the term comprises, or that the term "comprises" or "comprises" comprising "or" comprises, the scope of the present invention is defined by the appended claims.
The present invention will be described in further detail with reference to fig. 3, but the present invention is not limited thereto.
The invention discloses a method for preventing UART (universal asynchronous receiver/transmitter) from receiving lost data during deep sleep of an MCU (microprogrammed control unit), which comprises the following steps of:
s1, the MCU enters a deep sleep mode, the PLL is closed, the system main Clock is closed, the UART is in an awake on power domain, and the Clock source APB Clock of the UART is switched to the crystal from the PLL;
s2, UART receives the first data frame process to identify the start signal, the start directly awakens the CPU;
and S3, after the MCU is awakened, the PLL is opened in a software mode, the Clock source APB Clock of the UART is switched from the crystal to the PLL, and the software system enters a normal operation mode.
In order to prevent data loss during a time period from when the UART receives a first data frame identification start signal to when the software system enters a normal operation mode, the UART preferentially writes the data frames received during the time period into the FIFO, and the FIFO depth supports software configuration so as to ensure that data cannot be lost under different baud rates.
The invention can directly awaken the MCU through the UART without additional GPIO, the MCU uses the UART to receive data in the deep sleep process, the other party does not wait, the dummy data does not need to be sent, the GPIO interruption resource is not occupied additionally, and the UART can be ensured not to receive the data.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be able to cover the technical solutions and the inventive concepts of the present invention within the technical scope of the present invention.

Claims (2)

1. A method for preventing UART from receiving lost data during deep sleep of an MCU is characterized by comprising the following steps:
s1, the MCU enters a deep sleep mode, the PLL is closed, the system main Clock is closed, the UART is in an awake on power domain, and the Clock source APB Clock of the UART is switched to the crystal from the PLL;
s2, UART receives the first data frame and then initiates a wake-up signal to CPU;
and S3, after the MCU is awakened, the PLL is opened, the Clock source APB Clock of the UART is switched from the crystal to the PLL, and the software system enters a normal operation mode.
2. The method of claim 1, wherein the UART receives lost data during deep sleep of the MCU, the method comprising: the UART writes the received data frame into the FIFO during the period from when the first data frame is received from the UART to when the software system enters the normal operating mode.
CN201911359020.7A 2019-12-25 2019-12-25 Method for preventing UART (universal asynchronous receiver/transmitter) from receiving lost data during deep sleep of MCU (microprogrammed control unit) Pending CN111198776A (en)

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CN201911359020.7A CN111198776A (en) 2019-12-25 2019-12-25 Method for preventing UART (universal asynchronous receiver/transmitter) from receiving lost data during deep sleep of MCU (microprogrammed control unit)

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