CN111191779A - Data processing method, device, processor and computer readable storage medium - Google Patents

Data processing method, device, processor and computer readable storage medium Download PDF

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CN111191779A
CN111191779A CN202010000224.8A CN202010000224A CN111191779A CN 111191779 A CN111191779 A CN 111191779A CN 202010000224 A CN202010000224 A CN 202010000224A CN 111191779 A CN111191779 A CN 111191779A
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fitting
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CN111191779B (en
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闯小明
杨龚轶凡
郑瀚寻
曾昭睿
周远航
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Zhonghao Xinying Hangzhou Technology Co ltd
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Shenzhen Xinying Technology Co ltd
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Abstract

The invention discloses a data processing method, a data processing device, a processor and a computer readable storage medium. The invention adopts the cooperation of the function value mapping circuit and the fitting operation circuit to quickly and efficiently process data so as to meet the requirement of the neural network on the nonlinearity, thereby improving the approximation capability of the neural network on the complex function. Compared with the mode that only the fitting operation circuit is adopted to carry out the full-interval fitting operation to fit the function value of the specific function in the prior art, the method and the device not only can reduce the consumption of the fitting parameters so as to reduce the expenditure of hardware resources, but also can reduce the time for the fitting operation circuit to match the fitting parameters so as to accelerate the data processing speed of the data processing device.

Description

Data processing method, device, processor and computer readable storage medium
Technical Field
The present invention relates to the field of neural networks, and in particular, to a data processing method, apparatus, processor, and computer-readable storage medium.
Background
In the deep learning application scenario of neural networks, we express complex relationships between inputs and outputs with neural networks. In the mathematical language, an artificial neural network is used to implement complex functions. The neural network is composed of a plurality of layers of neurons, each neuron is provided with an activation function, the neurons can simultaneously receive a plurality of inputs and unify the inputs, then the inputs and the outputs are output after the activation functions are used for processing, a certain mapping relation exists between the inputs and the outputs, if the activation functions in each neuron are linear functions, the mapping relation between the inputs and the outputs is linear, the neural network only outputs the plurality of inputs after linear combination, namely the neural network lacks nonlinearity, and the approximation capability of complex functions is very limited.
In order to make the neural network more powerful for the expression capability of complex functions, a nonlinear activation function needs to be introduced for the construction of the neural network. Introducing a non-linear function for the neural network is equivalent to fitting a function value of the non-linear function. Generally speaking, the function value of the fitting nonlinear function in the prior art is generally calculated by using a general-purpose processor, and the efficiency is low. Even if a special fitting circuit is adopted, the required fitting interval is huge, the related fitting parameters are numerous, the storage resource overhead is high, the circuit area is large, and meanwhile, the data processing speed of the circuit is difficult to meet the requirements of a neural network.
Disclosure of Invention
Aiming at the problems, in order to meet the requirement of the neural network on the nonlinearity, a scheme of combining a special circuit with a fitting operation circuit only configured with a specific fitting interval is used for replacing a scheme of configuring the fitting operation circuit in a whole interval, a whole set of solution measures for improving the data processing capability of the neural network are provided, and the expenditure of hardware resources is obviously reduced.
To achieve the above object, according to a first aspect of the present invention, there is provided a data processing method applied to a neural network. Providing a multiplier, a fitting operation circuit and a function value mapping circuit, wherein the fitting operation circuit is used for calling fitting parameters to perform fitting operation on data; the function value mapping circuit is used for matching corresponding numerical values according to the indexes. Meanwhile, at least one specific fitting interval in a specific function definition domain is provided, the specific fitting interval corresponds to at least one group of fitting parameters, and the fitting operation circuit only processes data in the specific fitting interval; and provides input data x, the input data x being a normalized floating point number, the input data x including significands, exponents and symbols. The data processing method provided by the invention comprises the following steps:
step S10, acquiring the input data x, and judging whether the input data x is positioned in a specific fitting interval according to the effective number, the index and the symbol of the input data x;
if the input data x is located in the specific fitting interval, using a fitting operation circuit to call fitting parameters to perform fitting operation on the input data x to obtain a fitting operation result, and obtaining a final operation result based on the fitting operation result;
if the input data x is outside the specific fitting interval, the step of directly calling the fitting operation circuit to process the input data x is skipped, and the step S20 is directly executed.
In step S20, the input data x is shifted to obtain shifted data x'. The shift processing includes obtaining an exponent t of the shift data x ', where t is an integer, then calculating a difference between the exponent t and the input data x, and then shifting the significant digit of the input data x based on the difference to obtain the significant digit of the shift data x'.
Step S30, obtaining fitting part x based on the displacement data x1And a non-fitting part x2Fitting part x1And the non-fitting part x2Is equal to the shift data x'. Wherein, the fitting part x1Is equal to the fractional part of the significant number of the shift data x' plus the integer r, the fitting section x1Is positioned in a specific fitting interval; non-fitting part x2Is equal to the integer part of the significand of the shift data x' minus the integer r.
Step S40, calling fitting parameter pair fitting part x by using fitting arithmetic circuit1Performing fitting operation to obtain a first operation result f (x)1);
Using a function value mapping circuit to non-fit the part x2Searching the mapping table for the index to obtain a second operation result f (x)2) (ii) a The mapping table includes a non-fitting portion x2And a non-fitting part x2Corresponding second operation result f (x)2)。
Step S50, using the multiplier to obtain the first operation result f (x)1) And a second operation result f (x)2) And multiplying to obtain a final operation result.
The present invention decomposes input data x into fitting parts x1And a non-fitting part x2And respectively aligning the fitting parts x through different circuits1And a non-fitting part x2And (6) processing. Specifically, the fitting operation circuit is used to fit the fitting part x1Performing fitting operation to obtain a first operation result f (x)1) (ii) a And a non-fitting part x is formed by a function value mapping circuit2Searching the mapping table for the index to obtain a second operation result f (x)2) Then based on the first operation result f (x)1) And a second operation result f (x)2) And restoring the function fitting value of the specific function. Compared with the closest concrete implementation scheme of fitting by using a fitting operation circuit covering the whole interval in the prior art, the method has the advantages that the function value mapping circuit is matched with the fitting operation circuit only provided with the extremely small specific fitting interval, the fitting operation circuit provided with the high-power-consumption multi-component whole interval fitting interval is replaced, the number of fitting parameters is greatly reduced, and therefore the expenditure of hardware resources, particularly storage resources, is reduced. Meanwhile, compared with the prior art, the fitting operation circuit only provided with the minimum specific fitting interval has fewer fitting parameters, so that the time for selecting and matching the fitting parameters when the fitting operation circuit calls the fitting parameters can be shortened, the data processing speed is integrally improved, the data processing method is particularly applied to a neural network, and particularly when the data processing method is used for approximating the function value of a specific function by the neural network, the requirement of the neural network on the nonlinearity is met, and the approximation capability of the neural network on the complex function is further improved.
Preferably, the specific fitting interval includes [ -2 ]t+n,2t+m]And n and m are positive integers. In a preferred embodiment, the integer r is 1. Therefore, the fitting part x is formed1The fitting part x is constructed in a manner that1Is less than 2, fitting part x1Is equal to t, fitSection x1The symbol of (c) includes both positive and negative cases. Therefore, in the preferred binary neural network processing system of the present invention, the fitting unit x keeps n and m both positive integers1Must lie within a particular fit interval [ -2 [ ]t+n,2t+m]So that the fitting part x is not required1The fitting operation can be carried out by additional processing, thereby further improving the data processing speed of the method and only storing a specific fitting interval [ -2 ]t+n,2t+m]And the corresponding fitting parameters reduce the expense of storage resources.
More preferably, the specific fitting interval includes a first fitting interval and a second fitting interval, and the first fitting interval includes [ -2 ]t+n,-2t-p]The second fitting interval includes [2 ]t-q,2t+m]And p and q are both non-negative integers. By the fitting part x1The fitting part x is constructed in a manner that1Is greater than 1, fitting part x1Is equal to t, fitting part x1The symbol of (c) includes both positive and negative cases. Therefore, on the premise that p and q are both non-negative integers, the fitting part x1Must lie in the first fit interval [ -2 [ ]t +n,-2t-p]Or the second fitting interval [2 ]t-q,2t+m]Thereby further reducing the number of fitting parameters to reduce the overhead of memory resources.
More preferably, m and n are equal to 1 and p and q are equal to 0. In the guarantee fitting part x1On the premise of locating in the specific fitting interval, fix the specific fitting interval in the most convenient [ -2 ]t+1,2t+1]Or [ -2 ]t+1,-2t]U[2t,2t+1]Thereby reducing the number of fitting parameters to a locally optimal situation to reduce the overhead of storage resources.
Preferably, the non-fitting part x in the mapping table is2Comprising at least one arithmetic series having a tolerance equal to 2t. In the present invention, the mapping table does not need to store every non-fitting part x within a specific function definition domain2But only some specific values have to be stored. By the non-fitting part x2Is composed ofBy way of construction, the non-fitting part x2Is an integer, the non-fitting part x2Is t (t is an integer), so the non-fitting part x2Are integers. At the same time, fit the fitting part x1Only one set of tolerance 2 needs to be stored in the mapping tabletThe integer arithmetic progression of (2) can realize the processing of arbitrary input data x. Thus, by reducing the fitting part x in the mapping table2The data storage capacity of (2) can reduce the cost of storage resources and can further reduce the non-fitting part x of the function value mapping circuit2Obtaining a second operation result f (x) for the index lookup mapping table2) Thereby accelerating the data processing speed of the data processing method.
To achieve the above object, according to a second aspect of the present invention, there is provided a data processing apparatus. Providing at least one specific fitting interval corresponding to a specific function, wherein the specific fitting interval corresponds to at least one group of fitting parameters; and provides input data x, the input data x being a normalized floating point number, the input data x including significands, exponents and symbols. The data processing apparatus provided by the present invention includes:
and the judging unit is used for judging whether the input data x is positioned in the specific fitting interval according to the effective number, the index and the sign of the input data x.
And the shifting unit is connected with the judging unit and is used for acquiring the input data x outside the specific fitting interval and shifting the input data x to obtain shifted data x'.
The splitting unit is connected with the shifting unit and is used for acquiring shifting data x 'and splitting the shifting data x' into a fitting part x1And a non-fitting part x2Fitting part x1And the non-fitting part x2Is equal to the shift data x'.
A function value mapping circuit connected with the splitting unit for obtaining the non-fitting part x2And with a non-fitting part x2Searching a mapping table for the index to finally obtain a non-fitting part x2Corresponding second operation result f (x)2) (ii) a The mapping table includes a non-fitting part x2And a non-fitting part x2Corresponding second operation result f (x)2)。
The fitting operation circuit is used for receiving the input data x positioned in the specific fitting interval and calling the fitting parameters to perform fitting operation on the input data x to obtain a fitting operation result; the fitting arithmetic circuit is also used for receiving a fitting part x1And calling fitting parameters to the fitting part x1Performing fitting operation to obtain a first operation result f (x)1)。
The multiplier is connected with the fitting operation circuit; the multiplier is used for receiving the fitting operation result and a fixed numerical value, wherein the fixed numerical value is equal to 1, and multiplying the fitting operation result and the fixed numerical value; the multiplier is also used for receiving a first operation result f (x)1) And a second operation result f (x)2) And the first operation result f (x)1) And a second operation result f (x)2) Multiplication.
The invention finally disassembles the input data x into the fitting part x through the shifting unit and the splitting unit1And the non-fitting part x2And respectively matching the fitting part x with the fitting operation circuit and the function value mapping circuit1And the non-fitting part x2Processing to obtain a first operation result f (x)1) And a second operation result f (x)2) And based on the first operation result f (x)1) And a second operation result f (x)2) The function fit values for the particular function are restored. Therefore, through the processing process, the fitting operation circuit which is only configured with the minimum specific fitting interval is matched with the function value mapping circuit to replace the fitting operation circuit which is configured with the maximum fitting interval, so that the number of fitting parameters is reduced, and the expenditure of storage resources is reduced.
Preferably, the data processing apparatus further comprises a first multiplexer, and the first multiplexer comprises an output terminal and at least two input terminals. One input end of the first multiplexer is connected with the judging unit, the other input end of the first multiplexer is connected with the splitting unit, and the output end of the first multiplexer is connected with the fitting operation circuit. The first multiplexer is used for obtaining the input in a specific fitting intervalData x and/or fitting part x1And selects one to send to the fitting operation circuit. By arranging the first multiplexer, when the fitting operation circuit performs streamlined fitting operation, operation errors caused by the fact that the fitting operation circuit receives a plurality of data at the same time can be avoided, and the stability of the device is improved.
Preferably, the data processing apparatus further comprises a second multiplexer, and the second multiplexer includes an output terminal and at least two input terminals. One input end of the second multiplexer is connected with the function value mapping circuit, the other input end of the second multiplexer receives the fixed value, and the output end of the second multiplexer is connected with the multiplier. The second multiplexer is used for obtaining a second operation result f (x)2) And/or fixed value, and alternatively sent to the multiplier. By arranging a second multiplexer for selectively sending a second operation result f (x) to the multiplier2) Or a fixed value, corresponding to the two inputs received by the multiplier.
To achieve the above object, according to a third aspect of the present invention, there is provided a computer-readable storage medium having stored thereon program code, which when executed by a processor, implements the steps of the data processing method in the first aspect described above.
To achieve the above object, according to a fourth aspect of the present invention, there is provided a processor including the data processing apparatus of the second aspect.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flow chart of a data processing method according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present invention;
FIG. 3 is a table of fitting parameters provided by an embodiment of the present invention;
FIG. 4 is another table of fitting parameters provided by an embodiment of the present invention;
FIG. 5 is a mapping table provided by an embodiment of the present invention;
FIG. 6 is another table of fitting parameters provided by embodiments of the present invention;
FIG. 7 is another mapping table provided by embodiments of the present invention;
fig. 8 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," and the like in the description and in the claims, and in the drawings, are used for distinguishing between different objects and not necessarily for describing a particular sequential order. The term "at least one" means one or more than one, and the term "plurality" means two or more than two, unless specifically limited otherwise. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus. It should be noted that when an element is referred to as being "coupled" or "connected" to another element or elements, it can be directly connected or indirectly connected to the other element or elements.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Fig. 1 is a schematic flow chart of a data processing method according to an embodiment of the present invention. Specifically, the method comprises the following steps.
Step S1, input data x is acquired. The input data x is a standardized floating-point number comprising a significand, an exponent and a sign. In a preferred embodiment of the present invention, the input data x may be an IEEE-754 floating-point number.
And step S2, judging whether the input data x is in a specific fitting interval according to the effective number, the exponent and the sign of the input data x. If the input data x is within the specific fitting interval, performing step S3; if the input data x is outside the specific fitting interval, step S4 is executed.
And step S3, using the fitting operation circuit to call the fitting parameters corresponding to the specific fitting interval to perform fitting operation on the input data x to obtain a fitting operation result.
In step S4, the input data x is shifted to obtain shifted data x'. The shift processing includes obtaining an exponent t of the shift data x ', where t is an integer, then calculating a difference between the exponent t and the input data x, and then shifting the significant digit of the input data x based on the difference to obtain the significant digit of the shift data x'. Specifically, the index t of the shift data x' may be subtracted from the index of the input data x to obtain a difference, and if the difference is greater than zero, the significant number of the input data x is shifted to the left, where the number of bits shifted to the left is equal to the difference; and if the difference is less than zero, right shifting the effective number of the input data x, wherein the right-shifted digit is equal to the difference. The index t of the shift data x' can be subtracted by the index of the input data x to obtain a difference value, if the difference value is smaller than zero, the effective number of the input data x is shifted to the left, and the number of bits shifted to the left is equal to the difference value; if the difference is greater than zero, the significant digits of the input data x are right-shifted by a number of bits equal to the difference.
Step S5, splitting the shift data x' to obtain a fitting part x1And a non-fitting part x2Fitting part x1And the non-fitting part x2Is equal to the shift data x'. Wherein, the fitting part x1Is equal to the fractional part of the significant number of the shift data x' plus the integer r, the fitting section x1Is positioned in a specific fitting interval; non-fitting part x2Is equal to the integer part of the significand of the shift data x' minus the integer r. In a preferred embodiment of the invention, r is equal to 1.
Step S6, fitting part x1And a non-fitting part x2Respectively processing the first and second images to obtain a first operation result f (x)1) And a second operation result f (x)2). Specifically, a fitting operation circuit calls a fitting parameter pair fitting unit x1Performing fitting operation to obtain a first operation result f (x)1) (ii) a Using a function value mapping circuit to non-fit the part x2Searching a mapping table for the index to finally obtain a non-fitting part x2Corresponding second operation result f (x)2). Wherein the mapping table comprises a non-fitting part x2And a non-fitting part x2Corresponding second operation result f (x)2)。
Step S7, obtaining the first operation result f (x) using the multiplier1) And a second operation result f (x)2) The product of (a).
Step S8: the result of the fitting operation in step S3 or the product in step S7 is output as the final operation result.
Prior art techniques tend to configure a larger interval as the fitting interval, e.g., for function 2 in an IEEE-754 single precision floating point number systemxThe fitting is performed since the maximum value that can be represented by the IEEE-754 single precision floating point number is 2127Therefore, the fitting interval is often configured to [ -127,127 [ -127 [ ]]In order to ensure the accuracy requirement of the fitting, the fitting interval is usually divided into a plurality of sub-regionsAnd (3) removing the solvent. If a sub-interval is divided every 0.1, then the fitting interval [ -127,127 ] is]The method can be divided into 2540 sub-intervals, so that 2540 groups of fitting parameters are theoretically needed to realize the fitting of the function, and the occupation of storage resources is extremely large. In the present invention, however, the function 2 is processedxThe fitting operation is performed by only setting the fitting interval to [ -2,2]In the same manner for [ -2,2]The division is carried out, 40 subintervals are known in total, so that only 40 groups of fitting parameters are needed to complete 2x 1In [ -2,2 [)]After that, the non-fitting part x is mapped by a function value mapping circuit2Lookup mapping table for index to get 2x 2And multiplying the two to obtain 2x 1 +x2, i.e. restoring the input data x at [ -127,127 [ -127]The function fitting value of (1).
From the perspective of storage resources, the storage resource overhead of about 2500 sets of fitting parameters is saved. In a system with a high requirement on the fitting accuracy, the subinterval division interval is usually set at 0.1 or less; when 0.1 is used as the common minimum subinterval standard, the invention saves at least two orders of magnitude of interval compared with the prior art, so the invention has considerable saving on storage resources. If the fitting parameters are not stored by using the storage resources but are solidified in the circuit, compared with the condition that more than 2500 sets of fitting parameters need to be solidified in the prior art, the method can greatly reduce the area and the power consumption of the circuit.
In addition, in order to call the corresponding fitting parameters to perform the fitting operation, it is necessary to determine which subinterval the input data x is located in, and therefore, the prior art theoretically needs log22540 gates (Gate) to make subinterval decisions, whereas the present invention requires only log240 gates. Therefore, the circuit area of the invention is obviously smaller than that of the prior art. Meanwhile, in the fitting calculation of the hydration, the invention uses less gate circuits for judgment, and the circuit is delayed (namely the fitting part x)1The time to match the corresponding fitting parameters) is significantly lower than in the prior art.
Due to the pre-stored second operation result f (x) in the mapping table2) Very close to the true value, soThe invention uses the second operation result f (x)2) Restoring the function fitting value of the input data x has the advantage of high fitting accuracy.
In some embodiments of the present invention, the specific fitting interval may be set to [ -2 ]t+n,2t+m]And m and n are positive integers. In some other embodiments of the present invention, a plurality of specific fitting intervals may be set, for example, the specific fitting interval may be set to [ -2 [ ]t+n,-2t-p]U[2t-q,2t+m]And p and q are both non-negative integers. In a preferred embodiment of the present invention, m and n are generally taken to be 1, and p and q are taken to be 0. In some embodiments of the present invention, the specific fitting interval may also be configured as an open interval or a half-open and half-closed interval.
For example, when the exponent t of the shift data x' is equal to 2, the specific fitting interval may be set to [ -8,8], (-8,8], [ -8,8), (-8,8), and so on. The specific fitting interval can also be set to [ -8, -4] U [4,8], (-8, -4) U (4,8), (-8, -4] U [4,8), etc., and will not be described herein. In a preferred embodiment of the present invention, the specific fitting interval includes a plurality of sub-intervals, and each of the sub-intervals corresponds to a set of fitting parameters.
In a preferred embodiment of the present invention, the non-fitting part x in the mapping table is a non-fitting part2Forming at least one series of equal difference numbers with a tolerance of 2t. It should be noted that the tolerance is equal to 2tOr is equal to-2tDepending on how the first and last terms of the arithmetic progression are defined. Therefore, the tolerance is equal to-2tThe arithmetic progression of (a) should be regarded as the same technical solution as the present invention.
For example, when the exponent t of the shift data x' is equal to 2, the non-fitting part x in the mapping table2The arithmetic sequence is composed of equal difference numbers of { …, -8, -4,0,4,8, … }, and the last item and the first item of the equal difference number sequence can be determined according to the maximum value and the minimum value which can be expressed by the system. For example, a single precision floating point number may represent a maximum of 2127If the mapping table indicates exDue to the mapping of e88Has exceeded 2127In combination with the above specified fit interval [ -8,8 [ ]]To achieve the maximum value that can be fitted to e88The last term of the arithmetic progression should be 80, and similarly, the first term of the arithmetic progression should be-80.
Fig. 2 is a schematic structural diagram of a data processing apparatus 200 according to an embodiment of the present invention. The data processing apparatus 200 includes: the device comprises a judging unit 210, a shifting unit 220, a splitting unit 230, a function value mapping circuit 240, a fitting operation circuit 250, a multiplier 260, a first multiplexer 270 and a second multiplexer 280.
The judging unit 210 is connected with the shifting unit 220; the shift unit 220 is connected with the split unit 230; the splitting unit 230 is connected with the function value mapping circuit 240; one input end of the first multiplexer 270 is connected to the determining unit 210, the other input end is connected to the splitting unit 230, and the output end of the first multiplexer 270 is connected to the fitting operation circuit 250; one input terminal of the second multiplexer 280 is connected to the function value mapping circuit 240, the other input terminal thereof receives the fixed value 1, and the output terminal thereof is connected to the multiplier 260; the multiplier 260 is also connected to the fitting operation circuit 250.
The determining unit 210 is configured to receive the input data x, and determine whether the input data x is located in a specific fitting interval according to the significant number, the exponent, and the sign of the input data x. If the input data x is located in the specific fitting interval, the determining unit 210 sends the input data x to the first multiplexer 270; if the input data x is outside the specific fitting interval, the determining unit 210 sends the input data x to the shifting unit 220.
The shifting unit 220 is configured to perform shifting processing on the input data x to obtain shifting data x ', and send the shifting data x' to the splitting unit 230.
The splitting unit 230 is configured to split the shift data x' into fitting parts x1And a non-fitting part x2Fitting part x1And the non-fitting part x2Is equal to the shift data x'. Then fitting the part x1Sends it to the first multiplexer 270 and sends the non-fitting part x2To the function value mapping circuit 240.
The function value mapping circuit 240 is used for using the non-fitting part x2Look up mapping table for index, and finally getNon-fitting part x2Corresponding second operation result f (x)2) And the second operation result f (x)2) To the second multiplexer 280.
The first multiplexer 270 is used to receive the input data x and/or fitting part x within a specific fitting interval1One of which is sent to the fitting operation circuit 250.
The fitting operation circuit 250 is configured to receive input data x located in a specific fitting interval and perform fitting operation to obtain a fitting operation result; the fitting operation circuit 250 is also used for receiving the fitting part x1Performing fitting operation to obtain a first operation result f (x)1). In a preferred embodiment of the present invention, the fitting operation circuit includes a multiplier and an adder, and the polynomial fitting operation is performed using the combination of the multiplier and the adder. In other embodiments, a multiplier-adder may be used instead of a multiplier and an adder to perform polynomial operations. In a preferred embodiment, the polynomial fitting operation is a binomial fitting operation, but the degree of the fitting operation is not particularly limited in the present invention.
The second multiplexer 280 is used for receiving the second operation result f (x)2) And/or a fixed value of 1 to the multiplier 260. It should be apparent that the fixed value may be either floating point or integer.
The multiplier 260 is configured to receive the fixed value and the fitting operation result, and multiply the fixed value and the fitting operation result; the multiplier 260 is further used for receiving the first operation result f (x)1) And a second operation result f (x)2) And multiplies the two.
The logic circuits selected to transfer the data from multiple data channels to a single common channel to perform the data selection function can all be considered as simple replacements for multiplexers (multiplexers). For example, a data selector, a multiplexer, or the like may be used in place of the multiplexer.
For ease of understanding, the data processing process is described below with the data processing apparatus 200 in conjunction with specific functions and input data.
Providing a function for fittingIs exSetting the specific fitting interval to [ -8,8 [ -8 [ ]]The specific fitting interval is divided into a plurality of sub-intervals, and each sub-interval corresponds to a group of fitting parameters. Please refer to fig. 3, which illustrates some fitting parameters provided in this embodiment.
An IEEE-754 floating-point number 8 is provided as input data, with a significand of 1, an exponent of 3, and a positive sign, which may be expressed as 1 x 23(represented in binary).
The determining unit 210 receives the input data 8, determines that it is located in the specific fitting region [ -8,8], and sends it to the first multiplexer 270, and the first multiplexer 270 sends it to the fitting operation circuit 250.
The fitting operation circuit 250 receives the input data 8 and determines that it is in the sub-interval [6, 8] of the specific fitting interval]And calling the fitting parameters a, b and c to perform binomial fitting operation on the parameters to obtain a fitting operation result. Wherein the fitting parameter a is 1400, the fitting parameter b is-19400, the fitting parameter c is 68800, and the formula for performing the binomial fitting operation is ax2+ bx + c, therefore, the result of the fitting operation is 3200. It should be understood that to ensure the accuracy of the fitting operation, the fitting parameters need to be iterated or debugged many times. The present embodiment shows trial fitting parameters for demonstration for the purpose of illustrating the fitting operation process, which should not be understood as fitting parameters in the optimal situation when the present invention is actually used.
The multiplier 260 obtains the result of the fitting operation, obtains a fixed value (equal to 1) from the second multiplexer 280, and multiplies the result by the fixed value to obtain the product of the two, which is the final operation result. In other embodiments of the present invention, the fitting operation result may be directly output.
In another embodiment of the invention, a function e is provided for fittingxSetting a specific fitting interval to be [ -8,8), wherein the specific fitting interval is divided into a plurality of sub-intervals, and each sub-interval corresponds to a set of fitting parameters. Please refer to fig. 4, which illustrates some fitting parameters provided in this embodiment.
An IEEE-754 floating-point number 8 is provided as input data, having a significand of 1 and an exponentIs 3, has a positive sign and can be expressed as 1 x 23(represented in binary).
The determining unit 210 receives the input data 8, determines that it is not located in the specific fitting region [ -8,8), and sends it to the shifting unit 220.
The shift unit 220 shifts the input data 8 to obtain shifted data. Specifically, the exponent of the shift data may be set to 2. First, the exponent of the input data is subtracted by the exponent of the shifted data to obtain a difference value of 1, and then the significant digit of the input data is shifted left by 1 bit to obtain the significant digit of the shifted data. Thus, the shift data may be represented as 10 x 22(represented in binary).
The splitting unit 230 acquires the shift data and splits the shift data into a fitting part and a non-fitting part. Specifically, the decimal part (equal to 0) of the significant digit of the shift data is added by 1 as the significant digit of the fitting section. Thus, the fit may be denoted as 1 x 22(expressed in binary, relative to 4 in decimal). The integer part of the significant number of the shift data is reduced by 1 to be the significant number of the non-fitting portion. Thus, the non-fit portion may be denoted as 1 x 22(expressed in binary, relative to 4 in decimal).
The splitting unit 230 sends the fitting part to the fitting operation circuit 250 through the first multiplexer 270, and the fitting operation circuit judges that the fitting part is located in the subinterval [4,6 ] of the specific fitting interval, and calls the fitting parameter to perform fitting operation on the subinterval to obtain a first operation result. Where the fitting parameter a equals 32, the fitting parameter b equals-202, and the fitting parameter c equals 350. The formula for performing the binomial fitting operation is ax2+ bx + c, therefore, the first operation result is 54. It should be understood that to ensure the accuracy of the fitting operation, the fitting parameters need to be iterated or debugged many times. The fitting parameters shown in the embodiment are only for exemplary illustration of the fitting operation process, and trial fitting parameters for demonstration are given, and should not be understood as fitting parameters in the optimal situation when the invention is actually used.
The splitting unit 230 further sends the non-fitting part to the function value mapping circuit 240, and the function value mapping circuit 240 searches the mapping table with the non-fitting part as an index, so as to obtain a corresponding second operation result of 54.6. Fig. 5 is a mapping table according to an embodiment of the present invention. The non-fitting part in the mapping table forms an arithmetic progression with a first term of 0, a last term of 80 and a tolerance of 4. In other embodiments, the mapping table may omit sets of data or add sets of data.
The second multiplexer 280 obtains the second operation result and sends it to the multiplier 260, and the multiplier 260 also obtains the first operation result and multiplies the two to obtain a product 2948.4 as a final operation result.
In another embodiment of the invention, the function provided for fitting is 2xThe specific fitting interval is set to (-2, -1) U (1, 2). The specific fitting interval is divided into a plurality of sub-intervals, and each sub-interval corresponds to a group of fitting parameters. Please refer to fig. 6, which illustrates some fitting parameters provided in this embodiment.
Provide input data equal to-4.5 with a significant figure of 1.001, an exponent of 2, a sign of negative, which can be expressed as-1.001 x 22(represented in binary).
The determining unit 210 receives the input data, determines that the input data is located outside the specific fitting interval (-2, -1) U (1,2), and sends the input data to the shifting unit 220. The shift unit 220 shifts the data to obtain shifted data. Specifically, the exponent of the shift data may be set to 0. First, the exponent of the shift data is subtracted from the exponent of the input data to obtain a difference of 2, and then the significant figure of the input data is left-shifted by 2 as the significant figure of the shift data. Thus, the shifted data may be represented as-100.1 x 20(represented in binary).
The splitting unit 230 obtains the shift data and splits the shift data into a fitting part and a non-fitting part. Specifically, the fitting part is obtained by adding 1 to the decimal part of the significant digit of the shift data, and therefore, the fitting part can be represented as-1.1 × 20(expressed in binary, corresponding to-1.5 in decimal). The integer part of the significant digit of the shifted data is reduced by 1 as the non-fit, and thus the non-fit can be expressed as-11 x 20(expressed in binary, corresponding to decimal)Manufactured-3).
The fitting operation circuit 250 obtains the fitting part through the first multiplexer 270, determines that the fitting part is located in the subinterval [ -1.5, -1) of the specific fitting interval, and calls the fitting parameters to perform fitting operation on the fitting part to obtain a first operation result. Wherein the fitting parameter a is equal to 0.2, the fitting parameter b is equal to 0.5, the fitting parameter c is equal to 0.7, and the formula for performing the binomial fitting operation is ax2+ bx + c, therefore, the first operation result is 0.4. It should be understood that to ensure the accuracy of the fitting operation, the fitting parameters need to be iterated or debugged many times. The fitting parameters shown in the embodiment are only for exemplary illustration of the fitting operation process, and trial fitting parameters for demonstration are given, and should not be understood as fitting parameters in the optimal situation when the invention is actually used.
The function value mapping circuit 240 receives the non-fitting portion, and uses the non-fitting portion as an index to search the mapping table, so as to finally obtain a second operation result equal to 0.125 corresponding to the non-fitting portion. Please refer to fig. 7 for the relationship between the non-fitting part and the corresponding second operation result stored in the mapping table. The non-fitting part in the mapping table forms an arithmetic progression with a first term of-1, a last term of-86 and a tolerance of-1. In other embodiments, the mapping table may omit sets of data or add sets of data.
The multiplier 260 obtains the first operation result from the fitting operation circuit 250 and obtains the second operation result from the function value mapping circuit 240 through the second multiplexer 280. The multiplier 260 multiplies the obtained first operation result and the second operation result, and takes the product of the two as a final operation result, which is equal to 0.05.
It is obvious that the index of shift data is not limited to 2 or 0 shown above, but may be adjusted according to actual implementation. Similarly, the selection of the specific fitting interval is not limited to the above-mentioned case, but may be determined according to the index of the shift data, and the manner of determining the specific fitting interval is described in detail above, and is not described herein again. The function to be fitted is not limited to e shown in the above embodimentsxOr 2x. In other embodiments, the function to be fitted may be any exponential function.
The fit parameters and the sub-intervals shown in the fit parameter table are merely exemplary data, and are not to be construed as a specific definition of the fit parameters or the respective fit sub-intervals according to the present invention. The range of the fitting parameters or subintervals may be adjusted as required for fitting accuracy. Similarly, the non-fitting part and the second operation result in the mapping table are also exemplary data.
Fig. 8 is a schematic structural diagram of a data processing apparatus 800 according to an embodiment of the present invention. The data processing device 800 as shown in fig. 8 includes one or more processors 810, a communication interface 820, and a memory 830. The processor 810, the communication interface 820 and the memory 830 may be connected by a bus, or may communicate by other means such as wireless transmission. The embodiment of the present invention is exemplified by connection via the bus 840. The memory 830 is used for program codes, and the processor 810 is provided with the data processing apparatus disclosed in the foregoing embodiments, and is used for executing the program codes stored in the memory 830, and when the program codes are executed by the processor 810, the steps of the data processing method disclosed in the foregoing embodiments are implemented.
It should be understood that in the embodiments of the present invention, the Processor 810 may be a Central Processing Unit (CPU), and the Processor may be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The communication interface 820 may be a wired interface (e.g., an ethernet interface) or a wireless interface (e.g., a cellular network interface or using a wireless local area network interface) for communicating with other modules or equipment devices. For example, the communication interface 820 in the embodiment of the present application may be specifically configured to receive input data input by a user; or receive data from an external device, etc.
Memory 830 may include Volatile Memory (Volatile Memory), such as Random Access Memory (RAM); the Memory may also include a Non-volatile Memory (Non-volatile Memory), such as a Read-Only Memory (ROM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, HDD), or a Solid-State Drive (SSD); the memory may also comprise a combination of memories of the kind described above.
It should be noted that fig. 8 is only one possible implementation manner of the embodiment of the present invention, and in practical applications, the data processing apparatus may further include more or less components, which is not limited herein. For the content that is not shown or described in the embodiment of the present invention, reference may be made to the relevant explanation in the foregoing method embodiment, which is not described herein again.
Those of ordinary skill in the art will appreciate that the elements and steps of the various examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the various examples have been described above generally in terms of their functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the terminal device and the unit described above may refer to corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed terminal device and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may also be an electric, mechanical or other form of connection.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment of the present invention.
In addition, each functional unit in the embodiments of the present invention may be integrated into one data processing device, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (10)

1. A data processing method is applied to a neural network and provides a multiplier, a fitting operation circuit and a function value mapping circuit, wherein the fitting operation circuit is used for calling fitting parameters to perform fitting operation on data, and the function value mapping circuit is used for matching corresponding numerical values according to indexes; providing at least one specific fitting interval in a specific function definition domain, wherein the specific fitting interval corresponds to at least one set of fitting parameters; providing input data x, wherein the input data x is a standardized floating point number, and the input data x comprises a significant number, an exponent and a sign, and wherein the fitting operation circuit only processes data within the specific fitting interval;
the data processing method comprises the following steps:
step S10, acquiring the input data x, and judging whether the input data x is positioned in the specific fitting interval according to the effective number, the index and the symbol of the input data x;
if the input data x is located in the specific fitting interval, performing fitting operation on the input data x by using the fitting operation circuit to obtain a fitting operation result, and obtaining a final operation result based on the fitting operation result;
if the input data x is located outside the specific fitting interval, skipping the step of directly calling the fitting operation circuit to process the input data x, and directly executing the step S20;
step S20, carrying out shift processing on the input data x to obtain shift data x'; the shift processing includes obtaining an exponent t of the shift data x', where t is an integer, and then calculating a difference between the exponent t and the exponent of the input data x; then, shifting the effective number of the input data x based on the difference value to obtain the effective number of the shifted data x';
step S30, obtaining fitting part x based on the shift data x1And a non-fitting part x2The fitting part x1And the non-fitting part x2Is equal to the shift data x'; wherein the fitting part x1Is equal to the fractional part of the significant number of the shift data x' plus an integer r, the fitting section x1Is located within the particular fitting interval; the non-fitting part x2Is equal to the integer part of the significand of the shifted data x' minus the integer r;
step S40, fitting the fitting part x by using the fitting operation circuit1Performing fitting operation to obtain a first operation result f (x)1);
Using the function value mapping circuit to map the non-fitting part x2Searching the mapping table for the index to obtain a second operation result f (x)2) (ii) a The mapping table includes the non-fitting part x2And the non-fitting part x2Corresponding second operation result f (x)2);
Step S50, using the multiplier to receive the first operation result f (x)1) And the second operation result f (x)2) And performing multiplication to obtain a final operation result.
2. The data processing method of claim 1, wherein the particular fitting interval comprises [ -2 ]t+n,2t +m]And n and m are positive integers.
3. The data processing method of claim 2, wherein the specific fitting interval comprises a first fitting interval and a second fitting interval, the first fitting interval comprising [ -2 ]t+n,-2t-p]The second fitting interval comprises [2 ]t-q,2t+m]And p and q are both non-negative integers.
4. A data processing method according to claim 3, characterized in that m and n are both equal to 1, and p and q are both equal to 0.
5. The data processing method of claim 1, wherein the non-fitting part x in the mapping table2Comprising at least one arithmetic progression with a tolerance equal to 2t
6. A data processing device provides at least one specific fitting interval in a specific function definition domain, wherein the specific fitting interval corresponds to at least one set of fitting parameters; -providing input data x, said input data x being a normalized floating point number, said input data x comprising significands, exponents and symbols, characterized in that said data processing device comprises:
the judging unit is used for judging whether the input data x is positioned in the specific fitting interval according to the effective number, the index and the sign of the input data x;
the shifting unit is connected with the judging unit and is used for acquiring the input data x outside the specific fitting interval and shifting the input data x to obtain shifted data x';
a splitting unit connected to the shifting unit, the splitting unit being configured to obtain the shifting data x 'and split the shifting data x' into a fitting portion x1And a non-fitting part x2The fitting part x1And the non-fitting part x2Is equal to the shift data x';
a function value mapping circuit connected to the splitting unit for obtaining the non-fitting part x2And by the non-fitting part x2Searching a mapping table for the index to finally obtain the non-fitting part x2Corresponding second operation result f (x)2) (ii) a The mapping table includes the non-fitting part x2And the non-fitting part x2Corresponding second operation result f (x)2);
The fitting operation circuit is used for receiving the input data x positioned in the specific fitting interval and calling the fitting parameters to perform fitting operation on the input data x to obtain a fitting operation result; the fitting arithmetic circuit is also used for receiving the fitting part x1And calling the fitting parameters to the fitting part x1Performing fitting operation to obtain a first operation result f (x)1);
The multiplier is connected with the fitting operation circuit; the multiplier is used for receiving the fitting operation result and a fixed numerical value, wherein the fixed numerical value is equal to 1, and multiplying the fitting operation result and the fixed numerical value; the multiplier is also used for receiving the first operation result f (x)1) And the second operation result f (x)2) And the first operation result f (x)1) And the second operation result f (x)2) Multiplication.
7. The data processing apparatus according to claim 6, further comprising a first multiplexer, the first multiplexer comprising an output and at least two inputs, one of the inputs of the first multiplexer being connected to the determining unit, the other input of the first multiplexer being connected to the splitting unit, the output of the first multiplexer being connected to the fitting operation circuit; the first multiplexer is used for obtaining the fitting part x through the input end thereof1And/or the input data x positioned in the specific fitting interval, and selecting one of the input data x to be sent to the fitting operation circuit.
8. A data processing device as claimed in claim 6, characterized in that the data processing device further comprises a second multiplexer, the second multiplexer comprising an output and at least two inputs, the inputs of the second multiplexer being connected to the function value mapping circuit, another input of the second multiplexer receiving the fixed value, the second multiplexer being arranged to receive the fixed value from the input of the second multiplexer, the first multiplexer being arranged to receive the fixed value from the input of the second multiplexerThe output end of the modulator is connected with the multiplier, and the second multiplexer is used for obtaining the second operation result f (x) through the input end of the second multiplexer2) And/or the fixed value, and alternatively sent to the multiplier.
9. A computer-readable storage medium, characterized in that the computer-readable storage medium stores program code which, when executed by a processor, implements the steps of the data processing method according to any one of claims 1 to 5.
10. A processor, characterized in that it comprises a data processing device according to any one of claims 6 to 8.
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