CN110796247B - Data processing method, device, processor and computer readable storage medium - Google Patents
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Abstract
The invention discloses a data processing method, a data processing device, a processor and a computer readable storage medium. The invention adopts the cooperation of the function value mapping circuit and the fitting operation circuit to quickly and efficiently process data so as to meet the requirement of the neural network on the nonlinearity, thereby improving the approximation capability of the neural network on the complex function. Compared with the mode that only the fitting operation circuit is adopted to carry out the full-interval fitting operation to fit the function value of the specific function in the prior art, the method and the device not only can reduce the consumption of the fitting parameters so as to reduce the expenditure of hardware resources, but also can reduce the time for the fitting operation circuit to match the fitting parameters so as to accelerate the data processing speed of the data processing device.
Description
Technical Field
The present invention relates to the field of neural networks, and in particular, to a data processing method, apparatus, processor, and computer-readable storage medium.
Background
In the deep learning application scenario of neural networks, we express complex relationships between inputs and outputs with neural networks. In the mathematical language, an artificial neural network is used to implement complex functions. The neural network is composed of a plurality of layers of neurons, each neuron is provided with an activation function, the neurons can simultaneously receive a plurality of inputs and unify the inputs, then the inputs and the outputs are output after the activation functions are used for processing, a certain mapping relation exists between the inputs and the outputs, if the activation functions in each neuron are linear functions, the mapping relation between the inputs and the outputs is linear, the neural network only outputs the plurality of inputs after linear combination, namely the neural network lacks nonlinearity, and the approximation capability of complex functions is very limited.
In order to make the neural network more powerful for the expression capability of complex functions, a nonlinear activation function needs to be introduced for the construction of the neural network. Introducing a non-linear function for the neural network is equivalent to fitting a function value of the non-linear function. Generally speaking, the function value of the fitting nonlinear function in the prior art is generally calculated by using a general-purpose processor, and the efficiency is low. Even if a special fitting circuit is adopted, the required fitting interval is huge, the related fitting parameters are numerous, the storage resource overhead is high, the circuit area is large, and meanwhile, the data processing speed of the circuit is difficult to meet the requirements of a neural network.
Disclosure of Invention
Aiming at the problems, in order to meet the requirement of the neural network on the nonlinearity, a scheme of combining a special circuit with a fitting operation circuit only configured with a specific fitting interval is used for replacing a scheme of configuring the fitting operation circuit in a whole interval, a whole set of solution measures for improving the data processing capability of the neural network are provided, and the expenditure of hardware resources is obviously reduced.
To achieve the above object, according to a first aspect of the present invention, there is provided a data processing method applied to a neural network. Providing a multiplier, a fitting operation circuit and a function value mapping circuit, wherein the fitting operation circuit is used for calling fitting parameters to perform fitting operation on data; the function value mapping circuit is used for matching corresponding numerical values according to the indexes. Meanwhile, at least one specific fitting interval in a specific function definition domain is provided, the specific fitting interval only comprises nonnegative numbers, the specific fitting interval corresponds to at least one group of fitting parameters, and the fitting operation circuit only processes data in the specific fitting interval; and provides input data x, the input data x being a normalized floating point number, the input data x including significands, exponents and symbols. The data processing method provided by the invention comprises the following steps:
and step S10, acquiring the input data x, and solidifying the sign of the input data x to be positive to obtain the absolute value | x | of the input data x.
Step S20, judging whether the absolute value | x | is in a specific fitting interval;
if the absolute value | x | is located in the specific fitting interval, fitting operation is carried out on the absolute value | x | by using a fitting operation circuit to obtain a fitting operation result, and a final operation result is obtained based on the fitting operation result;
if the absolute value | x | is outside the specific fitting interval, the step of directly calling the fitting operation circuit to process the absolute value | x | is skipped, and step S30 is performed.
In step S30, the absolute value | x | is shifted to obtain shifted data x'. The shift processing includes taking an exponent of the input data x as an exponent of the absolute value | x |, obtaining an exponent t of the shift data x ', t being an integer, then calculating a difference between the exponent of the absolute value | x | and the exponent t, and then shifting the significant digit of the absolute value | x | based on the difference to obtain the significant digit of the shift data x'.
Step S40, obtaining fitting part x based on shift data x1And a non-fitting part x2Fitting part x1And the non-fitting part x2Is equal to the shift data x'. Wherein, the fitting part x1Is equal to the fractional part of the significant number of the shift data x' plus r, the fitting section x1Is positioned in a specific fitting interval; non-fitting part x2Is equal to the integer part of the significand of the shift data x' minus r.
Step S50, fitting the fitting part x by using the fitting arithmetic circuit1Performing fitting operation to obtain a first operation result f (x)1)；
Using a function value mapping circuit to non-fit the part x2Searching the mapping table for the index, and obtaining a corresponding second operation result f (x)2) (ii) a The mapping table includes a non-fitting part x2And a non-fitting part x2Corresponding second operation result f (x)2)。
Step S60, using the multiplier to receive the first operation result f (x)1) And a second operation result f (x)2) And performing multiplication to obtain a first product, and obtaining a final operation result based on the first product.
The present invention decomposes input data x into fitting parts x1And a non-fitting part x2And respectively aligning the fitting parts x through different circuits1And a non-fitting part x2And (6) processing. Specifically, the fitting operation circuit is used to fit the fitting part x1Performing fitting operation to obtain a first operation result f (x)1) (ii) a And a non-fitting part x is formed by a function value mapping circuit2Searching the mapping table for the index to obtain a second operation result f (x)2) Then based on the first operation result f (x)1) And a second operation result f (x)2) And restoring the function fitting value of the specific function. Compared with the closest prior artAccording to the specific implementation scheme for fitting by using the fitting operation circuit covering the whole interval, the function value mapping circuit is matched with the fitting operation circuit only provided with the extremely small specific fitting interval, and the fitting operation circuit provided with the high-power-consumption multi-component whole-interval fitting interval is replaced, so that the number of fitting parameters is greatly reduced, and the expenditure of hardware resources, particularly storage resources, is reduced. Meanwhile, compared with the prior art, the fitting operation circuit only provided with the minimum specific fitting interval has fewer fitting parameters, so that the time for selecting and matching the fitting parameters when the fitting operation circuit calls the fitting parameters can be shortened, the data processing speed is integrally improved, the data processing method is particularly applied to a neural network, and particularly when the data processing method is used for approximating the function value of a specific function by the neural network, the requirement of the neural network on the nonlinearity is met, and the approximation capability of the neural network on the complex function is further improved.
Preferably, the present invention also provides a reciprocal operator. In the step S20, if the sign of the input data x is negative, performing reciprocal operation on the fitting operation result by using a reciprocal operator to obtain a final operation result; and if the sign of the input data x is positive, taking the fitting operation result as a final operation result. In order to further save hardware overhead while finishing data processing, the fitting operation circuit only configured with a non-negative interval performs fitting operation on the absolute value of the negative number and performs reciprocal operation on the fitting operation result in cooperation with a reciprocal operator, so as to replace the fitting operation circuit configured with a positive interval and a negative interval to perform fitting operation on the negative number, thereby reducing nearly half of fitting parameters. On the hardware level, approximately half of storage resources for storing the fitting parameters are reduced by adding a reciprocal operator; on the logic level, the time for matching the fitting parameters by the fitting operation circuit is shortened by adding a reciprocal operation, so that the data processing speed of the data processing method is increased.
Preferably, the present invention also provides a reciprocal operator. In step S60, if the sign of the input data x is negative, the reciprocal operator receives the first product and performs a reciprocal operation to obtain a final operation result; if the sign of the input data x is positive, the first product is used as the final operation result. In order to save hardware cost and further simplify operation logic and wiring, the fitting operation circuit only configured with a non-negative interval carries out fitting operation on the absolute value of the negative number and is matched with the reciprocal operator to carry out reciprocal operation on the first product, so that the fitting operation circuit configured with the positive interval and the negative interval is replaced to carry out fitting operation on the negative number, and approximately half of fitting parameters are reduced. On the hardware level, approximately half of storage resources for storing the fitting parameters are reduced by adding a reciprocal operator; on the logic level, the time for matching the fitting parameters by the fitting operation circuit is shortened by adding a reciprocal operation, so that the data processing speed of the data processing method is increased.
Preferably, the specific fitting interval includes [0, 2]t+m]And m is a positive integer. In a preferred embodiment, r is 1. Therefore, the fitting part x is formed1The fitting part x is constructed in a manner that1Is less than 2, and at the same time, the fitting part x1Has an index of t, fitting part x1The sign of (1) is positive. Therefore, in the binary neural network processing system preferred in the present invention, the fitting unit x holds m as a positive integer1Must lie within a particular fit interval 0,2t+m]So that the fitting part x is not required1The fitting operation can be carried out by carrying out additional processing, so that the data processing speed of the method is further improved, and only a specific fitting interval [0, 2] needs to be storedt+m]And the corresponding fitting parameters reduce the expense of storage resources.
More preferably, the specific fitting interval includes [ 2]t-n,2t+m]And n is a non-negative integer. By the fitting part x1The fitting part x is constructed in a manner that1Is greater than 1, and at the same time, the fitting part x1Has an index of t, fitting part x1The sign of (1) is positive. Therefore, on the premise that n is kept to be a non-negative integer in the binary neural network processing system preferred by the invention, the fitting part x1Must lie within a particular fit interval[2t-n,2t+m]Thereby further reducing the number of fitting parameters to reduce the overhead of memory resources.
More preferably, m is equal to 1 and n is equal to 0. In the guarantee fitting part x1On the premise of being located in the specific fitting interval certainly, fixing the specific fitting interval to be most conveniently used [0, 2]t+1]Or [ 2]t,2t+1]Thereby reducing the number of fitting parameters to a locally optimal situation to reduce the overhead of storage resources.
Preferably, the non-fitting part x in the mapping table is2Forming at least one arithmetic series having a tolerance equal to 2t. In the present invention, the mapping table does not need to store every non-fitting part x within a specific function definition domain2But only some specific values have to be stored. By the non-fitting part x2In the construction method of (3), the non-fitting part x2Is an integer, the non-fitting part x2Is t (t is an integer), so the non-fitting part x2Are integers. At the same time, fit the fitting part x1Only one set of tolerance 2 needs to be stored in the mapping tabletThe integer arithmetic progression of (2) can realize the processing of arbitrary input data x. Thus, by reducing the fitting part x in the mapping table2The data storage capacity of (2) can reduce the cost of storage resources and can further reduce the non-fitting part x of the function value mapping circuit2Obtaining a second operation result f (x) for the index lookup mapping table2) Thereby accelerating the data processing speed of the data processing method.
To achieve the above object, according to a second aspect of the present invention, there is provided a data processing apparatus. Providing at least one specific fitting interval corresponding to a specific function, wherein the specific fitting interval only comprises nonnegative numbers and corresponds to at least one group of fitting parameters; and provides input data x, the input data x being a normalized floating point number, the input data x including significands, exponents and symbols. The data processing apparatus provided by the present invention includes:
taking a positive unit, wherein the positive unit is used for receiving input data x transmitted from the outside, and solidifying the sign of the input data x into positive to obtain an absolute value | x |, of the input data x;
the judging unit is connected with the positive taking unit and is used for judging whether the absolute value | x | is positioned in a specific fitting interval or not;
the shifting unit is connected with the judging unit and is used for acquiring an absolute value | x | outside a specific fitting interval and shifting the absolute value | x | to obtain shifting data x';
the splitting unit is connected with the shifting unit and is used for acquiring shifting data x 'and splitting the shifting data x' into a fitting part x1And a non-fitting part x2Fitting part x1And the non-fitting part x2Is equal to the shift data x';
a function value mapping circuit connected with the splitting unit for obtaining the non-fitting part x2And for using the non-fitting part x2Searching a mapping table for the index to finally obtain a non-fitting part x2Corresponding second operation result f (x)2) (ii) a The mapping table includes a non-fitting part x2And a non-fitting part x2Corresponding second operation result f (x)2)；
The fitting operation circuit is used for obtaining an absolute value | x | positioned in a specific fitting interval and calling a fitting parameter to perform fitting operation on the absolute value | x | to obtain a fitting operation result; the fitting arithmetic circuit is also used for obtaining a fitting part x1And calling fitting parameters to the fitting part x1Performing fitting operation to obtain a first operation result f (x)1)；
The multiplier is connected with the fitting operation circuit; the multiplier is used for receiving a first operation result f (x)1) And a second operation result f (x)2) Performing multiplication to obtain a first product; the multiplier is also used for receiving the fitting operation result and multiplying the fitting operation result by a fixed numerical value to obtain a second product, and the fixed numerical value is equal to 1;
and the reciprocal operator is connected with the multiplier and is used for acquiring the first product and/or the second product from the multiplier and performing reciprocal operation.
The invention finally disassembles the input data x into the fitting part x through the shifting unit and the splitting unit1And the non-fitting part x2And respectively matching the fitting part x with the fitting operation circuit and the function value mapping circuit1And the non-fitting part x2Processing to obtain a first operation result f (x)1) And a second operation result f (x)2) And based on the first operation result f (x)1) And a second operation result f (x)2) The function fit values for the particular function are restored. Therefore, through the processing process, the fitting operation circuit which is only configured with the minimum specific fitting interval is matched with the function value mapping circuit to replace the fitting operation circuit which is configured with the maximum fitting interval, so that the number of fitting parameters is reduced, and the expenditure of storage resources is reduced. The invention also solidifies the input data x which is negative number into positive number by setting a positive unit and a reciprocal operator, thereby carrying out fitting operation on a fitting operation circuit only configured with non-negative intervals and indexing in a mapping table only storing positive integers through a function value mapping circuit, and finally obtaining the function fitting value of the input data x through the reciprocal operator based on the first product reduction. On the hardware level, approximately half of storage resources for storing the fitting parameters are reduced by adding a reciprocal operator; on the logic level, the time for matching the fitting parameters by the fitting operation circuit is shortened by adding a reciprocal operation, so that the data processing speed of the data processing device is increased.
Preferably, the data processing apparatus further includes a first multiplexer, the first multiplexer includes an output end and at least two input ends, the input end of the first multiplexer is connected to the determining unit, another input end of the first multiplexer is connected to the splitting unit, and the output end of the first multiplexer is connected to the fitting operation circuit; the first multiplexer is used for obtaining the fitting part x1And/or absolute value | x | in a specific fitting interval, and selecting one to send to the fitting operation circuit. By arranging the first multiplexer, when the fitting operation circuit performs streamlined fitting operation, operation errors caused by the fact that the fitting operation circuit receives a plurality of data at the same time can be avoided, and the assembling is improvedStability of the device.
Preferably, the data processing apparatus further includes a second multiplexer, the second multiplexer includes an output end and at least two input ends, the input end of the second multiplexer is connected to the function value mapping circuit, another input end of the second multiplexer receives the fixed value, and the output end of the second multiplexer is connected to the multiplier; the second multiplexer is used for obtaining a second operation result f (x)2) And/or fixed value, and alternatively sent to the multiplier. By arranging a second multiplexer for selectively sending a second operation result f (x) to the multiplier2) Or a fixed value, corresponding to the two inputs received by the multiplier.
Preferably, the data processing apparatus further comprises a third multiplexer, the third multiplexer comprising an output terminal and at least two input terminals; the input end of the third multiplexer is connected with the multiplier, the input end is used for obtaining the first product and/or the second product as input, the other input end of the third multiplexer is connected with the reciprocal operator, and the input end is used for obtaining the reciprocal of the first product and/or the reciprocal of the second product as input; the third multiplexer is used for selecting one of the inputs and sending the selected input to the output end of the third multiplexer to be used as a final operation result to be output.
To achieve the above object, according to a third aspect of the present invention, there is provided a computer-readable storage medium having stored thereon program code, which when executed by a processor, implements the steps of the data processing method in the first aspect described above.
To achieve the above object, according to a fourth aspect of the present invention, there is provided a processor including the data processing apparatus of the second aspect.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flow chart of a data processing method according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present invention;
FIG. 3 is a table of fitting parameters provided by an embodiment of the present invention;
FIG. 4 is another table of fitting parameters provided by an embodiment of the present invention;
FIG. 5 is a mapping table provided by an embodiment of the present invention;
FIG. 6 is another table of fitting parameters provided by embodiments of the present invention;
FIG. 7 is another mapping table provided by embodiments of the present invention;
fig. 8 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," and the like in the description and in the claims, and in the drawings, are used for distinguishing between different objects and not necessarily for describing a particular sequential order. The term "at least one" means one or more than one, and the term "plurality" means two or more than two, unless specifically limited otherwise. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus. It should be noted that when an element is referred to as being "coupled" or "connected" to another element or elements, it can be directly connected or indirectly connected to the other element or elements.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Fig. 1 is a schematic flow chart of a data processing method according to an embodiment of the present invention. Specifically, the method comprises the following steps.
And step S1, acquiring the input data x and obtaining the absolute value | x | of the input data x. The input data x is a standardized floating-point number comprising a significand, an exponent and a sign. In a preferred embodiment of the present invention, the input data x may be an IEEE-754 floating-point number.
And step 2, judging whether the absolute value | x | is in a specific fitting interval. If the absolute value | x | is within the specific fitting interval, performing step S3; if the absolute value | x | is outside the specific fitting interval, step S4 is performed.
And step S3, calling the fitting parameters corresponding to the specific fitting interval to perform fitting operation on the absolute value | x | to obtain a fitting operation result.
In step S4, the absolute value | x | is shifted to obtain shifted data x'. The shift processing includes taking an exponent of the input data x as an exponent of the absolute value | x |, obtaining an exponent t of the shift data x ', t being an integer, then calculating a difference between the exponent of the absolute value | x | and the exponent t, and then shifting the significant digit of the absolute value | x | based on the difference to obtain the significant digit of the shift data x'. Specifically, the index t of the shift data x' may be subtracted from the index of the absolute value | x | to obtain a difference, and if the difference is greater than zero, the significant number of the absolute value | x | is shifted to the left, where the number of bits shifted to the left is equal to the difference; and if the difference is less than zero, right shifting the effective number of the absolute value | x | by the number of bits equal to the difference. In some other embodiments, the exponent t of the shift data x' may be subtracted by the exponent of the absolute value | x | to obtain a difference, and if the difference is smaller than zero, the significant number of the absolute value | x | is shifted to the left, where the number of bits shifted to the left is equal to the difference; if the difference is greater than zero, the significant digit of the absolute value | x | is right-shifted by a number of bits equal to the difference.
Step S5, splitting the shift data x' to obtain a fitting part x1And a non-fitting part x2Fitting part x1And the non-fitting part x2Is equal to the shift data x'. Wherein, the fitting part x1Is equal to the fractional part of the significant number of the shift data x' plus r, the fitting section x1Is positioned in a specific fitting interval; non-fitting part x2Is equal to the integer part of the significand of the shift data x' minus r. In a preferred embodiment of the invention, r is equal to 1.
Step S6, fitting part x1And a non-fitting part x2Respectively processing the first and second images to obtain a first operation result f (x)1) And a second operation result f (x)2). Specifically, a fitting operation circuit calls a fitting parameter pair fitting unit x1Performing fitting operation to obtain a first operation result f (x)1) (ii) a And using a function value mapping circuit to non-fit the part x2Searching a mapping table for the index to finally obtain a non-fitting part x2Corresponding second operation result f (x)2). Wherein the mapping table comprises a non-fitting part x2And a non-fitting part x2Corresponding second operation result f (x)2). In a preferred embodiment, the function value mapping circuit uses the non-fitting part x2The whole is used as an index to look up the mapping table. In other embodiments, the non-fitting part x may be used2Some bits in the table are used as an index to look up the mapping table.
Step S7, using the multiplier to receive the first operation result f (x)1) And a second operation result f (x)2) Performing multiplication operationA first product is obtained.
Step S8: it is determined whether the input data x is a positive number. If the input data x is negative, go to step S9; if the input data x is positive, step S10 is executed.
And step S9, inverting the fitting operation result in the step S3 or the first product in the step S7 to obtain the reciprocal of the fitting operation result or the first product.
And step S10, outputting the final operation result. Specifically, if the input data x is a positive number, the numerical value of the fitting operation result is used as a final operation result, or the first product is used as a final operation result; and if the input data x is negative, taking the reciprocal of the numerical value of the fitting operation result as a final operation result, or taking the reciprocal of the first product as the final operation result.
Prior art techniques tend to configure a larger interval as the fitting interval, e.g., for function 2 in an IEEE-754 single precision floating point number systemxThe fitting is performed since the maximum value that can be represented by the IEEE-754 single precision floating point number is 2127Therefore, the fitting interval is often configured to [ -127,127 [ -127 [ ]]However, in order to ensure the accuracy requirement of the fitting, the fitting interval is generally divided into a plurality of subintervals. If a sub-interval is divided every 0.1, then the fitting interval [ -127,127 ] is]The method can be divided into 2540 sub-intervals, so that 2540 groups of fitting parameters are theoretically needed to realize the fitting of the function, and the occupation of storage resources is extremely large. In the present invention, however, the function 2 is processedxThe fitting operation is performed by only setting the specific fitting interval to [0, 2]]In the same manner as for [0, 2]]The division is carried out, which means that 20 subintervals are totally obtained, therefore, only 20 groups of fitting parameters are needed to complete 2x1In [0, 2]]After that, the non-fitting part x is mapped by a function value mapping circuit2Lookup mapping table for index to get 2x2And multiplying the two to obtain 2x1+ x2I.e. restoring the input data x at [ -127,127 ]]The function fitting value of (1).
From a memory resource perspective, the memory resource overhead of about 2520 sets of fitting parameters is saved. In a system with a high requirement on the fitting accuracy, the subinterval division interval is usually set at 0.1 or less; when 0.1 is used as the common minimum subinterval standard, the invention saves at least two orders of magnitude of fitting parameters compared with the prior art, so the invention has considerable saving on storage resources. If the fitting parameters are not stored by using the storage resources, but are solidified in the circuit, compared with the condition that the rest of fitting parameters are required to be solidified 2540 in the prior art, the method can greatly reduce the area and the power consumption of the circuit.
In addition, in order to call the corresponding fitting parameters to perform the fitting operation, it is necessary to determine which subinterval the input data x is located in, and therefore, the prior art theoretically needs log22540 gates (Gate) to make subinterval decisions, whereas the present invention requires only log220 gates. Therefore, the circuit area of the invention is obviously smaller than that of the prior art. Meanwhile, in the fitting calculation of the hydration, the invention uses less gate circuits for judgment, and the circuit is delayed (namely the fitting part x)1The time to match the corresponding fitting parameters) is significantly lower than in the prior art.
Due to the pre-stored second operation result f (x) in the mapping table2) Very close to the true value, so the present invention passes the second operation result f (x)2) Restoring the function fitting value of the input data x has the advantage of high fitting accuracy.
In some embodiments of the present invention, the specific fitting interval may be set to [0, 2]t+m]And m is a positive integer. In another embodiment of the present invention, the specific fitting interval can also be set to [ 2]t-n,2t+m]And n is a non-negative integer. In a preferred embodiment of the present invention, m is 1 and n is 0. In some embodiments of the present invention, the specific fitting interval may also be configured as an open interval or a half-open and half-closed interval.
For example, when the exponent t of the shift data x 'is equal to 2, the specific fitting interval may be set to [0,8], or (0,8), or the like, and for example, when the exponent t of the shift data x' is equal to 0, the specific fitting interval may be set to [1,2], [1,2), (1,2), or the like, and will not be described herein again. In a preferred embodiment of the present invention, the specific fitting interval includes a plurality of sub-intervals, and each of the sub-intervals corresponds to a set of fitting parameters.
In a preferred embodiment of the present invention, the non-fitting part x in the mapping table is a non-fitting part2Forming at least one series of equal difference numbers with a tolerance of 2t. It should be noted that the tolerance is equal to 2tOr is equal to-2tDepending on how the first and last terms of the arithmetic progression are defined. Therefore, the tolerance is equal to-2tThe arithmetic progression of (a) should be regarded as the same technical solution as the present invention.
For example, when the exponent t of the shift data x' is equal to 2, the non-fitting portion x in the mapping table2An arithmetic sequence of {4,8,12, …,76,80, … } may be formed, and the last term of the arithmetic sequence may be determined according to the maximum value representable by the system. For example, a single precision floating point number may represent a maximum of 2127If the mapping table indicates exDue to the mapping of e88Has exceeded 2127In combination with the above specified fit interval [0,8]]To achieve the maximum value that can be fitted to e88The last entry of the arithmetic progression should be 80.
Fig. 2 is a schematic structural diagram of a data processing apparatus 200 according to an embodiment of the present invention. The data processing apparatus 200 includes: the apparatus includes a determining unit 210, a shifting unit 220, a splitting unit 230, a function value mapping circuit 240, a fitting operation circuit 250, a multiplier 260, a reciprocal operator 270, a positive unit 280, a first multiplexer 291, a second multiplexer 292, and a third multiplexer 293.
The positive unit 280 is connected with the judgment unit 210; the judging unit 210 is connected with the shifting unit 220; the shift unit 220 is connected with the split unit 230; the splitting unit 230 is connected with the function value mapping circuit 240; one input end of the first multiplexer 291 is connected to the determining unit 210, the other input end is connected to the splitting unit 230, and the output end of the first multiplexer 291 is connected to the fitting operation circuit 250; one of the input terminals of the second multiplexer 292 is connected to the function value mapping circuit 240, the other input terminal thereof receives the fixed value 1, and the output terminal thereof is connected to the multiplier 260; the multiplier 260 is further connected to the fitting operation circuit 250 and the reciprocal operator 270, respectively; one input terminal of the third multiplexer 293 is connected to the multiplier 260, and the other input terminal of the third multiplexer 293 is connected to the reciprocal operator 270.
The positive unit 280 is configured to receive input data x and obtain an absolute value | x | of the input data x.
The determining unit 210 is configured to receive the absolute value | x |, and determine whether the absolute value | x | is within a specific fitting interval. If the absolute value | x | is within the specific fitting interval, the determining unit 210 sends the absolute value | x | to the first multiplexer 291; if the input data | x | is outside the specific fitting interval, the determining unit 210 sends the absolute value | x | to the shifting unit 220.
The shifting unit 220 is configured to shift the absolute value | x | to obtain shifted data x ', and send the shifted data x' to the splitting unit 230.
The splitting unit 230 is configured to split the shift data x' into fitting parts x1And a non-fitting part x2Fitting part x1And the non-fitting part x2Is equal to the shift data x'. Then fitting the part x1Sends it to the first multiplexer 291 and sends the non-fitting part x2To the function value mapping circuit 240.
The function value mapping circuit 240 uses the non-fitting part x2Searching a mapping table for the index to finally obtain a non-fitting part x2Corresponding second operation result f (x)2) And the second operation result f (x)2) To a second multiplexer 292.
The first multiplexer 291 is arranged to select the absolute value | x | and/or fitting part x from the received absolute values | x |, which are within a certain fitting interval1One of which is sent to the fitting operation circuit 250.
The fitting operation circuit 250 is configured to receive the absolute value | x | located in the specific fitting interval and perform fitting operation to obtain a fitting operation result; the fitting operation circuit 250 is also used for receiving the fitting part x1Performing fitting operation to obtain a first operation result f (x)1). In a preferred embodiment of the present invention, the fitting operation circuit comprises a multiplier and an adder, and the matching of the multiplier and the adder is used for performingAnd (5) performing polynomial fitting operation. In other embodiments, a multiplier-adder may be used instead of a multiplier and an adder to perform polynomial operations. In a preferred embodiment, the polynomial fitting operation is a binomial fitting operation, but the degree of the fitting operation is not particularly limited in the present invention.
The second multiplexer 292 is used for receiving the second operation result f (x)2) And/or a fixed value of 1 to the multiplier 260. It should be apparent that the fixed value may be either floating point or integer.
The multiplier 260 is used for receiving the first operation result f (x)1) And a second operation result f (x)2) Performing multiplication to obtain a first product; the multiplier 260 is further configured to receive the fixed value and perform a multiplication operation on the fitting operation result to obtain a second product.
The reciprocal operator 270 is configured to receive the first product and perform a reciprocal operation to obtain a reciprocal thereof; the reciprocal operator 270 is further configured to receive the second product and perform a reciprocal operation to obtain a reciprocal thereof.
An input of the third multiplexer 293 is configured to receive the first product and/or the second product; the other input of the third multiplexer 293 is used for receiving the inverse of the first product and/or the inverse of the second product. The third multiplexer 293 selects one of the inputs to be output from its output terminal as a final operation result.
The logic circuits selected to transfer the data from multiple data channels to a single common channel to perform the data selection function can all be considered as simple replacements for multiplexers (multiplexers). For example, a data selector, a multiplexer, or the like may be used in place of the multiplexer.
In the above mentioned technical solution, the fitting operation circuit 250 sends the fitting operation result to the multiplier 260 to be multiplied by a fixed value to obtain a second product, and the multiplier 260 sends the second product to the reciprocal operator 270 and the third multiplexer 293, so that the two inputs received by the third multiplexer 293 are the reciprocal of the second product and the second product, respectively.
In other embodiments of the present invention, another technical solution may be adopted instead of the above-described process. For example, the fitting operation circuit 250 is further connected to the reciprocal operator 270 and the third multiplexer 293, respectively, so that the fitting operation circuit 250 can send the fitting operation result to the reciprocal operator 270 for reciprocal operation and can send the fitting operation result to the third multiplexer 293, and thus the two inputs received by the third multiplexer 293 are the reciprocal of the fitting operation result and the fitting operation result, respectively.
It is apparent that since the fixed number is equal to 1, the first product is numerically equal to the result of the fitting operation and the inverse of the first product is numerically equal to the inverse of the result of the fitting operation. Therefore, in the above two embodiments, the two inputs received by the third multiplexer 293 are equal in value, and substantially the same technical effect can be achieved.
For ease of understanding, the data processing apparatus 200 described above is used below to describe a specific process of data processing in conjunction with specific functions and input data.
Providing a function for fitting as exSetting the specific fitting interval to be (0,8)]The specific fitting interval is divided into a plurality of sub-intervals, and each sub-interval corresponds to a group of fitting parameters. Please refer to fig. 3, which illustrates some fitting parameters provided in this embodiment.
An IEEE-754 floating-point number-8 is provided as input data, with a significand of 1, an exponent of 3, and a negative sign, which may be expressed as-1 x 23(represented in binary).
The positive unit 280 receives the input data-8, and solidifies its sign to positive to obtain its absolute value 8, which can be expressed as 1 x 23(represented in binary).
The judgment unit 210 receives the absolute value 8, judges that it is in the specific fitting interval (0,8), sends it to the first multiplexer 291, and the first multiplexer 291 sends it to the fitting operation circuit 250.
The fitting operation circuit 250 receives the absolute value 8 and determines that it is in the sub-interval (6, 8) of the specific fitting interval]Calling the fitting parameter a and the fitting parameterAnd performing binomial fitting operation on the number b and the fitting parameter c to obtain a fitting operation result. Wherein the fitting parameter a is 1400, the fitting parameter b is-19400, the fitting parameter c is 68800, and the formula for performing the binomial fitting operation is ax2+ bx + c. Therefore, the result of the fitting operation is 3200. It should be understood that to ensure the accuracy of the fitting operation, the fitting parameters need to be iterated or debugged many times. The present embodiment shows trial fitting parameters for demonstration for the purpose of illustrating the fitting operation process, which should not be understood as fitting parameters in the optimal situation when the present invention is actually used.
The multiplier 260 obtains the result of the fitting operation and obtains a fixed value (equal to 1) from the second multiplexer 292, multiplies the two to obtain a product of the two, and sends the product to the reciprocal operator 270. In other embodiments, the multiplier 250 may directly send the fitting result to the reciprocal operator 270, which may include connecting the fitting circuit 250 to the reciprocal operator 270, and since the fitting result and the product are equal in value, the reciprocal operator 270 may accept values that are not substantially different between the two embodiments.
The reciprocal operator 270 performs reciprocal operation on the received product to obtain a reciprocal equal to 0.0003125, and outputs the reciprocal as a final operation result through the third multiplexer 293.
In another embodiment of the present invention, the function provided for the fitting operation is 2xSetting the specific fitting interval to be [4,8]]The specific fitting interval is divided into a plurality of sub-intervals, and each sub-interval corresponds to a group of fitting parameters. Please refer to fig. 4, which illustrates some fitting parameters provided in this embodiment.
Provide an input data of 8.5, with an effective number of 1.0001, an index of 3, a positive sign, which can be expressed as 1.0001 x 23(represented in binary).
The positive unit 280 receives the input data 8.5, and the sign is fixed to positive, resulting in an absolute value of 8.5. It should be noted that since the sign of the input data 8.5 is positive, the input data 8.5 is equal to the absolute value 8.5Expressed as 1.0001 x 23(represented in binary).
The determining unit 210 receives the absolute value 8.5, determines that it is not located in the specific fitting region [4,8], and sends it to the shifting unit 220.
The shift unit 220 shifts the absolute value by 8.5 to obtain shifted data. Specifically, the exponent of the shift data may be set to 2. First, the difference value of 1 is obtained by subtracting the exponent of the shifted data from the exponent of the absolute value 8.5, and then the significant figure of the absolute value 8.5 is shifted left by 1 to obtain the significant figure of the shifted data. Thus, the shift data may be represented as 10.001 x 22(represented in binary).
The splitting unit 230 acquires the shift data and splits the shift data into a fitting part and a non-fitting part. Specifically, the decimal part of the significant figure of the shift data is added by 1 as the significant figure of the fitting portion, and therefore, the fitting portion can be expressed as 1.001 × 22(expressed in binary, corresponding to 4.5 decimal). The integer part of the significant number of the shift data is reduced by 1 to be the significant number of the non-fitting part, and therefore, the non-fitting part can be expressed as 1 x 22(expressed in binary, corresponding to 4 in decimal).
The splitting unit 230 transmits the fitting unit to the fitting operation circuit 250 through the first multiplexer 291, and the fitting operation circuit 250 determines 1.001 × 22And (5) calling the fitting parameters to perform fitting operation on the subintervals [4,5 ] positioned in the specific fitting interval to obtain a first operation result. Wherein the fitting parameter a is equal to 21, the fitting parameter b is equal to-150, the fitting parameter c is equal to 280, and the formula for carrying out the binomial fitting operation is ax2+ bx + c, the first operation result is 30.25. It should be understood that to ensure the accuracy of the fitting operation, the fitting parameters need to be iterated or debugged many times. The fitting parameters shown in the embodiment are only for exemplary illustration of the fitting operation process, and trial fitting parameters for demonstration are given, and should not be understood as fitting parameters in the optimal situation when the invention is actually used.
The splitting unit 230 also sends the non-fitted part to the function value mapping circuit 240, and the function value mapping circuit 240 uses the non-fitted partSection 1 x 22(corresponding to decimal 4) to find the mapping table for the index, and the corresponding second operation result is equal to 16. Fig. 5 is a mapping table according to an embodiment of the present invention. The mapping table comprises a non-fitting part and second operation results in one-to-one correspondence with the non-fitting part, wherein the non-fitting part forms an arithmetic sequence with a first term of 0, a last term of 80 and a tolerance of 4. In other embodiments, the mapping table may omit some items, or add some items of data.
The second multiplexer 292 takes the second operation result and sends it to the multiplier 260, and the multiplier 260 also takes the first operation result and multiplies the two to obtain a product equal to 484. Since the input data 8.5 is a positive number, the product is output as a final operation result by the third multiplexer 293.
In another embodiment of the invention, the function provided for fitting is exAnd setting a specific fitting interval to be (0,2), wherein the specific fitting interval is divided into a plurality of sub-intervals, and each sub-interval corresponds to one group of fitting parameters. Please refer to fig. 6, which illustrates some fitting parameters provided in this embodiment.
Providing input data equal to-10.5 with a significand of 1.0101, an exponent of 3 and a negative sign, which can be expressed as-1.0101 x 23(represented in binary).
The positive unit 280 receives the input data and solidifies its sign to positive, resulting in an absolute value of 10.5, which can be expressed as 1.0101 x 23(represented in binary).
The determining unit 210 receives the absolute value, determines that the absolute value is outside the specific fitting interval (0,2), and sends the absolute value to the shifting unit 220. The shift unit 220 shifts the data to obtain shifted data. Specifically, the exponent of the shift data may be set to 0. First, the difference value obtained by subtracting the exponent of the shift data from the exponent of the absolute value 10.5 is 3, and the significant digit of the input data is shifted to the left by 3 as the significant digit of the shift data. Thus, the shift data may be represented as 1010.1 x 20(represented in binary).
The splitting unit 230 obtains the shifted data and converts it into a binary dataThe fitting portion and the non-fitting portion are separated. Specifically, the fitting portion is obtained by adding 1 to the decimal part of the significant digit of the shift data, and therefore, the fitting portion can be expressed as 1.1 × 20(expressed in binary, corresponding to 1.5 in decimal). The integer part of the significant digit of the shift data is reduced by 1 to be the non-fit portion, and therefore the non-fit portion can be expressed as 1001 × 20(expressed in binary, equivalent to 9 in decimal).
The fitting operation circuit 250 obtains the fitting portion through the first multiplexer 291, determines that the fitting portion is located in a subinterval (1,2) of the specific fitting interval, and performs fitting operation by calling the fitting parameter a, the fitting parameter b, and the fitting parameter c to obtain a first operation result. Wherein the fitting parameter a is equal to 1.5, the fitting parameter b is equal to-1.5, the fitting parameter c is equal to 3, and the formula for carrying out the binomial fitting operation is ax2+ bx + c, therefore, the first operation result is 4.125. It should be understood that to ensure the accuracy of the fitting operation, the fitting parameters need to be iterated or debugged many times. The fitting parameters shown in the embodiment are only for exemplary illustration of the fitting operation process, and trial fitting parameters for demonstration are given, and should not be understood as fitting parameters in the optimal situation when the invention is actually used.
The function value mapping circuit 240 receives the non-fitting part, and searches the mapping table based on the non-fitting part (corresponding to decimal 9), and finally obtains a second operation result corresponding to the non-fitting part. Please refer to fig. 7 for the relationship between the non-fitting part and the corresponding second operation result stored in the mapping table. The mapping table comprises a non-fitting part and second operation results which are in one-to-one correspondence with the non-fitting part, wherein the non-fitting part forms an arithmetic sequence, the first term of the arithmetic sequence is 3, the last term of the arithmetic sequence is 86, and the tolerance of the arithmetic sequence is 1. In other embodiments, the mapping table may omit several items of data, or add several items of data.
The multiplier 260 obtains the first operation result from the fitting operation circuit 250, and obtains the second operation result from the function value mapping circuit 240 through the second multiplexer 292. The multiplier 260 multiplies the obtained first operation result and the second operation result to obtain a product equal to 33425.22120124852.
The reciprocal operation unit 270 obtains the product and performs reciprocal operation to obtain the reciprocal equal to 0.0000299175. Since the input data is negative, the reciprocal is output as a final operation result by the third multiplexer 293.
It is obvious that the index of shift data is not limited to 2 or 0 shown above, but may be adjusted according to actual implementation. Similarly, the selection of the specific fitting interval is not limited to the above-mentioned case, but may be determined according to the index of the shift data, and the manner of determining the specific fitting interval is described in detail above, and is not described herein again. The function to be fitted is not limited to e shown in the above embodimentsxOr 2x. In other embodiments, the function to be fitted may be any exponential function.
The fit parameters and the sub-intervals shown in the fit parameter table are merely exemplary data, and are not to be construed as a specific definition of the fit parameters or the respective fit sub-intervals according to the present invention. The range of the fitting parameters or subintervals may be adjusted as required for fitting accuracy. Similarly, the non-fitting part and the second operation result in the mapping table are also exemplary data.
Fig. 8 is a schematic structural diagram of a data processing apparatus 800 according to an embodiment of the present invention. The data processing device 800 as shown in fig. 8 includes one or more processors 810, a communication interface 820, and a memory 830. The processor 810, the communication interface 820 and the memory 830 may be connected by a bus, or may communicate by other means such as wireless transmission. The embodiment of the present invention is exemplified by connection via the bus 840. The memory 830 is used for program codes, and the processor 810 is provided with the data processing apparatus disclosed in the foregoing embodiments, and is used for executing the program codes stored in the memory 830, and when the program codes are executed by the processor 810, the steps of the data processing method disclosed in the foregoing embodiments are implemented.
It should be understood that in the embodiments of the present invention, the Processor 810 may be a Central Processing Unit (CPU), and the Processor may be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The communication interface 820 may be a wired interface (e.g., an ethernet interface) or a wireless interface (e.g., a cellular network interface or using a wireless local area network interface) for communicating with other modules or equipment devices. For example, the communication interface 820 in the embodiment of the present application may be specifically configured to receive input data input by a user; or receive data from an external device, etc.
It should be noted that fig. 8 is only one possible implementation manner of the embodiment of the present invention, and in practical applications, the data processing apparatus may further include more or less components, which is not limited herein. For the content that is not shown or described in the embodiment of the present invention, reference may be made to the relevant explanation in the foregoing method embodiment, which is not described herein again.
Those of ordinary skill in the art will appreciate that the elements and steps of the various examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the various examples have been described above generally in terms of their functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the terminal device and the unit described above may refer to corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed terminal device and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may also be an electric, mechanical or other form of connection.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment of the present invention.
In addition, each functional unit in the embodiments of the present invention may be integrated into one data processing device, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (13)
1. A data processing method is applied to a neural network and provides a multiplier, a fitting operation circuit and a function value mapping circuit, wherein the fitting operation circuit is used for calling fitting parameters to perform fitting operation on data, and the function value mapping circuit is used for matching corresponding numerical values according to indexes; providing at least one specific fitting interval within a specific function definition domain, the specific fitting interval only comprising non-negative numbers, the specific fitting interval corresponding to at least one set of fitting parameters; providing input data x, the input data x being a normalized floating point number, the input data x comprising a significand, an exponent, and a sign; wherein the fitting arithmetic circuit processes only data within the specific fitting interval;
the data processing method comprises the following steps:
step S10, acquiring the input data x, and solidifying the sign of the input data x to be positive to obtain the absolute value | x |, of the input data x;
step S20, judging whether the absolute value | x | is in the specific fitting interval;
if the absolute value | x | is located in the specific fitting interval, fitting operation is carried out on the absolute value | x | by using the fitting operation circuit to obtain a fitting operation result, and a final operation result is obtained based on the fitting operation result;
if the absolute value | x | is outside the specific fitting interval, skipping the step of directly calling the fitting operation circuit to process the absolute value | x | and directly executing the step S30;
step S30, shifting the absolute value | x | to obtain shifted data x'; the shift processing includes taking an exponent of the input data x as an exponent of the absolute value | x |, obtaining an exponent t of the shift data x ', where t is an integer, then calculating a difference between the exponent of the absolute value | x | and the exponent t, and then shifting an effective number of the absolute value | x | based on the difference to obtain an effective number of the shift data x';
step S40, obtaining fitting part x based on the shift data x1And a non-fitting part x2The fitting part x1And the non-fitting part x2Is equal to the shift data x'; wherein the fitting part x1Is equal to the fractional part of the significant number of the shift data x' plus 1, the fitting section x1Is located within the particular fitting interval; the non-fitting part x2Is equal to the integer part of the significand of the shift data x' minus 1;
step S50, fitting the fitting part x by using the fitting operation circuit1Performing fitting operation to obtain a first operation result f (x)1)；
Using the function value mapping circuit to map the non-fitting part x2Searching the mapping table for the index, and obtaining a corresponding second operation result f (x)2) (ii) a The mapping table includes the non-fitting part x2And the non-fitting part x2Corresponding second operation result f (x)2)；
Step S60, using the multiplier to receive the first operation result f (x)1) And the second operation result f (x)2) And performing multiplication to obtain a first product, and obtaining a final operation result based on the first product.
2. The data processing method of claim 1, wherein a reciprocal operator is provided, and in step S20, if the sign of the input data x is negative, the reciprocal operator is used to receive the fitting operation result and perform a reciprocal operation to obtain a final operation result; and if the sign of the input data x is positive, taking the fitting operation result as a final operation result.
3. The data processing method according to claim 1, wherein a reciprocal operator is provided, and in step S60, if the sign of the input data x is negative, the reciprocal operator is used to receive the first product and perform a reciprocal operation to obtain a final operation result; and if the sign of the input data x is positive, taking the first product as a final operation result.
4. The data processing method of claim 1, wherein the particular fitting interval comprises [0,2 [ ]t+m]And m is a positive integer.
5. The data processing method of claim 4, wherein the particular fitting interval comprises [ 2]t-n,2t +m]And n is a non-negative integer.
6. The data processing method of claim 5, wherein m is equal to 1 and n is equal to 0.
7. The data processing method of claim 1, wherein the non-fitting part x in the mapping table2Comprising at least one arithmetic series having a tolerance equal to2t。
8. A data processing device provides at least one specific fitting interval in a specific function definition domain, wherein the specific fitting interval only comprises nonnegative numbers, and the specific fitting interval corresponds to at least one set of fitting parameters; -providing input data x, said input data x being a normalized floating point number, said input data x comprising significands, exponents and symbols, characterized in that said data processing device comprises:
the positive taking unit is used for receiving the input data x transmitted from the outside and solidifying the sign of the input data x into positive to obtain an absolute value | x |, of the input data x;
the judging unit is connected with the positive taking unit and is used for judging whether the absolute value | x | is positioned in the specific fitting interval or not;
the shifting unit is connected with the judging unit and is used for acquiring the absolute value | x | outside the specific fitting interval and shifting the absolute value | x | to obtain shifted data x';
a splitting unit connected to the shifting unit, the splitting unit being configured to obtain the shifting data x 'and split the shifting data x' into a fitting portion x1And a non-fitting part x2The fitting part x1And the non-fitting part x2Is equal to the shift data x';
a function value mapping circuit connected to the splitting unit for obtaining the non-fitting part x2And for using said non-fitting part x2Searching a mapping table for the index to finally obtain the non-fitting part x2Corresponding second operation result f (x)2) (ii) a The mapping table includes the non-fitting part x2And the non-fitting part x2Corresponding second operation result f (x)2)；
A fitting operation circuit for obtaining an absolute value | x | within the specific fitting interval and calling the fittingFitting operation is carried out on the absolute value | x | by the combined parameters to obtain a fitting operation result; the fitting arithmetic circuit is also used for obtaining the fitting part x1And calling the fitting parameters to the fitting part x1Performing fitting operation to obtain a first operation result f (x)1)；
The multiplier is connected with the fitting operation circuit; the multiplier is used for receiving the first operation result f (x)1) And the second operation result f (x)2) Performing multiplication to obtain a first product; the multiplier is also used for receiving the fitting operation result and multiplying a fixed numerical value to obtain a second product, wherein the fixed numerical value is equal to 1;
and the reciprocal operator is connected with the multiplier and is used for acquiring the first product and/or the second product from the multiplier and performing reciprocal operation.
9. The data processing apparatus according to claim 8, further comprising a first multiplexer, the first multiplexer comprising an output terminal and at least two input terminals, the input terminal of the first multiplexer being connected to the determining unit, another input terminal of the first multiplexer being connected to the splitting unit, and the output terminal of the first multiplexer being connected to the fitting operation circuit; the first multiplexer is used for obtaining the fitting part x1And/or the absolute value | x | in the specific fitting interval, and selecting one to send to the fitting operation circuit.
10. The data processing apparatus of claim 8, further comprising a second multiplexer, said second multiplexer comprising an output and at least two inputs, said second multiplexer having an input coupled to said function value mapping circuit, another input of said second multiplexer receiving said fixed value, said second multiplexer having an output coupled to said multiplier; what is needed isThe second multiplexer is used for obtaining the second operation result f (x)2) And/or the fixed value, and alternatively sent to the multiplier.
11. The data processing apparatus of claim 8, further comprising a third multiplexer, the third multiplexer comprising an output and at least two inputs; the input end of the third multiplexer is connected with the multiplier and is used for acquiring the first product and/or the second product as input, and the other input end of the third multiplexer is connected with the reciprocal operator and is used for acquiring the reciprocal of the first product and/or the reciprocal of the second product as input; and the third multiplexer is used for selecting one from the input and sending the selected input to the output end of the third multiplexer to be used as a final operation result to be output.
12. A computer-readable storage medium, characterized in that the computer-readable storage medium stores program code which, when executed by a processor, implements the steps of the data processing method according to any one of claims 1 to 7.
13. A processor, characterized in that it comprises a data processing device according to any one of claims 8 to 11.
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| CN104484703A (en) * | 2014-12-30 | 2015-04-01 | 合肥工业大学 | Sigmoid function fitting hardware circuit based on Remez approximating algorithm |
| CN108537332A (en) * | 2018-04-12 | 2018-09-14 | 合肥工业大学 | A kind of Sigmoid function hardware-efficient rate implementation methods based on Remez algorithms |
| CN109657788A (en) * | 2018-12-18 | 2019-04-19 | 北京中科寒武纪科技有限公司 | Data processing method, device and Related product |
| CN109871941A (en) * | 2019-02-18 | 2019-06-11 | 北京中科寒武纪科技有限公司 | Data processing method, device and Related product |
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